阅读说明：本技术 一种可增强esd抗干扰能力的单向esd保护器及制作方法 (Unidirectional ESD protector capable of enhancing ESD anti-interference capability and manufacturing method ) 是由 杨晓亮 李泽宏 于 2021-10-21 设计创作，主要内容包括：本发明公开一种可增强ESD抗干扰能力的单向ESD保护器及制作方法,本发明在P扩散区的光刻工艺中,通过调整光刻窗口至N+扩散区区域内,同时引入高能量的硼注入、硼推结,使得P扩散区处于N+扩散区下方。P扩散区光刻窗口的尺寸略小于N+扩散区的窗口尺寸,由于该结构的击穿区域由常规结构的表面区域转移至体内区域,同时击穿的触发区域得到有效的增大。当进行ESD接触放电试验时,ESD脉冲依次经过第一N+扩散区、P扩散区104、P型单晶材料区、第二N+扩散区,从而可以获得更高的ESD抗干扰能力。通过合理设计P型扩散区的光刻窗口尺寸以及有效深度,与常规结构相比,本发明的ESD抗干扰能力可以比常规结构提高50-100%。(The invention discloses a unidirectional ESD protector capable of enhancing ESD anti-interference capability and a manufacturing method thereof. The size of the photoetching window of the P diffusion region is slightly smaller than that of the window of the N + diffusion region, and as the breakdown region of the structure is transferred from the surface region of the conventional structure to the internal region, the breakdown trigger region is effectively increased. When an ESD contact discharge test is carried out, an ESD pulse sequentially passes through the first N + diffusion region, the P diffusion region 104, the P type single crystal material region and the second N + diffusion region, so that higher ESD anti-interference capability can be obtained. By reasonably designing the size and effective depth of the photoetching window of the P-type diffusion region, compared with the conventional structure, the ESD anti-interference capability of the invention can be improved by 50-100% compared with the conventional structure.)

1. The utility model provides a can strengthen one-way ESD protector of ESD interference killing feature which: the P-type single crystal material photoetching structure comprises a P-type single crystal material, a first N + diffusion region, a second N + diffusion region, a P + diffusion region and a P diffusion region, wherein the first N + diffusion region, the second N + diffusion region and the P + diffusion region are all formed on the P-type single crystal material, the first N + diffusion region and the second N + diffusion region are separated by a certain distance, the second N + diffusion region is adjacent to the P + diffusion region, the P diffusion region is located below the first N + diffusion region, and the width of a photoetching window of the P diffusion region is smaller than that of a photoetching window of the first N + diffusion region.

2. The unidirectional ESD protector with enhanced ESD immunity of claim 1, wherein: a P diffusion region is formed on the P-type single crystal material, and then a first N + diffusion region is formed on the P diffusion region.

3. The unidirectional ESD protector with enhanced ESD immunity of claim 2, wherein: the process of forming the P diffusion region on the P type single crystal material comprises the following steps: p diffusion region patterning by front side lithography with boron implant dose of 6E14-1E15cm^-2The energy is 150-200KeV, the temperature condition of boron propulsion is 1100-1150 ℃, and the time is 60-120min, so as to form a P-type diffusion region.

4. A unidirectional ESD protector with enhanced ESD immunity according to claim 3, further comprising: the process of forming the first N + diffusion region on the P diffusion region is as follows: front-side photoetching to form a first N + diffusion region pattern, wherein the phosphorus implantation dosage of the first N + diffusion region is 4E15-6E15cm^-2The energy is 60-80 KeV.

5. A method for manufacturing a unidirectional ESD protector capable of enhancing ESD anti-interference capability is characterized in that: the method comprises the following steps:

s01), preparing a P-type single crystal material;

s02), growing a sacrificial oxide layer on the P-type single crystal material, then photoetching the front side of the P-type single crystal material to form a P diffusion region pattern, injecting boron into the front side, and propelling boron;

s03), forming a first N + diffusion region pattern in the P diffusion region by front-side photoetching, and injecting phosphorus into the front side;

s04), forming a second N + diffusion region graph and a P + diffusion region graph on the front side of the P-type single crystal material through photoetching, injecting boron into the front side, and pushing the boron to form a second N + diffusion region and a P + diffusion region;

s05), depositing an isolation medium layer on the front surface of the P-type single crystal material, and photoetching the front surface to form a contact hole area;

s06), sputtering or evaporating a metal or alloy over the isolation dielectric layer to form an electrode port.

6. The method for manufacturing the unidirectional ESD protector capable of enhancing ESD immunity against interference according to claim 5, wherein: the crystal orientation of the P-type single crystal material in the step S01) is <100>, and the resistivity is 5-50 omega cm.

7. The method for manufacturing the unidirectional ESD protector capable of enhancing ESD immunity against interference according to claim 5, wherein: in step S02), the boron implantation dosage of the P diffusion region is 5E14-1E15cm^-2The energy is 120-200KeV, the temperature condition of boron propulsion is 1100-1200 ℃, and the time is 60-180min, so that a P diffusion area is formed.

8. The method for manufacturing the unidirectional ESD protector capable of enhancing ESD immunity against interference according to claim 5, wherein: the dose of phosphorus implantation in step S03 was 3E15-6E15cm^-2The energy is 50-100KeV, and the boron implantation dose in the step S04 is 1E15-4E15cm^-2The energy is 30-80KeV, the temperature condition of boron propulsion is 1000-1100 ℃, and the time is 30-90min, so that a P + diffusion area and a second N + diffusion area are formed.

9. The method for manufacturing the unidirectional ESD protector capable of enhancing ESD immunity against interference according to claim 5, wherein: and step S05), the isolation medium layer is tetraethoxysilane TEOS with the thickness of 5000-10000A, and a layer of TI/TIN is deposited after the contact hole is etched.

10. The method for manufacturing the unidirectional ESD protector capable of enhancing ESD immunity against interference according to claim 5, wherein: the metal sputtered or evaporated on the front surface in the step S06) is aluminum, aluminum copper or aluminum-silicon-copper, the thickness is 2-4um, the sputtering or evaporation temperature of the alloy is 360-430 ℃, and the time is 25-45 min.

Technical Field

The invention belongs to the field of electronic science and technology, mainly relates to the field of Electrostatic Discharge (ESD-Electrostatic Discharge) protection of integrated circuits, and particularly relates to a unidirectional ESD protection device capable of enhancing ESD anti-interference capability and a manufacturing method thereof.

Background

Electrostatic discharge (ESD) phenomena are a significant cause of damage and even failure of integrated circuit products. Integrated circuit products are highly susceptible to ESD during their manufacture, fabrication, assembly, and operation, resulting in internal damage and reduced reliability. Therefore, the research on the high-performance and high-reliability ESD protection device plays a crucial role in improving the yield and reliability of the integrated circuit. Generally, the design of ESD protection devices requires consideration of four issues: firstly, the ESD protection device needs to have enough ESD anti-interference capability; secondly, the ESD protection device can discharge large current; thirdly, the ESD protection device has specific trigger voltage and low holding voltage; fourth, the ESD protection device requires ultra-low parasitic capacitance.

ESD immunity is an important parameter for ESD protection devices. According to the standard of the international electrotechnical commission IEC61000-4-2, the ESD anti-interference capability is tested by a test method of contact discharge and air discharge, wherein the contact discharge is a preferred test method, and the air discharge is applied to occasions where the contact discharge cannot be used. The ESD anti-interference capability is divided into 4 levels, wherein Level 1 is that contact discharge passes 2kV, air discharge passes 2kV, Level 2 is that contact discharge passes 4kV, air discharge passes 4kV, Level 3 is that contact discharge passes 6kV, air discharge passes 8kV, Level 4 is that contact discharge passes 8kV, and air discharge passes 15 kV. At present, Level 4 is taken as a general requirement for measuring the anti-interference capability of ESD. For different application scenarios, higher ESD immunity is required.

Devices commonly used for ESD protection are diodes, BJTs (triodes), SCRs (silicon controlled rectifiers), etc. The BJT structure achieves a shallow flyback characteristic due to the introduction of the injection modulation effect. The SCR structure achieves deep retrace characteristics through the positive feedback mechanism of PNPN. Therefore, from the residual voltage parameter, the SCR structure is the lowest, the BJT structure is the next to the BJT structure, and the diode structure is the highest. Because the voltage of the SCR structure after deep retrace is only about 2V and is obviously lower than common power supply voltages such as 3.3V, 5V and the like, the SCR structure device is always in a latch-up effect and cannot be recovered to a blocking state after ESD pulse discharge, and the SCR structure device is limited in application. Therefore, in general, the BJT structure is a relatively reasonable choice, the residual voltage parameter is reduced, and the application scenario limitation is relatively small.

For unidirectional ESD protection devices with BJT structures, a structure like that of fig. 3 is generally employed. A first N + diffusion region 1021, a second N + diffusion region 1022, a P + diffusion region 103, and a P diffusion region 104 are formed on the P-type single crystal material 101. The surface passivation layer 105 functions as a dielectric isolation. The second metal layer 107 and the first metal layer 106 respectively represent two electrode ports of the unidirectional ESD protection device, namely, an anode and a cathode.

As shown in fig. 2, when the second metal layer 107 is connected to a high potential and the first metal layer 106 is connected to a low potential, the current sequentially passes through the P + diffusion region 103, the P-type single crystal material 101 and the first N + diffusion region 1021, and is represented as a forward conduction characteristic of the diode, and when the first metal layer 106 is connected to a high potential and the second metal layer 107 is connected to a low potential, the current sequentially passes through the first N + diffusion region 1021, the P diffusion region 104 and the second diffusion region 1022, and is represented as a flyback breakdown characteristic of the transistor. The protection structure of the unidirectional ESD protection device shown in fig. 3 is a BJT triode, compared with a diode structure, the triode structure can introduce a stronger conductance modulation effect, but the breakdown voltage of the structure is mainly determined by the first N + diffusion region 102 and the P diffusion region 104, since the junction depths of the first N + diffusion region 1021 and the P diffusion region 104 are shallow, usually 0.5-1.0um, when a contact discharge test is performed, ESD pulse current is mainly concentrated in the P diffusion region 104 with a shallow junction depth, which easily causes tip discharge, so that local overheating and device damage are caused. Therefore, the ESD immunity of the ESD protection device with such a structure is relatively weak. Such as: under the condition that the through-current capacity is 3-5A, the ESD anti-interference capacity can only just pass 8kV contact discharge test, so that the ESD anti-interference capacity becomes a parameter for restricting the application scene of the structural product.

Disclosure of Invention

Aiming at the defects of the prior art, the invention provides the unidirectional ESD protection device capable of enhancing the ESD anti-interference capability and the manufacturing method thereof, and the higher ESD anti-interference capability can be obtained under the conditions that the area of a chip is unchanged and the processing procedure of the chip is unchanged.

In order to solve the technical problem, the technical scheme adopted by the invention is as follows: the utility model provides a can strengthen one-way ESD protector of ESD interference killing feature, including P type single crystal material, first N + diffusion district, second N + diffusion district, P + diffusion district and P diffusion district, first N + diffusion district, second N + diffusion district, P + diffusion district all form on P type single crystal material to first N + diffusion district separates a section distance with second N + diffusion district, second N + diffusion district is adjacent with P + diffusion district, P diffusion district is located the below of first N + diffusion district, and the width of P diffusion district photoetching window is less than the width of first N + diffusion district photoetching window.

Further, a P diffusion region is formed on the P-type single crystal material, and then a first N + diffusion region is formed on the P diffusion region.

Further, the process of forming the P diffusion region on the P type single crystal material is as follows: a P diffusion region pattern is formed through front-side photoetching, the boron implantation dosage is 6E14-1E15cm-2, the energy is 150-.

Further, the process of forming the first N + diffusion region on the P diffusion region is: and forming a first N + diffusion region pattern by front-side photoetching, wherein the phosphorus implantation dose of the first N + diffusion region is 4E15-6E15cm-2, and the energy is 60-80 KeV.

The invention also discloses a manufacturing method of the unidirectional ESD protector capable of enhancing the anti-interference capability of ESD, which comprises the following steps:

s01), preparing a P-type single crystal material;

s02), growing a sacrificial oxide layer on the P-type single crystal material, then photoetching the front side of the P-type single crystal material to form a P diffusion region pattern, injecting boron into the front side, and propelling boron;

s03), forming a first N + diffusion region pattern in the P diffusion region by front-side photoetching, and injecting phosphorus into the front side;

s04), forming a second N + diffusion region graph and a P + diffusion region graph on the front side of the P-type single crystal material through photoetching, injecting boron into the front side, and pushing the boron to form a second N + diffusion region and a P + diffusion region;

s05), depositing an isolation medium layer on the front surface of the P-type single crystal material, and photoetching the front surface to form a contact hole area;

s06), sputtering or evaporating a metal or alloy over the isolation dielectric layer to form an electrode port.

Further, the P-type single crystal material in the step S01) has a crystal orientation of <100> and a resistivity of 5-50 Ω.

Further, in step S02), the boron implantation dose of the P diffusion region is 5E14-1E15cm-2, the energy is 120-200KeV, the temperature condition of boron drive is 1100-1200 ℃, and the time is 60-180min, so as to form the P diffusion region.

Further, the phosphorus implantation dose in the step S03 is 3E15-6E15cm-2, the energy is 50-100KeV, the boron implantation dose in the step S04 is 1E15-4E15cm-2, the energy is 30-80KeV, the temperature condition of boron propulsion is 1000-1100 ℃, and the time is 30-90min, so that a P + diffusion region and a second N + diffusion region are formed.

Further, the isolation dielectric layer in step S05) is tetraethoxysilane TEOS, the thickness of which is 5000-.

Further, the metal sputtered or evaporated from the front surface in the step S06) is aluminum, aluminum copper or aluminum-silicon-copper, the thickness is 2-4um, the sputtering or evaporation temperature of the alloy is 360-430 ℃, and the time is 25-45 min.

The invention has the beneficial effects that:

1. the invention can obtain higher ESD anti-interference capability under the conditions of unchanged chip area and unchanged chip processing procedures.

2. In the photoetching process of the P diffusion region, the P diffusion region is positioned below the N + diffusion region by adjusting the photoetching window to the N + diffusion region and introducing high-energy boron injection and boron push junction at the same time. The size of the photoetching window of the P diffusion region is slightly smaller than that of the window of the N + diffusion region, and as the breakdown region of the structure is transferred from the surface region of the conventional structure to the internal region, the breakdown trigger region is effectively increased. When an ESD contact discharge test is carried out, an ESD pulse sequentially passes through the first N + diffusion region, the P diffusion region 104, the P type single crystal material region and the second N + diffusion region, so that higher ESD anti-interference capability can be obtained. By reasonably designing the size and effective depth of the photoetching window of the P-type diffusion region, compared with the conventional structure, the ESD anti-interference capability of the invention can be improved by 50-100% compared with the conventional structure.

Drawings

FIG. 1 is a schematic cross-sectional view of a unidirectional ESD protection device with enhanced ESD immunity according to the present invention;

FIG. 2 is a schematic diagram of the characteristic of a unidirectional ESD protection device IV capable of enhancing ESD immunity according to the present invention;

FIG. 3 is a schematic cross-sectional structure diagram of a unidirectional ESD protection device of a conventional structure;

FIG. 4 is a schematic diagram of growing a sacrificial oxide layer for preparing a P-type single crystal material according to the present invention;

FIG. 5 is a schematic diagram of P diffusion region patterning by front side lithography and P diffusion region patterning by front side boron implantation according to the present invention;

FIG. 6 is a schematic diagram of the present invention with front side lithography to form N + diffusion region pattern, front side phosphorus implantation, front side lithography to form P + diffusion region pattern, front side boron implantation, boron drive-in to form N + diffusion region, P + diffusion region;

FIG. 7 is a front side deposited isolation dielectric layer of the present invention. Schematic diagram of contact hole region formed by front-side photoetching

Fig. 8 is a front side sputtered or evaporated metal of the present invention. Photoetching front metal to form a schematic diagram of a metal area;

in the figure: 101. p-type single crystal material, 102, N + diffusion region, 1021, first N + diffusion region, 1022, second N + diffusion region, 103, P + diffusion region, 104, P diffusion region, 105, surface passivation layer, 106, first metal layer, 107, second metal layer, 108 and sacrificial oxide layer.

Detailed Description

The present invention will be further described in detail with reference to the accompanying drawings and embodiments, and the detailed description will be made with reference to the voltage level of 5.0V as an example.

Example 1

The embodiment discloses a unidirectional ESD protection device capable of enhancing ESD anti-interference capability, which is different from a conventional unidirectional ESD protection device, in the photoetching process of a P diffusion region 104, a photoetching window is adjusted to an N + diffusion region 102 region, and high-energy boron injection and boron push junction are introduced at the same time, so that the P diffusion region is positioned below the N + diffusion region. Specifically, as shown in fig. 1, the P-type single crystal material comprises a P-type single crystal material 101, a first N + diffusion region 1021, a second N + diffusion region 1022, a P + diffusion region 103, and a P diffusion region 104, wherein the first N + diffusion region 1021, the second N + diffusion region 1022, and the P + diffusion region 103 are all formed on the P-type single crystal material 101, the first N + diffusion region 1021 and the second N + diffusion region 1022 are separated by a distance, the second N + diffusion region 1022 is adjacent to the P + diffusion region 103, the P diffusion region 104 is located below the first N + diffusion region 1021, and a width of a photolithography window of the P diffusion region 104 is smaller than a width of a photolithography window of the first N + diffusion region.

In this embodiment, a P diffusion region 104 is formed on the P-type single crystal material 101, and then a first N + diffusion region 1021 is formed on the P diffusion region 104.

Specifically, the process of forming the P diffusion region 104 on the P-type single crystal material 101 is as follows: the P diffusion region 104 is formed by front-side lithography, the boron implantation dose is 6E14-1E15cm-2, the energy is 150-.

The process of forming the first N + diffusion 1021 on the P diffusion 104 is: a first N + diffusion region 1021 is formed by front-side lithography, the phosphorus implantation dose of the first N + diffusion region 1021 is 4E15-6E15cm-2, and the energy is 60-80 KeV.

As shown in fig. 2, the ESD protection device according to this embodiment has an IV characteristic that when the second metal layer 107 is connected to a high potential and the first metal layer 106 is connected to a low potential, a current sequentially passes through the P + diffusion region 103, the P-type single crystal material 101, and the first N + diffusion region 1021, and is represented as a forward conduction characteristic of a diode, and when the first metal layer 106 is connected to a high potential and the second metal layer 107 is connected to a low potential, a current sequentially passes through the first N + diffusion region 1021, the P diffusion region 104, and the second N + diffusion region 102, and is represented as a shallow flyback breakdown characteristic of a triode.

The present embodiment shifts the breakdown region from the surface region of the conventional structure to the bulk region, while the trigger region for breakdown is effectively increased. When the ESD contact discharge test is performed, the ESD pulse sequentially passes through the first N + diffusion region 1021, the P diffusion region 104, the P-type single crystal material region 101, and the second N + diffusion region 1022, so that a higher ESD immunity can be obtained. By reasonably designing the size and effective depth of the photoetching window of the P-type diffusion region, compared with the conventional structure, the ESD anti-interference capability of the invention can be improved by 50-100% compared with the conventional structure.

Example 2

The embodiment discloses a manufacturing method of a unidirectional ESD protection device capable of enhancing the anti-interference capability of ESD, which comprises the following steps:

s01) preparing a P-type single crystal material 101, wherein as shown in FIG. 4, the crystal orientation of the P-type single crystal material 101 is <100>, and the resistivity is 5-50 omega-cm;

s02), growing a sacrificial oxide layer 108 over the P-type single crystal material 101, preferably with a thickness of 680 a 1000 a, as shown in fig. 5, and then forming a P diffusion region pattern 104 by front side lithography on the P-type single crystal material 101, front side boron implantation, boron drive-in;

s03), forming a first N + diffusion area graph 1021 in the P diffusion area 104 through front surface photoetching, and injecting front surface phosphorus;

s04), as shown in fig. 6, forming a second N + diffusion region pattern 1022 and a P + diffusion region pattern 103 on the front surface of the P-type single crystal material 101 by lithography, implanting boron into the front surface, and advancing boron to form the second N + diffusion region 1022 and the P + diffusion region 103;

s05), depositing an isolation medium layer on the front surface of the P-type single crystal material 101, and photoetching the front surface to form a contact hole area;

s06), sputtering or evaporating a metal or alloy over the isolation dielectric layer to form electrode ports, i.e., first metal layer 106 and second metal layer 107.

In this embodiment, the boron implantation dose of the P diffusion region 104 in the step S02) is 5E14-1E15cm-2, the energy is 120-200KeV, the temperature condition of boron drive is 1100-1200 ℃, and the time is 60-180min, so as to form the P diffusion region 104.

The phosphorus implantation dose in the step S03 is 3E15-6E15cm-2, the energy is 50-100KeV, the boron implantation dose in the step S04 is 1E15-4E15cm-2, the energy is 30-80KeV, the temperature condition of boron propulsion is 1000-.

And step S05), the isolation medium layer is tetraethoxysilane TEOS with the thickness of 5000-10000A, and a layer of TI/TIN is deposited after the contact hole is etched. The contact resistance is reduced, and meanwhile, the failure rate of metal overheating can be effectively reduced.

The metal sputtered or evaporated on the front surface in the step S06) is aluminum, aluminum copper or aluminum-silicon-copper, the thickness is 2-4um, the sputtering or evaporation temperature of the alloy is 360-430 ℃, and the time is 25-45 min.

The foregoing description is only for the basic principle and the preferred embodiments of the present invention, and modifications and substitutions by those skilled in the art are included in the scope of the present invention.