阅读说明：本技术 三端人工光学突触及其制备方法 (Three-terminal artificial optical synapse and preparation method thereof ) 是由 程传同 张恒杰 黄北举 张欢 陈润 陈弘达 于 2020-12-31 设计创作，主要内容包括：本发明提供一种三端人工光学突触,包括：栅极(2)；依次叠设于所述栅极表面的离子存储层(3)；离子导体层(4)和半导体沟道层(5)；源极(6)和漏极(7),分别位于所述半导体沟道层(5)的表面两端；其中,所述半导体沟道层(5)采用与所述离子存储层(3)的互补的半导体材料。本发明还提供一种该三端人工光学突触的制备方法。本发明通过对半导体沟道层施加不同的光学和电学脉冲调节该层内部的活跃性离子的浓度,从而实现人工光学突触的兴奋和抑制。本发明的三端人工光学突触器件采用互补型半导体的电容效应提高了稳定性和重复率,降低了人工光学突触的能耗,对沟道导电性的增强和抑制的可控性增强。(The invention provides a three-terminal artificial optical synapse comprising: a gate (2); the ion storage layers (3) are sequentially stacked on the surface of the grid; an ion conductor layer (4) and a semiconductor channel layer (5); the source electrode (6) and the drain electrode (7) are respectively positioned at two ends of the surface of the semiconductor channel layer (5); wherein the semiconductor channel layer (5) is made of a semiconductor material complementary to the ion storage layer (3). The invention also provides a preparation method of the three-terminal artificial optical synapse. The invention adjusts the concentration of active ions in the semiconductor channel layer by applying different optical and electrical pulses to the layer, thereby realizing excitation and inhibition of artificial optical synapses. The three-terminal artificial optical synapse device adopts the capacitance effect of the complementary semiconductor, so that the stability and the repetition rate are improved, the energy consumption of the artificial optical synapse is reduced, and the controllability of the enhancement and the inhibition of the channel conductivity is enhanced.)

1. A three-terminal artificial optical synapse comprising:

a gate (2);

an ion storage layer (3), an ion conductor layer (4) and a semiconductor channel layer (5) which are sequentially stacked on the surface of the grid;

the source electrode (6) and the drain electrode (7) are respectively positioned at two ends of the surface of the semiconductor channel layer (5);

wherein the semiconductor channel layer (5) is made of a semiconductor material complementary to the ion storage layer (3).

2. The three-terminal artificial optical synapse of claim 1, further comprising:

the grid electrode structure comprises a substrate (1), and the grid electrode (2) is located on the surface of the substrate (1).

3. Three-terminal artificial optical synapse according to claim 2, wherein the substrate (1) comprises Si/SiO₂Substrate, quartz substrate or plastic PET.

4. The three-terminal artificial optical synapse of claim 1, wherein the ion storage layer (3) is made of a P-type semiconductor thin-film material with defects, and the semiconductor channel layer (5) is made of an N-type semiconductor thin-film material with defects.

5. The three-terminal artificial optical synapse of claim 4, wherein the ion storage layer (3) material comprises NiO, IrO₂、Co₂O₃、Rh₂O₃Or MnO₂The material of the semiconductor channel layer (5) comprises WO₃、MoO₃、Nb₂O₅Or TiO₂。

6. The three-terminal artificial optical synapse of claim 1, wherein the ion conductor layer (4) employs an electrolyte containing active ions, the ion conductor layer (4) material comprising LiNbO₃Or proton conductor solid polymer electrolytes.

7. The three-terminal artificial optical synapse of claim 1, wherein the gate (2) is an inert metal or a higher conductivity inert material, the gate (2) material comprising Pt or Au.

8. The three-terminal artificial optical synapse of claim 1, wherein the source electrode (6) and the drain electrode (7) are both inert metal or inert material with higher conductivity, and the material of the source electrode (6) and the drain electrode (7) comprises ITO, FTO, Pt or Au.

9. The manufacturing method according to claim 1, wherein the thickness of the gate electrode (2) is 50 to 200nm, the thickness of the ion storage layer (3) is 50 to 300nm, the thickness of the ion conductor layer (4) is 15 to 20nm, the thickness of the semiconductor channel layer (5) is 50 to 200nm, and the thickness of the source electrode (6) and the thickness of the drain electrode (7) are both 100 to 200 nm.

10. A method for preparing the three-terminal artificial optical synapse of claim 2, comprising:

step S1, selecting a substrate (1) and cleaning the substrate;

step S2, preparing a gate (2) on a substrate (1);

step S3, placing the grid (2) in an oxygen-deficient state to deposit an ion storage layer (3);

a step S4 of forming an ion conductor layer (4) on the ion storage layer (3);

a step S5 of forming a semiconductor channel layer (5) on the ion conductor layer (4);

and step S6, sputtering a source electrode (6) and a drain electrode (7) at two ends of the surface of the semiconductor channel layer (5) to obtain the three-end artificial optical synapse.

Technical Field

The invention relates to the field of microelectronic devices and artificial synapses, in particular to a three-terminal artificial optical synapse and a preparation method thereof.

Background

The development of computational efficiency is largely limited by the existing von Neumann architecture and computing systems under Complementary Metal Oxide Semiconductor (CMOS) technology. With the explosive growth of data, information systems seek higher data processing efficiency to solve the problem of huge-scale data operation, the storage, power consumption and information processing capacity of human brains far exceed those of the existing most advanced electronic computers, and the artificial intelligence technology needs to more intelligently screen and filter information from a large amount of redundant information. For information perception and learning, the traditional detector focuses more on the real-time photoelectric response, and the information perception system of the future artificial intelligence technology needs to filter and learn information more intelligently like human eyes.

As is well known, the process by which the visual system perceives information is as follows: first, light reflected from an object is pre-processed through the pupil and enters the human eye, and the micro-image is mapped onto the sensory neurons on the retina, a process known as sensory memory. The perceptually remembered information is then selectively transferred to the visual cortex of the brain, creating a short-term memory that is easily forgotten. Finally, short-term memory is repeatedly trained to enhance synaptic weights between neural cells, thereby achieving long-term memory within the brain.

In terms of the current development situation, research on artificial synapses is directed towards memristors at both ends, and the memristors can realize one or more internal states through voltage regulation. Although memristors have great advantages in scalability, energy consumption, integration of computation, mechanical learning and the like, great gaps still exist in distance commercialization in the aspects of reliability, repeatability and batch-to-batch uniformity of devices, and most of artificial optical synapses with two optically adjustable ends have volatility. Therefore, the research of artificial synapses is gradually changing from two-terminal devices to three-terminal devices, and the channel conductance between the source and the drain of the three-terminal device can be used for both writing operation by using optical pulse and erasing operation by applying electrical pulse to the gate. Compared with a two-end structure, the three-end device structure is additionally provided with one electrode, so that the performance of the device can be more conveniently regulated and controlled. However, the current three-terminal photoelectric dual modulation device still has a commercial bottleneck of stability, and the optically tunable stability of the device is further increased by improving the structural and material characteristics of the device. The device with the structure has application potential in the fields of future large-scale integrated sensing equipment, novel memories, logic circuits, artificial intelligence devices and the like.

Disclosure of Invention

Technical problem to be solved

Aiming at the prior technical defects of the artificial optical synapse devices with two ends and three ends, the invention provides a novel artificial optical synapse device with three ends and a preparation method thereof, aiming at solving the problem of low stability and repeatability of artificial synapse in the prior art.

(II) technical scheme

One aspect of the present invention provides a three-terminal artificial optical synapse comprising: a gate electrode 2; an ion storage layer 3, an ion conductor layer 4 and a semiconductor channel layer 5 which are sequentially stacked on the surface of the grid; a source electrode 6 and a drain electrode 7 which are respectively positioned at two ends of the surface of the semiconductor channel layer 5; wherein the semiconductor channel layer 5 is made of a semiconductor material complementary to that of the ion storage layer 3.

According to an embodiment of the present disclosure, wherein the three-terminal artificial optical synapse further comprises: the grid electrode 2 is positioned on the surface of the substrate 1.

According to an embodiment of the present disclosure, wherein the substrate 1 comprises Si/SiO₂Substrate, quartz substrate or plastic PET.

According to the embodiment of the present disclosure, the ion storage layer 3 is made of a P-type semiconductor thin film material with defects, and the semiconductor channel layer 5 is made of an N-type semiconductor thin film material with defects.

According to the embodiment of the present disclosure, the ion storage layer 3 material comprises NiO and IrO₂、Co₂O₃、Rh₂O₃Or MnO₂The semiconductor channel layer 5 material comprises WO₃、MoO₃、Nb₂O₅Or TiO₂。

According to the embodiment of the present disclosure, the ion conductor layer 4 adopts an electrolyte containing active ions, and the material of the ion conductor layer 4 includes LiNbO₃Or proton conductor solid polymer electrolytes.

According to the embodiment of the present disclosure, the gate 2 is an inert metal or an inert material with high conductivity, and the gate 2 material includes Pt or Au.

According to the embodiment of the present disclosure, the source electrode 6 and the drain electrode 7 are both made of an inert metal or an inert material with high conductivity, and the material of the source electrode 6 and the drain electrode 7 includes ITO, FTO, Pt, or Au.

According to the embodiment of the disclosure, the thickness of the gate 2 is 50-200 nm, the thickness of the ion storage layer 3 is 50-300 nm, the thickness of the ion conductor layer 4 is 15-20 nm, the thickness of the semiconductor channel layer 5 is 50-200 nm, and the thickness of the source electrode 6 and the thickness of the drain electrode 7 are both 100-200 nm.

The invention also provides a preparation method of the three-terminal artificial optical synapse, which comprises the following steps: step S1, selecting a substrate 1 and cleaning it; step S2, preparing a gate 2 on the substrate 1; step S3, depositing the ion storage layer 3 by placing the gate 2 in an oxygen deficient state; step S4 of forming an ion conductor layer 4 on the ion storage layer 3; step S5, forming a semiconductor channel layer 5 on the ion conductor layer 4; and step S6, sputtering a source electrode 6 and a drain electrode 7 at two ends of the surface of the semiconductor channel layer 5 to obtain the three-end artificial optical synapse.

(III) advantageous effects

Compared with the prior art, the invention has at least the following beneficial effects:

(1) the three-terminal artificial optical synapse structure based on the complementary semiconductor is structurally optimized on the basis of the traditional two-port and three-port visual nerve synapses, the complementary semiconductor material is stacked to form the ion storage layer, the ion conductor layer and the semiconductor channel layer, charges in the channel layer can be stably and effectively stored and released through the capacitance effect of the three layers, and the stability and the repetition rate are improved.

(2) The device of the invention adopts the capacitance effect of the complementary semiconductor, and the electric charge quantity of the semiconductor channel layer can be still kept after the grid voltage is removed, therefore, the energy consumption of the optical synapse can be effectively reduced by the method.

(3) The device of the invention utilizes optics and electricity to carry out double regulation and control on the conduction state of the channel layer, and enhances the controllability of the enhancement and the inhibition of the conduction state of the channel, so that the three-terminal visual nerve synapse device can be applied to a visual nerve system of an artificial intelligent robot.

Drawings

FIG. 1 is a schematic diagram of a three-terminal artificial optical synapse structure in accordance with an embodiment of the present invention.

FIG. 2 is a schematic diagram of the operation of a three-terminal artificial optical synapse in accordance with an embodiment of the present invention.

FIG. 3 is a flow chart of a method for preparing a three-terminal artificial optical synapse in accordance with an embodiment of the present invention.

FIG. 4 is an expected result of an optical memory curve of a three-terminal artificial optical synapse after positive gate voltage pulse processing in accordance with an embodiment of the present invention.

FIG. 5 is an optical memory curve expectation result of a three-terminal artificial optical synapse in accordance with an embodiment of the invention after negative gate voltage pulsing or no-optical-pulsing processing.

FIG. 6 is an expected result of the stability and repeatability of multiple optical write and electrical erase operations of a three-terminal artificial optical synapse in accordance with an embodiment of the invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to specific embodiments and the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features described in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

FIG. 1 is a schematic diagram of a three-terminal artificial optical synapse structure in accordance with an embodiment of the present invention.

As shown in FIG. 1, one aspect of the present invention provides a three-terminal artificial optical synapse comprising: a gate electrode 2; an ion storage layer 3, an ion conductor layer 4 and a semiconductor channel layer 5 which are sequentially stacked on the surface of the grid 2; a source electrode 6 and a drain electrode 7 respectively positioned at two ends of the surface of the semiconductor channel layer 5; wherein the semiconductor channel layer 5 uses a semiconductor material complementary to that of the ion storage layer 3.

In addition, the three-terminal artificial optical synapse further comprises a substrate 1, and a gate 2 is positioned on the surface of the substrate 1.

In the embodiment of the invention, the substrate 1 can be made of Si/SiO₂The substrate 1, the quartz substrate 1 or polyethylene terephthalate plastic (PET for short), the substrate 1 has good insulating property.

In order to ensure the quality of the artificial optical synapse, the substrate 1 is a conventional substrate 1 with small roughness.

The gate electrode 2 is made of an inert metal or an inert material having a high conductivity, and may be made of Pt or Au, for example. The thickness of the gate 2 is 50 to 200 nm.

The ion storage layer 3 is made of P-type semiconductor thin film material with defects, such as NiO and IrO₂、Co₂O₃、Rh₂O₃Or MnO₂. The thickness of the ion storage layer 3 is 50 to 300 nm.

The ion conductor layer 4 is made of an electrolyte containing active ions, such as LiNbO₃Or proton conductor solid polymer electrolyte (H-SPE for short). The thickness of the ion conductor layer 4 is 15 to 20 nm.

The semiconductor channel layer 5 is made of a defective N-type semiconductor thin film material, such as WO₃、MoO₃、Nb₂O₅Or TiO₂. The thickness of the semiconductor channel layer 5 is 50 to 200 nm.

It is understood that the N-type semiconductor thin film material of the semiconductor channel layer 5 is complementary in semiconductor properties to the P-type semiconductor thin film material of the ion storage layer 3.

The source electrode 6 and the drain electrode 7 are both an inert metal or an inert material with high conductivity, such as ITO, FTO, Pt, or Au. The thickness of the source electrode 6 and the drain electrode 7 is 100-200 nm.

The substrate 1 is Si/SiO₂The grid 2 is Ti/Au, the ion storage layer 3 is NiO, and the ion conductor layer 4 is LiNbO₃The semiconductor channel layer 5 is WO₃The source electrode 6 and the drain electrode 7 are all ITO as an example, and a specific working principle of the three-terminal artificial optical synapse provided by the embodiment of the invention is explained.

FIG. 2 is a schematic diagram of the operation of a three-terminal artificial optical synapse in accordance with an embodiment of the present invention.

Referring to FIG. 2, the three-terminal artificial optical synapse structure of FIG. 1 is illustrated in detail, in an embodiment of the invention, Li in the ion conductor layer 4 is induced by applying a forward bias to the gate 2⁺To the N-type semiconductor channel layer 5WO₃The semiconductor channel layer 5 can be further subjected to a write operation by an optical pulse to make a large amount of W⁶⁺Is reduced to W⁵⁺Result in W⁵⁺Or V_oIncreased to provide photocurrent to the semiconductor channel layer 5, resulting in further enhancement of conductance;

when a negative pulse is applied to the gate 2, lithium ions in the semiconductor channel layer 5 are extracted, and the reaction in the semiconductor channel layer 5 and the ion storage layer 3 proceeds in the reverse direction, thereby causing W⁵⁺Is oxidized into W⁶⁺Result in W⁵⁺Or V_oAnd reduced, thereby implementing an erase operation.

Therefore, the present invention uses a P-type semiconductor as the ion storage layer 3, an electrolyte containing active ions as the ion conductor layer 4, and an N-type semiconductor as the semiconductor channel layer 5. By applying different optical pulses to the semiconductor channel layer 5 and different electrical pulses to the gate 2, the concentration of active ions within the semiconductor channel layer 5 is adjusted, thereby achieving artificial optical synaptic excitation and inhibition.

FIG. 3 is a flow chart of a method for preparing a three-terminal artificial optical synapse in accordance with an embodiment of the present invention.

As shown in fig. 3, another aspect of the present invention provides a method for preparing a three-terminal artificial optical synapse, comprising the following steps: step S1, selecting a substrate 1 and cleaning it; step S2, forming a gate 2 on the substrate 1; step S3, depositing the ion storage layer 3 by placing the gate 2 in an oxygen deficient state; step S4, forming an ion conductor layer 4 on the ion storage layer 3; step S5, forming a semiconductor channel layer 5 on the ion conductor layer 4; step S6, sputtering a source electrode 6 and a drain electrode 7 on both ends of the surface of the semiconductor channel layer 5, and making a three-terminal artificial optical synapse.

In the embodiment of the present invention, the deposition power in the oxygen-deficient state in step S3 is 300W, and the vacuum degree is 0.5 μm hg (i.e., unit mTorr).

In the embodiment of the invention, the thickness of the grid electrode 2 is 50-200 nm, the thickness of the ion storage layer 3 is 50-300 nm, the thickness of the ion conductor layer 4 is 15-20 nm, the thickness of the semiconductor channel layer 5 is 50-200 nm, and the thickness of the source electrode 6 and the drain electrode 7 are both 100-200 nm.

The following describes the steps of the method for preparing a three-terminal artificial optical synapse according to the embodiments of the invention in detail with reference to specific embodiments.

In step S1, a substrate is selected and subjected to a cleaning process.

The substrate cleaning of this step specifically includes: selection of single-side polished Si/SiO₂Cleaning with mixed solution of concentrated sulfuric acid and hydrogen peroxide for 10min, sequentially performing ultrasonic oscillation with acetone, ethanol and deionized water at 85% power for 10min, and blowing with nitrogen gun.

In step S2, a gate electrode is formed on the substrate.

This step is achieved sequentially by photolithography, thermal evaporation and lift-off processes.

Specifically, the photolithography process includes: by spin coating negative photoresist (rotation speed 1000rpm, 6 s; 6000rpm, 20s), pre-baking (110 ℃, 2min), ultraviolet exposure (300W, 30s), post-baking (100 ℃, 80s) and developing (2min30s), a photoetching pattern is prepared on the substrate, and the exposed substrate after developing is a grid pattern.

The thermal evaporation process comprises the following steps: using inert metal Au as a grid electrode, growing a layer of Ti with the thickness of 5nm on a substrate as an adhesion layer by a thermal evaporation method, and then evaporating 100nmAu, wherein the vacuum degree of a chamber in the evaporation process is 5 multiplied by 10^-4Pa；

The stripping process comprises the following steps: and soaking the film sample prepared in the previous step in acetone for 30min, washing the film sample by using an injector to assist in stripping metal on the photoresist part, sequentially washing the film sample by using absolute ethyl alcohol and deionized water, and finally drying the film sample by using a nitrogen gun.

In this step, if the gate 2 is made of a weak adhesion metal, such as Au and Pt, an adhesion layer with a thickness of 5-10 nm, such as Ti and Cr, may be grown on the bottom of the bottom electrode, so as to ensure that the gate 2 can be normally adhered to the substrate 1.

In step S3, the gate is placed in an oxygen deficient state to deposit an ion storage layer.

The steps are realized through a photoetching process and a magnetron sputtering process in sequence.

The photoetching process comprises the following steps: a photoetching pattern is prepared on a substrate by spin coating negative glue (the rotating speed is 1000rpm, 6 s; 6000rpm, 20s), pre-baking (110 ℃, 2min), ultraviolet exposure (300W, 30s), post-baking (100 ℃, 80s) and developing (2min, 30s), and the exposed grid electrode is an ion storage layer pattern after developing.

The magnetron sputtering ion storage layer comprises: and (3) sputtering a NiO target with the purity of 99.99% by using 100W of power and radio frequency, wherein the ratio of argon to oxygen is 30: 2, and the degree of vacuum is 0.5 mTorr. The thickness of the finally prepared ion storage layer is 50-300 nm.

In step S4, an ion conductor layer is formed on the ion storage layer.

The step is realized by a magnetron sputtering process, 100W of power is used, and LiNbO with the radio frequency sputtering purity of 99.99 percent is used₃The target material is subjected to magnetron sputtering under the conditions of pure argon and the vacuum degree of 0.5 mTorr. The thickness of the finally prepared ion conductor layer is 15-20 nm.

In step S5, a semiconductor channel layer is formed on the ion conductor layer.

Firstly, magnetron sputtering a semiconductor channel layer, using 150W of power, and sputtering a W target with the purity of 99.99% at radio frequency, wherein the ratio of argon to oxygen is 30: 6, and magnetron sputtering was performed under a vacuum of 0.5 mTorr. The thickness of the finally prepared semiconductor channel layer is 50-200 nm.

After the semiconductor channel layer is manufactured, a stripping process is needed, namely, the film sample in the previous step is soaked in acetone for 30min, a syringe is used for washing to assist in stripping the metal of the photoresist part, then absolute ethyl alcohol and deionized water are used for washing in sequence, and finally a nitrogen gun is used for drying.

And step S6, sputtering a source electrode and a drain electrode at two ends of the surface of the semiconductor channel layer to obtain the three-end artificial optical synapse.

The step can be realized by photoetching, magnetron sputtering and stripping processes in sequence.

The photoetching process comprises the following steps: a photoetching pattern is prepared on the substrate by spin coating negative glue (the rotating speed is 1000rpm, 6 s; 6000rpm, 20s), pre-baking (110 ℃, 2min), ultraviolet exposure (300W, 30s), post-baking (100 ℃, 80s) and developing (2min, 30s), and the exposed patterns after developing are a source electrode and a drain electrode.

Next, the source electrode and the drain electrode were magnetron sputtered by dc sputtering an ITO target having a purity of 99.99% with a power of 100W under a condition of pure argon gas and a degree of vacuum of 0.5 mTorr. The thickness of the finally prepared source electrode and the thickness of the finally prepared drain electrode are both 100-200 nm.

And finally, carrying out a stripping process, specifically, soaking the film sample prepared in the previous step for 30min by using acetone, washing by using a syringe to assist in stripping metal of the photoresist part, sequentially washing by using absolute ethyl alcohol and deionized water, and finally drying by using a nitrogen gun.

It should be noted that the above is only an exemplary description, and the present embodiment is not limited thereto. For example, in other embodiments, the source and drain electrode manufacturing process in this step may adopt vacuum evaporation to replace the above-mentioned magnetron sputtering process of the source and drain electrodes, and a specific vacuum evaporation process may be controlled according to actual needs to form the source and drain electrodes.

Thus, the preparation method of the three-terminal artificial optical synapse of the embodiments of the invention has been fully described.

The invention also tests the three-terminal artificial optical synapse device prepared by the preparation method and predicts the result.

FIG. 4 is an expected result of a memory curve of a three-terminal artificial optical synapse after positive gate voltage pulse processing in accordance with an embodiment of the present invention.

As shown in FIG. 4, by monitoring the current between the source and drain of a three-terminal artificial optical synapse, a semiconductor channel layer is provided with Li after a positive pulse is applied to the gate (e.g., open eye operation may be enabled)⁺The particles can further increase the conductive ions in the channel layer through ultraviolet light pulse, and have visual memory effect.

FIG. 5 is an expected result of a memory curve of a three-terminal artificial optical synapse in accordance with an embodiment of the invention after negative gate voltage pulsing or no-optical-pulse processing.

As shown in fig. 5, by monitoring the current between the source and drain of the three-terminal artificial optical synapse, after applying a negative-going pulse or applying no electrical pulse (for example, a closed-eye operation) to the gate, there are not enough ions available in the semiconductor channel layer for optical response, and the purpose of visual memory is not achieved.

FIG. 6 is an expected result of the stability and repeatability of multiple erase operations of a three-terminal artificial optical synapse in accordance with an embodiment of the invention.

As shown in fig. 6, the present invention realizes the multi-pulse multi-cycle erase/write operation by performing optical writing and electrical erasing on the semiconductor channel layer.

Therefore, the embodiment can effectively improve the stability and the repeatability of the device by accurately controlling the conductive ions of the semiconductor channel layer through the grid.

According to the embodiment of the invention, the ion storage layer, the ion conductor layer and the semiconductor channel layer are formed by utilizing the complementary semiconductor material stack, the charges in the channel layer can be stably and effectively stored and released through the capacitance effect of the three layers, the energy consumption of the electronic synapse is reduced through the method, and the stability and the repeatability are improved.

In summary, the present invention provides a three-terminal artificial optical synapse and a method for fabricating the same, which can modulate the concentration of active ions in a semiconductor channel layer by applying different optical and electrical pulses to the layer, thereby achieving excitation and inhibition of the artificial optical synapse. The device of the invention adopts the capacitance effect of the complementary semiconductor, improves the stability and the repetition rate, reduces the energy consumption of the artificial optical synapse, and enhances the controllability of the enhancement and the inhibition of the channel conductivity.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.