阅读说明：本技术 在没有阻挡层的情况下的原位钨沉积 (In-situ tungsten deposition without barrier layer ) 是由 巫勇 薇·V·唐 郭剑秋 刘雯伊 杨逸雄 杰奎琳·S·阮奇 曼德亚姆·斯里拉姆 斯里尼 于 2021-03-30 设计创作，主要内容包括：公开了用于在不使用阻挡层的情况下沉积金属膜的原位方法。一些实施方式包括形成包括硅或硼中的一种或多种的非晶成核层并且在所述成核层上形成金属层。这些工艺在工艺之间没有空气隔断的情况下执行。(An in-situ method for depositing a metal film without the use of a barrier layer is disclosed. Some embodiments include forming an amorphous nucleation layer comprising one or more of silicon or boron and forming a metal layer on the nucleation layer. These processes are performed without air breaks between the processes.)

1. A method of processing, comprising:

exposing a substrate surface to a boron precursor to form an amorphous boron layer, the substrate surface being substantially free of a barrier layer;

exposing the amorphous boron layer to a first metal precursor to convert the amorphous boron layer to a first metal layer; and

forming a second metal layer on the first metal layer by exposing the first metal layer to a second metal precursor,

wherein the processing method is performed without exposing the substrate surface to an air break.

2. The method of claim 1, wherein the method provides the first metal layer with improved resistivity, continuity, or adhesion relative to a similar treatment method comprising exposing the substrate surface to an air break.

3. The method of claim 1, wherein the method provides the second metal layer with improved resistivity, stress, thickness uniformity, and/or resistance uniformity.

4. The method of claim 1, wherein the first metal precursor and the second metal precursor independently comprise WF₆、WCl₆、W(CO)₅、MoF₆、MoCl₅Or Mo (CO)₆One or more of (a).

5. The method of claim 1, wherein the first metal precursor consists essentially of W (CO)₅And (4) forming.

6. The method of claim 1, wherein the first metal precursor comprises substantially no fluorine.

7. The method of claim 1, wherein the first metal precursor and the second metal precursor comprise the same metal.

8. A method of processing, comprising:

exposing a substrate surface to a silicon precursor to form an amorphous silicon layer, the substrate surface being substantially free of a barrier layer;

exposing the amorphous silicon layer to a first metal precursor to convert the amorphous silicon layer to a first metal layer; and

forming a second metal layer on the first metal layer by exposing the first metal layer to a second metal precursor,

wherein the processing method is performed without exposing the substrate surface to an air break.

9. The method of claim 8, wherein the method provides the first metal layer with improved resistivity, continuity, or adhesion relative to a similar treatment method comprising exposing the substrate surface to an air break.

10. The method of claim 8, wherein the method provides the second metal layer with improved resistivity, stress, thickness uniformity, and/or resistance uniformity.

11. The method of claim 8, wherein the silicon precursor comprises one or more silicon precursors of the formula Si_gH_hX_iWherein each X is a halogen independently selected from F, Cl, Br and I, g is any integer greater than or equal to 1, h and I are both less than or equal to 2g +2 and h + I is equal to 2g + 2.

12. The method of claim 8, wherein the first metal precursor and the second metal precursor independently comprise WF₆、WCl₆、W(CO)₅、MoF₆、MoCl₅Or Mo (CO)₆One or more of (a).

13. The method of claim 8, wherein the first metal precursor consists essentially of W (CO)₅And (4) forming.

14. The method of claim 8, wherein the first metal precursor comprises substantially no fluorine.

15. The method of claim 8, wherein the first metal precursor and the second metal precursor comprise the same metal.

16. A method of processing, comprising:

exposing a substrate surface to a silicon precursor and a boron precursor to form an amorphous layer comprising silicon and boron, the substrate surface being substantially free of a barrier layer;

exposing the amorphous layer to a first metal precursor to convert the amorphous layer to a first metal layer; and

forming a second metal layer on the first metal layer by exposing the first metal layer to a second metal precursor,

wherein the processing method is performed without exposing the substrate surface to an air break.

17. The method of claim 16, wherein the method provides the first metal layer with improved resistivity, continuity, or adhesion relative to a similar treatment method comprising exposing the substrate surface to an air break.

18. The method of claim 16, wherein the method provides the second metal layer with improved resistivity, stress, thickness uniformity, and/or resistance uniformity.

19. The method of claim 16, wherein the amorphous layer comprises no more than 5 atomic percent silicon or no more than 5 atomic percent boron.

20. The method of claim 16, wherein the first metal precursor and the second metal precursor independently comprise WF₆、WCl₆、W(CO)₅、MoF₆、MoCl₅Or Mo (CO)₆One or more of (a).

Technical Field

The present disclosure relates generally to methods of depositing thin films. In particular, the present disclosure relates to methods of depositing tungsten or tungsten-containing films.

Background

The semiconductor processing industry continues to seek greater throughput while improving the uniformity of layers deposited on substrates having greater surface areas. These same factors in combination with new materials also provide higher circuit integration per unit substrate area. As circuit integration increases, the need for greater uniformity and process control in relation to layer thickness rises. Accordingly, various techniques have been developed to deposit layers on substrates in a cost-effective manner while maintaining control over the characteristics of the layers.

Chemical Vapor Deposition (CVD) is one of the most common deposition processes for depositing layers on substrates. CVD is a flux-dependent deposition technique that requires precise control of the substrate temperature and the precursors introduced into the processing chamber in order to produce a desired layer of uniform thickness. These requirements become more critical as substrate sizes become larger, creating a need for more complex chamber designs and gas flow techniques that maintain adequate uniformity.

Cyclic deposition or Atomic Layer Deposition (ALD) is a variant of CVD that exhibits outstanding step coverage. Cyclic deposition is based on Atomic Layer Epitaxy (ALE) and uses chemisorption techniques to continuously cyclically deliver precursor molecules on the substrate surface. The cycle exposes the substrate surface to a first precursor, a purge gas, a second precursor, and a purge gas. The first precursor and the second precursor react to form a product compound as a film on the substrate surface. The cycle is repeated to form a layer of desired thickness.

Amorphous silicon is widely used in semiconductor devices, flat panel displays, and solar cells. The development of amorphous silicon deposition processes with conformality (i.e., good step coverage) or gap-fill properties in high aspect ratio features has faced key technical challenges. Conventional LPCVD processes are limited to high temperatures (>550 ℃) and low pressures, and therefore exhibit poor step coverage and/or gap-fill performance; the PECVD process also does not have good step coverage and/or gap filling properties.

As semiconductor circuits become more integrated, tungsten has been used based on its superior step coverage. Thus, the use of CVD techniques to deposit tungsten enjoys widespread use in semiconductor processing due to the high throughput of the process, however, deposition of tungsten by conventional CVD methods is accompanied by several disadvantages.

For example, ALD processes deposit tungsten films to contain high aspect ratio (e.g., 20) vias, whereas traditional CVD processes will typically result in similar vias "pinch off" and incomplete fill. In addition, tungsten does not readily adhere to some surfaces (e.g., dielectric spacers or oxides). To improve the adhesion of tungsten to the dielectric spacers, conventional processes include TiN layers. Depositing TiN films in the form of seed layers can be time consuming and add additional complexity to the overall process.

Atomic Layer Deposition (ALD) of tungsten thin films exhibits very long hatch delays on silicon, silicon dioxide and titanium nitride services due to poor nucleation performance. Nucleation layers are often used to alleviate this problem. Conventionally, WF₆/Si₂H₆And WF₆/B₂H₆To deposit ALD WSi_xOr WB_x. However, WF₆Directly exposed to the substrate surface (e.g. Si, SiO)₂) And damages the substrate.

In addition, ALD tungsten films do not adhere well directly to silicon or silicon oxide substrate surfaces. A titanium nitride glue layer is used to improve adhesion. However, titanium nitride glue layer and WSi_x/WB_xNone of the nucleation layers conducts well, resulting in stacking (W/WSi)_xTiN) is very high.

Accordingly, there is a need in the art for improved techniques for depositing tungsten layers with reduced resistivity and no barrier/glue layers.

Disclosure of Invention

One or more embodiments of the present disclosure are directed to a processing method. The method includes exposing a substrate surface to a boron precursor to form an amorphous boron layer. The substrate surface is substantially free of barrier layers. The amorphous boron layer is exposed to a first metal precursor to convert the amorphous boron layer to a first metal layer. A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

Additional embodiments of the present disclosure are directed to methods of processing. The method includes exposing a substrate surface to a silicon precursor to form an amorphous silicon layer. The substrate surface is substantially free of barrier layers. The amorphous silicon layer is exposed to a first metal precursor to convert the amorphous silicon layer to a first metal layer. A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

Other embodiments of the present disclosure are directed to methods of processing. The method includes exposing a substrate surface to a silicon precursor and a boron precursor to form an amorphous layer comprising silicon and boron. The substrate surface is substantially free of barrier layers. The amorphous layer is exposed to a first metal precursor to convert the amorphous layer to a first metal layer. A second metal layer is formed on the first metal layer by exposing the first metal layer to a second metal precursor.

Drawings

So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.

Fig. 1 shows a schematic diagram of a membrane stack according to one or more embodiments of the present disclosure;

FIG. 2A shows a process scheme according to one or more embodiments of the present disclosure;

FIG. 2B shows a schematic diagram of a film stack according to the process scheme of FIG. 2A;

FIG. 3 shows a process scheme according to one or more embodiments of the present disclosure;

FIG. 4A shows a process scheme according to one or more embodiments of the present disclosure;

FIG. 4B shows a schematic diagram of a film stack according to the process scheme of FIG. 4A;

fig. 5 shows a schematic diagram of a membrane stack according to one or more embodiments of the present disclosure;

fig. 6A shows a process scheme according to one or more embodiments of the present disclosure;

FIG. 6B shows a schematic diagram of a film stack according to the process scheme of FIG. 6A;

FIG. 7 shows a process scheme according to one or more embodiments of the present disclosure;

fig. 8A shows a process scheme according to one or more embodiments of the present disclosure; and is

Fig. 8B shows a schematic diagram of a film stack according to the process scheme of fig. 8A.

Fig. 9A shows a process scheme according to one or more embodiments of the present disclosure;

FIG. 9B shows a schematic diagram of a film stack according to the process scheme of FIG. 9A;

FIG. 10 shows a processing system for performing an in situ method according to one or more embodiments of the present disclosure;

fig. 11A shows a cross-sectional image of an in situ prepared sample without an air break (air break) according to one or more embodiments of the present disclosure;

fig. 11B shows a cross-sectional image of an ex situ prepared sample with air interruptions, according to one or more embodiments of the present disclosure; and is

Fig. 11C shows adhesion test results for in situ prepared samples and ex situ prepared samples according to one or more embodiments of the present disclosure.

Detailed Description

Before describing several exemplary embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The disclosure is capable of other embodiments and of being practiced or of being carried out in various ways.

As used herein, "substrate surface" refers to any portion of a substrate on which a film process is performed or a portion of a material surface formed on the substrate. For example, depending on the application, the substrate surface on which the processing may be performed includes: materials such as silicon, silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire; and any other material such as metals, metal nitrides, metal alloys, and other conductive materials. Barrier layers, metals or metal nitrides on the surface of the substrate include titanium, titanium nitride, tungsten nitride, tantalum and tantalum nitride. The substrate surface may also include dielectric materials such as silicon dioxide and carbon-doped silicon oxide. The substrate may have various sizes, such as 200mm or 300mm diameter wafers, as well as rectangular or square squares. In some embodiments, the substrate comprises a rigid bulk material.

As used herein, "atomic layer deposition" or "cyclic deposition" refers to the sequential exposure to two or more reactive compounds to deposit a layer of material on a substrate surface. As used in this specification and the appended claims, the terms "reactive compound," "reactive gas," "reactive species," "precursor," "process gas," and the like are used interchangeably to refer to a substance having a component that is capable of reacting with a substrate surface or a material on a substrate surface in a surface reaction (e.g., chemisorption, oxidation, reduction). The substrate or portions of the substrate are continuously exposed to two or more reactive compounds introduced into a reaction zone of a processing chamber. In time domain ALD processes, exposure to each reactive compound is separated by a time delay to allow each compound to adhere to and/or react on the substrate surface. In a spatial ALD process, different portions of a substrate surface or materials on a substrate surface are exposed to two or more reactive compounds simultaneously such that any given point on the substrate is not substantially simultaneously exposed to more than one reactive compound. As used in this specification and the appended claims, the term "substantially" as used in this respect means that a small portion of the substrate is likely to be exposed to multiple reactive gases simultaneously due to diffusion, and that the simultaneous exposure is not intentional, as will be appreciated by those skilled in the art.

In one aspect of a time-domain ALD process, a first reactant gas (i.e., a first precursor or compound a) is pulsed into a reaction zone followed by a first time delay. Subsequently, a second precursor or compound B is pulsed into the reaction zone followed by a second delay. During each time delay, a purge gas, such as argon, is introduced into the processing chamber to purge the reaction zone or otherwise remove any residual reaction compounds or byproducts of the reaction zone. Alternatively, the purge gas may be flowed continuously throughout the deposition process such that only the purge gas flows during the time delay between pulses of the reactive compounds. The reactive compound is alternately pulsed until a desired film or film thickness is formed on the substrate surface. In either case, the ALD process pulsing compound a, purge gas, compound B, and purge gas is one cycle. The cycle can start with either compound a or compound B and continue the respective sequence of cycles until a film of the desired thickness is achieved.

In one aspect of a spatial ALD process, a first reactant gas and a second reactant gas (e.g., hydrogen radicals) are delivered to a reaction zone simultaneously, but separated by a curtain of inert gas and/or a vacuum curtain. The substrate is moved relative to the gas delivery device such that any given point on the substrate is exposed to the first reactive gas and the second reactive gas.

One or more embodiments of the present disclosure are directed to methods of depositing conformal amorphous silicon thin films as one or more of a glue layer, fluorine diffusion barrier, and/or nucleation layer for metal ALD (e.g., tungsten deposition). Although tungsten deposition is mentioned in many embodiments, one skilled in the art will appreciate that other metals (e.g., molybdenum) may be deposited by the disclosed processes. The present disclosure is not limited to ALD tungsten deposition.

Certain embodiments of the present disclosure include a process integration scheme for metal ALD processes. For example, tungsten can be deposited on a silicon substrate by atomic layer deposition. Referring to FIG. 1, a stack 10 may include a substrate 12 (e.g., SiO)₂) And has a glue layer 14 (e.g., TiN), a nucleation layer 16 (e.g., WSi)_xAnd WB_x) And a metal 18 (e.g., tungsten). In one or more embodiments of the process scheme, the nucleation layer is replaced with an amorphous silicon layer. In some embodiments, the nucleation layer is replaced with an amorphous silicon layer and the TiN glue layer is made thinner. In one or more embodiments, both the nucleation layer and the glue layer are replaced with an amorphous silicon layer.

Referring to fig. 2A and 2B, one or more embodiments of the present disclosure are a directed processing method 300 and a film stack 200. In step 310, a substrate 220 having a substrate surface 222 is provided. In step 320, substrate 220 is exposed to a silicon precursor to form an amorphous silicon layer 240 on substrate surface 222.

In some embodiments, amorphous silicon (a-Si) formation may be achieved by maximizing the partial pressure of the silicon precursor while minimizing the wafer temperature. Suitable silicon precursors include, but are not limited to, polysilane (Si)_xH_y). For example, polysilanes include disilane (Si)₂H₆) Trisilane (Si)₃H₈) Butyl silane (Si)₄H₁₀) Iso-butylsilane, neopentasilane (Si)₅H₁₂) Cyclopentasilane (Si)₅H₁₀) Hexane silane (C)₆H₁₄) Cyclohexasilane (Si)₆H₁₂) Or is usually Si_xH_yWherein x is 2 or greater than 2, and combinations thereof. For example, disilane having a medium processing temperature and a high vapor pressure may be used alone as the silicon precursor or in combination with other components.

In some embodiments, the silicon precursor comprises substantially only disilane. As used in this specification and the appended claims, the expression "substantially only disilane" means that at least 95% of the active component is disilane. Any number of other gases such as carrier gases and inert gases may be included.

The thickness of the amorphous silicon layer 240 may vary depending on, for example, the substrate surface and subsequent films and processes. In some embodiments, amorphous silicon layer 240 has a thickness of aboutTo aboutA thickness within the range. In one or more embodiments, amorphous silicon layer 240 has a thickness of aboutTo about 50, or in the range of aboutTo aboutWithin, or at aboutTo aboutA thickness within the range. In some embodiments, the thickness of the amorphous silicon layer 240 is greater thanAnd less than or equal to aboutOr

In step 330, a metal layer 280 is formed on the amorphous silicon layer 240. Metal layer 280 may be formed by any suitable technique including, but not limited to, Atomic Layer Deposition (ALD), plasma-enhanced atomic layer deposition (PE-ALD), Chemical Vapor Deposition (CVD), plasma-enhanced chemical vapor deposition (PE-CVD), and Physical Vapor Deposition (PVD).

Metal layer 280 may comprise any suitable metal. In some embodiments, metal layer 280 comprises one or more of tungsten or molybdenum. In some embodiments, metal layer 280 consists essentially of tungsten. In some embodiments, metal layer 280 consists essentially of molybdenum. As used in this regard, "consisting essentially of … …" means that the atomic percent of the specified composition of metal layer 280 is greater than or equal to about 80, 85, 90, or 95. For example, the metal layer 280 consisting essentially of tungsten has a composition of greater than or equal to about, e.g., 90 atomic percent tungsten.

In some embodiments, metal layer 280 is deposited by CVD. The metal precursors and reactants may be co-flowed (coflowed) into the processing chamber to deposit a layer on the substrate. The precursor and reactant are allowed to react in the gas phase.

In some embodiments, the metal layer 280 is deposited by ALD. In some embodiments, metal layer 280 is deposited by successively exposing amorphous silicon layer 240 to metal precursors and reactants.

The metal precursor may be any suitable precursor that may be used to deposit a metal film. In some embodiments, the metal precursor comprises a metal selected from tungsten, molybdenum, and combinations thereof. In one or more embodiments, the metal precursor includes WF₆And MoF₆One or more of (a). In some embodiments, the metal precursor is a fluorine-containing precursor. Fluorine is known to etch silicon surfaces. Some embodiments of the present disclosure advantageously allow for the use of fluorine precursors, as amorphous silicon layer 240 may be formed thick enough to ensure that the precursors do not remove all of the a-Si film.

The reactant can be any suitable reactant that can react with the component formed on the surface. For example, if WF₆Is used as a precursor, then there will be-WF on the surface_xAnd (4) components. The reactants being capable of reacting with-WF_xThe components react to produce a W film。

Fig. 3 illustrates a process flow of another embodiment of the present disclosure, wherein a degassing process 325 is included after forming the amorphous silicon layer 240. In some embodiments, prior to forming the metal layer 280, the amorphous silicon layer 240 is exposed to a degassing environment to remove the outgassed components.

The deposited amorphous silicon layer 240 may evolve or out-gas a composition such as hydrogen. The degassing environment provides an opportunity for evolution of the gaseous components, thus minimizing blistering of the final film. The degassing environment may include any condition that allows or facilitates degassing of the membrane. For example, the degassing environment may consist essentially of an inert gas. As used in this regard, "consisting essentially of … …" means that there are no gaseous components that interfere with outgassing of the deposited film. Other reactive components may be present without inhibiting film outgassing while still consisting essentially of inert gases.

Suitable inert gases include, but are not limited to, one or more of argon, helium, nitrogen, and/or mixtures thereof.

In one or more embodiments, the components that are outgassed include hydrogen, SiH₂、SiH₃、SiH₄And/or other low order silanes.

The pressure in the process chamber or a region of the process chamber may be independently controlled for precursor exposure and degas environments. In some embodiments, the exposure to each silicon precursor and the outgassing environment occurs at a pressure in a range from about 10 mtorr to about 100 torr. In some embodiments, the silicon precursor is exposed to the substrate at a pressure of greater than or equal to about 500 mtorr, or greater than or equal to about 1 torr, or greater than or equal to about 5 torr, or greater than or equal to about 10 torr, or greater than or equal to about 20 torr, or greater than or equal to about 30 torr.

The temperature at which the substrate surface is exposed to the precursor or the degas environment may vary depending on, for example, the thermal budget of the device and precursor to be formed-in some embodiments, exposure to each of the precursor and the degas environment occurs at a temperature in a range of about 100 ℃ to about 700 ℃. In one or more embodiments, the silicon halide precursor is exposed to the substrate at a temperature in a range of about 250 ℃ to about 600 ℃, or in a range of about 400 ℃ to about 550 ℃.

The thickness of the a-Si film formed with the silicon precursor prior to exposure to the outgassing environment may be modified. In some embodiments, each exposure to the silicon precursor and the outgassing environment grows to a thickness of aboutTo aboutWithin the range of the membrane.

The precursor and the outgassing ambient may be repeatedly exposed to the substrate surface continuously to form a film having a predetermined thickness. In some embodiments, the total thickness of the amorphous silicon film is aboutTo about 1 μm.

In some embodiments, the a-Si is deposited by disilane at a wafer temperature less than about 450 ℃ and a disilane partial pressure greater than or equal to about 20 torr. In an exemplary embodiment, the substrate is exposed to the silicon precursor at a pressure greater than or equal to about 20 torr, at a temperature in a range of about 400 ℃ to about 550 ℃.

Referring to fig. 4A and 4B, some embodiments of the present disclosure further include step 360 in which a glue layer 260 is deposited on the substrate before forming the amorphous silicon layer 240. The glue layer 260 is a layer that can make amorphous silicon stick to it with less likelihood of peeling than if the amorphous silicon layer were deposited directly on the substrate 220. In some embodiments, the glue layer comprises TiN. In one or more embodiments, the substrate 220 has a silicon oxide surface and the glue layer comprises TiN.

The thickness of the glue layer 260 may vary depending on the thickness of the substrate and the amorphous silicon to be deposited. In some embodiments, the glue layer 260 has a thickness of between aboutTo aboutWithin, or at aboutTo aboutA thickness within the range. In some embodiments, the glue layer 260 has a thickness of less than or equal to aboutOr less than or equal to aboutOr less than or equal to aboutOr less than or equal to aboutIs measured.

Referring to fig. 4B, one or more embodiments of the present disclosure are directed to a stack 200 including a substrate 220 having an oxide surface 222. A glue layer 260 is on the oxide surface 222. Some embodiments of the bonding layer include a thickness of aboutTo aboutTiN within the range. The amorphous silicon layer 240 is on the glue layer 260 and has a thickness of aboutTo aboutA thickness within the range. The metal layer 280 is on the amorphous silicon layer 240 and includes one or more of tungsten and molybdenum.

One or more embodiments of the present disclosure are directed to methods of depositing conformal, doped amorphous silicon thin films as one or more of a glue layer, a fluorine diffusion barrier layer, and/or a nucleation layer for metal deposition (e.g., ALD tungsten deposition). Although tungsten deposition is mentioned in many embodiments, one skilled in the art will appreciate that other metals (e.g., molybdenum) may be deposited by the disclosed processes. The present disclosure is not limited to ALD tungsten deposition, ALD deposition, or tungsten deposition.

Embodiments of the present disclosure include a process integration scheme for metal ALD processes. For example, tungsten can be deposited on a silicon substrate by atomic layer deposition. Referring to FIG. 5, the stack 10 may include a substrate 12 (e.g., SiO)₂) And has a glue layer 14 (e.g., TiN), a nucleation layer 16 (e.g., WSi)_xAnd WB_x) And a metal 18 (e.g., tungsten). In one or more embodiments of the process scheme, the nucleation layer is replaced with a doped amorphous silicon layer. In some embodiments, the nucleation layer is replaced with a doped amorphous silicon layer and the TiN glue layer is made thinner. In one or more embodiments, both the nucleation layer and the glue layer are replaced with a doped amorphous silicon layer.

Referring to fig. 6A and 6B, one or more embodiments of the present disclosure are directed to a processing method 500 and a film stack 400. In step 510, a substrate 420 having a substrate surface 422 is provided. In step 520, the substrate 420 is exposed to a silicon precursor and a dopant to form a doped amorphous silicon layer 440 on the substrate surface 422.

Some embodiments of the present disclosure advantageously provide methods of reducing the deposition temperature of the nucleation layer by incorporating dopants. In some embodiments, the morphology of the nucleation layer is modified by adding dopants during deposition of the conformal amorphous silicon layer. In some embodiments, the deposition temperature of the amorphous silicon may be reduced from greater than or equal to about 400 ℃ to less than or equal to about 100 ℃ or less than 100 ℃. In some embodiments, tungsten film properties can be advantageously modified by varying dopant concentrations due to different film properties/morphologies of doped silicon films compared to undoped amorphous silicon films.

In some embodiments, doped amorphous silicon (doped a-Si) formation may be achieved by maximizing the partial pressure of the silicon precursor while minimizing the wafer temperature. In some embodiments, the doped amorphous silicon is deposited using a CVD deposition process in which a silicon precursor and a dopant are simultaneously exposed to the substrate.

Suitable silicon precursors include, but are not limited to, polysilane (Si)_zH_a) And halosilanes (Si)_zH_aX_b). Polysilanes include, for example, silane, disilane (Si)₂H₆) Trisilane (Si)₃H₈) Butyl silane (Si)₄H₁₀) Iso-butylsilane, neopentasilane (Si)₅H₁₂) Cyclopentasilane (Si)₅H₁₀) Hexane silane (C)₆H₁₄) Cyclohexasilane (Si)₆H₁₂) Or is usually Si_zH_aWherein z is 1 or greater than 1, and combinations thereof. For example, disilane having a medium processing temperature and a high vapor pressure may be used alone as the silicon precursor or in combination with other components.

For example, halosilanes include dihalosilanes (SiH)₂X₂) Trihalosilane (SiHX)₃) Tetrahalosilane (SiX)₄) Or a hexahalosilane (Si)₂X₆) Or is usually Si_zH_aX_bWherein z is 1 or greater than 1, X is halogen, and b is 1 or greater than 1, and combinations thereof. In some embodiments, the halogen present in the halosilane is independently selected from fluorine, chlorine, bromine, or iodine. In some embodiments, the halogen consists essentially of chlorine.

In some embodiments, the silicon precursor comprises substantially only disilane. In some embodiments, the silicon precursor comprises substantially only dichlorosilane. As used in this specification and the appended claims, the expression "substantially only" means that at least 95% of the active ingredient is the recited ingredient. Any number of other gases such as carrier gases and inert gases may be included.

The dopant may be any material suitable for doping a deposited amorphous silicon layer. In some embodiments, the doped amorphous silicon layer comprises one or more of boron, phosphorus, arsenic, or germanium. In some embodiments, the dopant includes one or more of borane, diborane, phosphine, diphosphane, arsine, germane, or digermane. In some embodiments, the dopant comprises substantially only diborane. In some embodiments, the dopant comprises substantially only diphosphane. In some embodiments, the dopant comprises substantially only arsine. In some embodiments, the dopant comprises substantially only digermane.

The thickness of the doped amorphous silicon layer 440 may vary depending on, for example, the substrate surface and subsequent films and processes. In some embodiments, the thickness of the doped amorphous silicon layer 440 is greater than or equal to aboutIn one or more embodiments, the doped amorphous silicon layer 440 is about thickTo aboutWithin a range of, or at aboutTo aboutWithin a range of, or at aboutAboutWithin a range of, or at aboutTo about Within the range. In some embodiments, the doped amorphous silicon layer 440 has a thickness of aboutTo aboutA thickness within the range. In some embodiments, the thickness of the doped amorphous silicon layer 440 is greater than that of the doped amorphous silicon layerAnd less than or equal to aboutOrIn some embodiments, the doped amorphous silicon layer 440 has a minimum thickness sufficient to form a continuous layer. As used herein, the term "continuous" refers to a layer that covers the entire exposed surface without gaps or bare spots of material exposed below the deposited layer. The continuous layer may have gaps or bare spots having a surface area of less than about 1% of the total surface area of the film.

In some embodiments, the doped amorphous silicon layer 440 is conformally formed on the substrate 420. As used herein, the term "conformal" or "conformally" refers to a layer that adheres to and uniformly covers an exposed surface and has a thickness that differs by less than 1% relative to the average thickness of the film. For example, a thickness ofShould be less thanThis thickness difference includes the edges, corners, sides and bottom of the groove. For example, conformal layers deposited in various embodiments of the present disclosure should provide a substantially uniform thickness across complex surfacesCoverage over the deposition area.

In step 530, a metal layer 480 is formed on the doped amorphous silicon layer 440. The metal layer 480 may be formed by any suitable technique, including but not limited to Atomic Layer Deposition (ALD), plasma-enhanced atomic layer deposition (PE-ALD), Chemical Vapor Deposition (CVD), plasma-enhanced chemical vapor deposition (PE-CVD), and Physical Vapor Deposition (PVD).

Metal layer 480 may comprise any suitable metal. In some embodiments, the metal layer 480 comprises one or more of tungsten or molybdenum. In some embodiments, the metal layer 480 consists essentially of tungsten. In some embodiments, the metal layer 480 consists essentially of molybdenum. As used in this regard, "consisting essentially of … …" means that the atomic percent of the specified composition of the metal layer 480 is greater than or equal to about 80, 85, 90, or 95. For example, the metal layer 480 consisting essentially of tungsten has a composition of greater than or equal to about, e.g., 90 atomic percent tungsten.

In some embodiments, metal layer 480 is deposited by CVD. The metal precursor and the reactant may be co-flowed into the processing chamber to deposit a layer on the substrate. The precursor and reactant are allowed to react in the gas phase.

In some embodiments, metal layer 480 is deposited by ALD. In some embodiments, the metal layer 480 is deposited by successively exposing the doped amorphous silicon layer 440 to metal precursors and reactants.

The metal precursor may be any suitable precursor that may be used to deposit a metal film. In some embodiments, the metal precursor comprises a metal selected from tungsten, molybdenum, and combinations thereof. In one or more embodiments, the metal precursor includes WF₆And MoF₆One or more of (a). In some embodiments, the metal precursor is a fluorine-containing precursor. Fluorine is known to etch silicon surfaces. Some embodiments of the present disclosure advantageously allow for the use of fluorine precursors, as the doped amorphous silicon layer 240 may be formed thick enough to ensure that the precursors do not remove all of the doped amorphous silicon film.

The reactants may be reactive with components formed on the surfaceAny suitable reactants. For example, in an ALD process, if WF₆Is used as a precursor, then there will be-WF on the surface_xAnd (4) components. The reactants being capable of reacting with-WF_xThe components react to produce a tungsten film.

Fig. 7 illustrates a process flow of another embodiment of the present disclosure, wherein the degassing process 125 is included after forming the doped amorphous silicon layer 440. In some embodiments, prior to forming the metal layer 480, the doped amorphous silicon layer 440 is exposed to a degas environment to remove the outgassed components.

The deposited doped amorphous silicon layer 440 may evolve or out-gas a composition such as hydrogen. The degassing environment provides an opportunity for evolution of the gaseous components, thus minimizing blistering of the final film. The degassing environment may include any condition that allows or facilitates degassing of the membrane. For example, the degassing environment may consist essentially of an inert gas. As used in this regard, "consisting essentially of … …" means that there are no gaseous components that interfere with outgassing of the deposited film. Other reactive components may be present without inhibiting film outgassing while still consisting essentially of inert gases.

Suitable inert gases include, but are not limited to, one or more of argon, helium, nitrogen, and/or mixtures thereof.

In one or more embodiments, the components that are outgassed include hydrogen, SiH₂、SiH₃、SiH₄And/or other low order silanes.

The pressure in the process chamber or a region of the process chamber may be independently controlled for precursor exposure and degas environments. In some embodiments, the exposure to each silicon precursor, dopant, and outgassing environment occurs at a pressure in a range from about 100 mtorr to about 600 torr. In some embodiments, the silicon precursor and/or dopant is exposed to the substrate at a pressure of greater than or equal to about 500 mtorr, or greater than or equal to about 1 torr, or greater than or equal to about 5 torr, or greater than or equal to about 10 torr, or greater than or equal to about 20 torr, or greater than or equal to about 30 torr.

The temperature at which the substrate surface is exposed to the silicon precursor, dopant, and/or outgassing environment may vary depending on, for example, the thermal budget of the device and silicon precursor and/or dopant to be formed. In some embodiments, the exposure to each of the silicon precursor, dopant, and/or outgassing environment occurs at a temperature in a range from about 25 ℃ to about 700 ℃. In one or more embodiments, the doped amorphous silicon layer 440 is formed at a temperature in the range of about 25 ℃ to about 700 ℃, or in the range of about 50 ℃ to about 600 ℃, or in the range of about 100 ℃ to about 550 ℃. In some embodiments, the doped amorphous silicon layer 440 is formed at a temperature greater than or equal to about 25 ℃ and less than or equal to about 550 ℃, less than or equal to about 400 ℃, less than or equal to about 250 ℃, less than or equal to about 200 ℃, or less than or equal to about 100 ℃.

The thickness of the doped amorphous silicon layer 440 formed with the silicon precursor and dopant prior to exposure to the outgassing environment may be modified. In some embodiments, each exposure to the silicon precursor, dopant, and outgassing environment grows to a thickness of aboutTo aboutOr aboutTo aboutOr aboutTo about Within the range of the membrane.

The precursor, dopant, and outgassing environment may be repeatedly exposed to the substrate surface in succession to form a film having a predetermined thickness. In some embodiments, of amorphous silicon filmTotal thickness of aboutTo about 1 μm.

Referring to fig. 8A and 8B, some embodiments of the present disclosure further include step 560, in which a glue layer 460 is deposited on the substrate before forming the doped amorphous silicon layer 440. The glue layer 460 is a layer that allows the doped amorphous silicon to adhere to it with less likelihood of flaking than if the doped amorphous silicon layer were deposited directly on the substrate 420. In some embodiments, the glue layer comprises TiN. In one or more embodiments, the substrate 420 has a silicon oxide surface and the glue layer includes TiN.

The thickness of the glue layer 460 may vary depending on the thickness of the substrate and the doped amorphous silicon to be deposited. In some embodiments, the glue layer 460 has a thickness of between aboutTo aboutWithin, or at aboutTo aboutA thickness within the range. In some embodiments, the glue layer 460 has a thickness of less than or equal to aboutOr less than or equal to aboutOr less than or equal to aboutOr less than or equal to aboutIs measured.

Referring to fig. 8B, one or more embodiments of the present disclosure are directed to a stack 400 including a substrate 420 having an oxide surface 422. A glue layer 460 is on the oxide surface 422. Some embodiments of the bonding layer include a thickness of aboutTo aboutTiN within the range. The doped amorphous silicon layer 440 is on the glue layer 460 and has a thickness of aboutTo aboutA thickness within the range. The metal layer 480 is on the doped amorphous silicon layer 440 and includes one or more of tungsten and molybdenum.

One or more embodiments of the present disclosure are directed to methods of depositing a metal layer including one or more of boron or silicon as one or more of a glue layer, a fluorine diffusion barrier layer, and/or a nucleation layer on a thin film without the use of a barrier layer. Although deposition of tungsten metal is mentioned in many embodiments, one skilled in the art will appreciate that other metals (e.g., molybdenum) may be deposited by the disclosed process. Additionally, the present disclosure is not limited to metal deposition by ALD deposition or tungsten deposition.

Some embodiments of the present disclosure advantageously provide methods of depositing a metal layer on a substrate surface that are substantially free of a barrier layer. The relative absence of a barrier layer allows the formation of metal lines or structures having a relatively lower resistivity than similar structures containing a barrier layer. Without being bound by theory, it is believed that the absence of a barrier layer allows for a greater volume of metal deposition in the same volume, and thus a lower resistivity of the metal body. In some embodiments, the metal layer is deposited as part of a metal stack. In some embodiments, the nucleation layer is formed directly on the substrate surface without a barrier layer. In some embodiments, the nucleation layer comprises one or more of silicon or boron.

The skilled artisan will recognize that the fluorine-containing compound will etch certain surfaces (e.g., silicon surfaces). Some embodiments of the present disclosure advantageously allow for the use of metal-fluorine-containing precursors without a barrier layer. Without being bound by theory, it is believed that the nucleation layer 830 may be formed to a sufficient thickness to ensure that the metal precursor does not remove the entire nucleation layer and etch or otherwise damage the substrate surface.

In some embodiments, the metal precursor exposed to the nucleation layer includes substantially no fluorine. Without being bound by theory, it is believed that by using a fluorine-free metal precursor, fluorine attack on the substrate surface may be minimized or eliminated.

Referring to fig. 9A and 9B, one or more embodiments of the present disclosure are directed to a process 700 for forming a film stack 800. At 710, a substrate 820 having a substrate surface 822 is exposed to a nucleation precursor to form a nucleation layer 830. In some embodiments, the nucleation layer 830 is formed by thermal decomposition of a nucleation precursor.

In some embodiments, substrate 820 includes a dielectric. In some embodiments, substrate 820 comprises one or more of silica or alumina. In some embodiments, substrate 820 consists essentially of silicon oxide or aluminum oxide. As used in this regard, "consisting essentially of … …" means that the substrate comprises greater than 95%, 98%, 99%, or 99.5% of the material on an atomic basis. The skilled artisan will recognize that the terms "silica" and "alumina" do not convey any particular atomic ratio. These materials may or may not be stoichiometric.

In some embodiments, the substrate surface 822 is substantially free of a barrier layer. As used in this regard, "substantially free of a barrier layer" means that less than 5%, 2%, 1%, or 0.5% of the substrate surface includes a barrier layer. In some embodiments, the substrate surface 822 is substantially free of barrier layers comprising one or more of TiN, TaN, SiN, TiSiN, or SiCN.

In some embodiments, the nucleation precursor comprises a boron precursor and the nucleation layer is a boron layer. In some embodiments, the nucleation precursor consists essentially of the boron precursor. In some embodiments, the boron layer is an amorphous boron layer.

Suitable boron precursors include, but are not limited to, boranes, alkyl boranes, and haloboranes. In some embodiments, the boron precursor comprises a compound of formula B_cH_dX_eR_fWherein each X is a halogen independently selected from F, Cl, Br, and I, each R is an independently selected C1-C4 alkyl group, C is any integer greater than or equal to 2, each of d, e, and F is less than or equal to C +2, and d + e + F is equal to C + 2.

In some embodiments, the nucleation precursor comprises a silicon precursor and the nucleation layer is a silicon layer. In some embodiments, the nucleation precursor consists essentially of the silicon precursor. In some embodiments, the silicon layer is an amorphous silicon layer.

Suitable silicon precursors include, but are not limited to, polysilanes and halosilanes. In some embodiments, the silicon precursor comprises silicon of the formula Si_gH_hX_iWherein each X is a halogen independently selected from F, Cl, Br, and I, g is any integer greater than or equal to 1, h and I are both less than or equal to 2g +2, and h + I is equal to 2g + 2.

In some embodiments, the nucleation precursor comprises a silicon precursor and a boron precursor and the nucleation layer comprises silicon and boron. In some embodiments, the nucleation layer is amorphous. In some embodiments, the amorphous layer comprises no more than 5 atomic percent silicon. In some embodiments, the amorphous layer comprises no more than 5 atomic percent boron.

The thickness of the nucleation layer 830 may vary depending on, for example, the substrate surface 822 and subsequent films and processes. In some embodiments, the nucleation layer 830 has a thickness of greater than or equal to aboutIs measured. In one or more embodiments, the nucleation layer 830 has a thickness of aboutTo aboutWithin, or at aboutTo about Within, or at aboutTo aboutWithin, or at aboutTo aboutA thickness within the range. In some embodiments, the nucleation layer 830 has a thickness of aboutTo aboutA thickness within the range. In some embodiments, the nucleation layer 830 is thicker thanAnd less than or equal to about Or

In some embodiments, the nucleation layer 830 has a minimum thickness sufficient to form a continuous layer. As used herein, the term "continuous" refers to a layer that covers the entire exposed surface without gaps or bare spots of material exposed below the deposited layer. The continuous layer may have gaps or bare spots having a surface area of less than about 1% of the total surface area of the film.

In some embodiments, the nucleation layer 830 is formed conformally on the substrate surface 822. As used herein, the term "conformal" or "conformally" refers to a layer that adheres to and uniformly covers an exposed surface and has a thickness that differs by less than 1% relative to the average thickness of the film. For example, a thickness ofShould be less thanThis thickness difference includes the edges, corners, sides and bottom of the groove. For example, conformal layers deposited in various embodiments of the present disclosure should provide coverage over deposition areas of substantially uniform thickness over complex surfaces.

At 720, the nucleation layer 830 is exposed to a first metal precursor to form a first metal layer 840. The first metal precursor includes a first metal. In some embodiments, the forming of the first metal layer is performed by converting the nucleation layer to the first metal layer. In some embodiments, the conversion process includes replacing atoms of the nucleation layer with atoms of the first metal. In some embodiments, H is added with the first metal precursor₂As a co-reactant.

The first metal may be any suitable metal. In some embodiments, the first metal comprises tungsten or molybdenum. In thatIn some embodiments, the first metal precursor includes one or more ligands selected from halides, carbonyls, or cyclopentadienes. In some embodiments, the first metal precursor comprises or consists essentially of one or more of: WF₆、WCl₆、WCl₅、W(CO)₅、MoF₆、MoCl₅Or Mo (CO)₆. In some embodiments, the first metal precursor consists essentially of W (CO)₅And (4) forming. As used in this regard, "consisting essentially of … …" means that the first metal precursor includes greater than 95%, 98%, 99%, or 99.5% of the component.

In some embodiments, the first metal precursor includes substantially no fluorine. As used in this regard, "substantially free of fluorine" means that the first metal precursor includes less than 2%, 1%, 0.5%, or 0.1% fluorine atoms on an atomic basis.

At 730, a second metal layer 850 is formed on the first metal layer 840 by exposing the substrate 820 to a second metal precursor. The second metal precursor includes a second metal. The second metal may be any suitable metal. In some embodiments, the second metal comprises tungsten or molybdenum. In some embodiments, second metal layer 850 consists essentially of tungsten. In some embodiments, second metal layer 850 consists essentially of molybdenum. As used in this regard, "consisting essentially of … …" means that second metal layer 850 includes greater than 95%, 98%, 99%, or 99.5% of the specified element on an atomic basis. In some embodiments, the first metal precursor and the second metal precursor comprise the same metal. In some embodiments, the first metal precursor and the second metal precursor comprise different metals.

In some embodiments, the second metal precursor includes one or more ligands selected from halides, carbonyls, or cyclopentadienes. In some embodiments, the second metal precursor comprises or consists essentially of one or more of: WF₆、WCl₆、WCl₅、W(CO)₅、MoF₆、MoCl₅Or Mo (CO)₆. In some embodiments, the second metal precursor consists essentially of W (CO)₅And (4) forming. As used in this regard, "consisting essentially of … …" means that the first metal precursor includes greater than 95%, 98%, 99%, or 99.5% of the component.

Second metal layer 850 may be formed by any suitable technique, including but not limited to Atomic Layer Deposition (ALD), plasma-enhanced atomic layer deposition (PE-ALD), Chemical Vapor Deposition (CVD), plasma-enhanced chemical vapor deposition (PE-CVD), and Physical Vapor Deposition (PVD).

In some embodiments, second metal layer 850 is formed by CVD. The second metal precursor and the reactant may be co-flowed into the processing chamber to deposit a second metal layer 850 on the substrate 820. The second metal precursor and the reactant are allowed to react in the gas phase.

In some embodiments, second metal layer 850 is deposited by ALD. In some embodiments, the second metal layer is formed by separately exposing the substrate surface to a second tungsten precursor and a reactant.

The reactant can be any suitable reactant that can react with the component formed on the surface. For example, in an ALD process, if WF₆Is used as a precursor, then there will be-WF on the surface_xAnd (4) components. The reactants being capable of reacting with-WF_xThe components react to produce a tungsten film. In some embodiments, the reactant comprises hydrogen (H)₂) Or nitrogen (N)₂)。

In some embodiments, an inert gas may be added to the process chamber during processing. In some embodiments, an inert gas is added during the formation of the first metal film 840. In some embodiments, an inert gas is added during the formation of the second metal film 850. The inert gas may be co-flowed with the first or second metal precursor or may be separately flowed into the processing chamber. In some embodiments, the inert gas comprises argon, helium, or nitrogen (N)₂) One or more of (a).

The temperature at which the substrate surface is exposed to the nucleation precursor, the first metal precursor, and/or the second metal precursor may vary depending on, for example, the device to be formed and the thermal budget of the selected precursor. In some embodiments, the exposure to each precursor occurs at a temperature in a range from about 25 ℃ to about 700 ℃. In one or more embodiments, the substrate is exposed at a temperature in the range of about 25 ℃ to about 700 ℃, or in the range of about 50 ℃ to about 600 ℃, or in the range of about 100 ℃ to about 550 ℃. In some embodiments, the substrate is exposed at a temperature greater than or equal to about 25 ℃ and less than or equal to about 550 ℃, less than or equal to about 400 ℃, less than or equal to about 250 ℃, less than or equal to about 200 ℃, or less than or equal to about 100 ℃. In some embodiments, the nucleation layer 830 and the first metal film 840 are formed at a temperature in the range of about 300 ℃ to about 550 ℃, while the second metal film is formed at a temperature in the range of about 200 ℃ to about 550 ℃.

The pressure at which the substrate surface is exposed to the nucleation precursor, the first metal precursor, and/or the second metal precursor may vary depending on, for example, the selected precursors and other process conditions. In some embodiments, the exposure to each precursor occurs at a pressure in a range from about 0.01 torr to about 100 torr. In one or more embodiments, the substrate is exposed to a pressure in a range from about 0.01 torr to about 100 torr, or in a range from about 0.1 torr to about 80 torr, or in a range from about 1 torr to about 60 torr. In some embodiments, the substrate is exposed at a pressure greater than or equal to about 1 torr and less than or equal to about 100 torr, less than or equal to about 80 torr, less than or equal to about 60 torr, less than or equal to about 40 torr, or less than or equal to about 25 torr. In some embodiments, the substrate is exposed at a pressure in a range from about 4 torr to about 100 torr.

One or more embodiments of the present disclosure are directed to methods of depositing high quality a-Si layers with lower hydrogen content. In some embodiments, the a-Si layer is deposited at a relatively high pressure and a relatively high temperature. In some embodiments, the deposition occurs at a pressure of greater than or equal to about 200 torr, greater than or equal to about 225 torr, greater than or equal to about 250 torr, greater than or equal to about 275 torr, greater than or equal to about 300 torr, greater than or equal to about 325 torr, or greater than or equal to about 350 torr. In some embodiments, the substrate surface is maintained at a temperature of greater than or equal to about 450 ℃, greater than or equal to about 475 ℃, greater than or equal to about 500 ℃, greater than or equal to about 525 ℃, or greater than or equal to about 550 ℃.

The quality of the amorphous silicon film was determined from the hydrogen content of the film, as measured by Rutherford Backscattering Spectrometry (RBS). In some embodiments, the hydrogen content of the a-Si layer is less than or equal to 6 atomic percent, less than or equal to 5 atomic percent, less than or equal to 4 atomic percent, less than or equal to 3 atomic percent, less than or equal to 2 atomic percent, less than or equal to 1 atomic percent, or less than or equal to 0.5 atomic percent.

According to some embodiments, the nucleation layer (i.e., high quality amorphous silicon film) is converted to a metal (e.g., tungsten) film at low temperature to provide a film with less fluorine penetration (i.e., fluorine content) to reduce film peeling and reduce film resistivity. In some embodiments, the nucleation layer is exposed to the first metal precursor at a temperature of less than or equal to about 450 ℃, less than or equal to about 425 ℃, less than or equal to about 400 ℃, less than or equal to about 375 ℃, or less than or equal to about 350 ℃. In some embodiments, the nucleation layer is exposed to the first metal precursor at a temperature of greater than or equal to about 250 ℃, greater than or equal to about 275 ℃, greater than or equal to about 300 ℃, greater than or equal to about 325 ℃, or greater than or equal to about 350 ℃. In some embodiments, the nucleation layer is exposed to the first metal precursor at a temperature in a range of about 250 ℃ to about 450 ℃, or in a range of about 275 ℃ to about 425 ℃, or in a range of about 300 ℃ to about 400 ℃.

Without being bound by theory, it is believed that the relatively low fluorine penetration of some embodiments provides better film adhesion (e.g., less film peeling) and lower resistivity for the final first metal film. In some embodiments, the final first metal film has a fluorine concentration of less than or equal to about 1x10²¹Atom/cm³Less than or equal to about 7.5x10²⁰Atom/cm³Or less than or equal to about 5x10²⁰Atom/cm³Or less than or equal to about 2.5x10²⁰Atom/cm³Or less than or equal to about 1x10²⁰Atom/cm³. In some embodiments, the resistivity of the final first metal film having a thickness of about 20nm is less than or equal to about 20 μ Ω -cm, less than or equal to about 19 μ Ω -cm, less than or equal to about 18 μ Ω -cm, less than or equal to about 17 μ Ω -cm, less than or equal to about 16 μ Ω -cm, or less than or equal to about 15 μ Ω -cm.

One or more embodiments of the present disclosure are directed to methods of depositing low fluorine tungsten bulk films by atomic layer deposition and having a relatively large tungsten grain size (grain size) as measured by X-ray diffraction (XRD). In some embodiments, the deposition of the low-fluorine bulk tungsten is performed by atomic layer deposition while maintaining the substrate at a temperature of greater than or equal to about 450 ℃, greater than or equal to about 475 ℃, greater than or equal to about 500 ℃, or greater than or equal to about 525 ℃.

The inventors have found that the grain size of low fluorine bulk tungsten films is directly proportional to the temperature at which the film is deposited. For example, higher deposition temperatures will form films with higher grain sizes. Without being bound by theory, it is believed that the smaller tungsten particles cause electron scattering. In some embodiments, the low-fluorine bulk tungsten has an average grain size of greater than or equal to aboutGreater than or equal to aboutGreater than or equal to aboutGreater than or equal to aboutGreater than or equal to aboutGreater than or equal to aboutOr greater than or equal toIs equal to aboutOr greater than or equal to aboutThe low fluorine bulk tungsten film formed at low temperature (i.e., 300 ℃ to 400 ℃) has a grain size of less than

The inventors have discovered that the resistivity of a low-fluorine bulk tungsten film increases by greater than or equal to about 0.5 μ Ω -cm, greater than or equal to about 0.75 μ Ω -cm, or greater than or equal to about 1.0 μ Ω -cm per 10 ℃ drop in temperature below 500 ℃ when performing deposition of the low-fluorine bulk tungsten. For example, if a low fluorine bulk tungsten film deposited at 500 ℃ has a resistivity of 15 μ Ω -cm, a similar film deposited at 480 ℃ may have a resistivity greater than or equal to 17 μ Ω -cm.

According to one or more embodiments, the substrate is subjected to a treatment before and/or after the treatment according to the present disclosure, which treatment may be performed in the same chamber or in one or more separate treatment chambers. In some embodiments, the substrate is moved from the first chamber to a separate second chamber for further processing. The substrate may be moved directly from the first chamber to the separate processing chamber, or it may be moved from the first chamber to one or more transfer chambers and then moved to the separate processing chamber. Thus, the processing device may comprise a plurality of chambers in communication with the transfer station. Such a device may be referred to as a "cluster tool" or a "cluster system" or similar device.

In general, a cluster tool is a modular system comprising multiple chambers that perform various functions including substrate center finding and orientation, outgassing, annealing, deposition, and/or etching. According to one or more embodiments, the cluster tool includes at least a first chamber and a central transfer chamber. The central transfer chamber may house a robot that may shuttle between or within the process chamber and the load lock chamberAnd (5) conveying the substrate. The transfer chamber is typically maintained under vacuum conditions and intermediate stages are provided for shuttling substrates from one chamber to another and/or to a load lock chamber located at the front end of the cluster tool. Two well-known cluster tools that may be suitable for use in the present disclosure areAndboth are available from Applied Materials, Inc., of Santa Clara, Calif. However, the specific arrangement and combination of chambers may be varied for the purpose of performing specific steps of the processes described herein. Other processing chambers that may be used include, but are not limited to, Cyclical Layer Deposition (CLD), Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), etching, pre-cleaning, chemical cleaning, thermal processing such as RTP, plasma nitridation, degas, orientation, hydroxylation and other substrate processes. By performing the process in a chamber on a cluster tool, atmospheric contamination of the substrate surface can be avoided without oxidation prior to deposition of subsequent films.

According to one or more embodiments, the substrate is continuously under vacuum or "load-lock" conditions and is not exposed to ambient air when moving from one chamber to the next. The transfer chamber is thus under vacuum and "vacuumed" under vacuum pressure. An inert gas may be present in the processing chamber or the transfer chamber. In some embodiments, an inert gas is used as a purge gas to remove some or all of the reactants. In accordance with one or more embodiments, a purge gas is injected at the outlet of the deposition chamber to prevent reactants from moving from the deposition chamber to the transfer chamber and/or additional processing chambers. The flow of inert gas thus forms a curtain at the chamber outlet.

The substrates may be processed in a single substrate deposition chamber where a single substrate is loaded, processed and unloaded prior to processing another substrate. Substrates may also be processed in a continuous manner, similar to a conveyor system, in which multiple substrates are individually loaded into a first portion of a chamber, moved through the chamber, and unloaded from a second portion of the chamber. The shape of the chambers and associated conveyor system may form a straight path or a curved path. Additionally, the processing chamber may be a carousel in which multiple substrates are moved about a central axis and exposed to deposition, etching, annealing, cleaning, etc. processes during the carousel path.

During processing, the substrate may be heated or cooled. Such heating or cooling may be accomplished by any suitable means, including but not limited to changing the temperature of the substrate support and flowing heated or cooled gas to the substrate surface. In some embodiments, the substrate support includes a heater/cooler that can be controlled to conductively alter the temperature of the substrate. In one or more embodiments, the gas used (reactive or inert) is heated or cooled to locally change the substrate temperature. In some embodiments, a heater/cooler is positioned inside the chamber adjacent to the substrate surface to communicably alter the substrate temperature.

The substrate may also be stationary or rotating during processing. The rotating substrate may be rotated continuously or in discrete steps. For example, the substrate may be rotated during the entire process, or may be rotated by a small amount between exposures to different reactive or purge gases. Rotating the substrate (continuously or in steps) during processing can help produce more uniform deposition or etching by minimizing effects such as local variability in gas flow geometry.

The inventors have surprisingly found that the performance of the disclosed method without air break between process steps provides a metal film with improved properties relative to films produced by methods involving air break. In some embodiments, the improved property is selected from one or more of resistivity, roughness, adhesion, stress, thickness uniformity, and roughness uniformity.

For purposes of this disclosure, an "in situ" process is performed without an intervening air break. In other words, the substrate is maintained in a load lock condition and is not exposed to ambient air during the processing method.

Similarly, during processing, the "ex situ" process is performed with an intervening air break or exposure to ambient atmosphere. In some embodiments, the ex situ process is interrupted by air interruptions between process steps. For example, the ex situ process may expose the substrate to ambient atmosphere after the formation of the amorphous nucleation layer at 710 but before exposure to the first metal precursor at 720.

The in situ process of some embodiments may be performed on a cluster tool or similar multi-stage or multi-substrate processing tool. Exemplary cluster tools applicable to the present disclosure include, but are not limited to And Olympia^TMAvailable from applied materials, Inc. of Santa Clara, Calif.

Referring to fig. 10, additional embodiments of the present disclosure are directed to a processing system 900 for performing the in situ processes described herein. Fig. 10 depicts a system 900 that can be used to process a substrate in accordance with one or more embodiments of the present disclosure. The system 900 may be referred to as a cluster tool. The system 900 includes a central transfer station 910 having a robot 912 therein. Robot 912 is depicted as a single-blade robot; however, those skilled in the art will recognize that other robot 912 configurations are also within the scope of the present disclosure. Robot 912 is configured to move one or more substrates between chambers coupled to central transfer station 910.

At least one pre-clean/buffer chamber 920 is connected to the central transfer station 910. The pre-clean/buffer chamber 920 may include one or more of a heater, a radical source, or a plasma source. The pre-clean/buffer chamber 920 may be used as a waiting area for individual semiconductor substrates or for a wafer cassette for processing. The pre-clean/buffer chamber 920 may perform a pre-clean process or may pre-heat substrates for processing or may simply be a staging area for a process sequence. In some embodiments, there are two pre-clean/buffer chambers 920 connected to the central transfer station 910.

In the embodiment shown in fig. 10, the pre-clean chamber 920 may serve as a pass-through chamber between the factory interface 905 and the central transfer station 910. The factory interface 905 may include one or more robots 906 to move substrates from the cassettes to the pre-clean/buffer chamber 920. Robot 912 may then move the substrate from pre-clean/buffer chamber 920 to other chambers within system 900.

The first process chamber 930 may be coupled to the central transfer station 910. The first process chamber 930 may be configured as a nucleation layer deposition chamber and may be in fluid communication with one or more reactant gas sources to provide one or more reactant gas streams to the first process chamber 930. The substrate may be moved into and out of the processing chamber 930 by robot 912 through isolation valve 914.

The process chambers 940 may also be coupled to the central transfer station 910. In some embodiments, the process chamber 940 comprises a first metal conversion chamber and is in fluid communication with one or more reactive gas sources to provide a flow of reactive gas to the process chamber 940 to perform a first metal conversion process. The substrate may be moved into and out of the processing chamber 940 by robot 912 through isolation valve 914.

The process chambers 945 may also be connected with the central transfer station 910. In some embodiments, the processing chamber 945 is the same type of processing chamber 940 configured to perform the same processes as the processing chamber 940. This arrangement may be useful in situations where the process occurring in the processing chamber 940 takes much longer than the process occurring in the processing chamber 930.

In some embodiments, the process chambers 960 are connected to the central transfer station 910 and configured to act as second metal layer deposition chambers. The process chamber 960 may be configured to perform one or more different CVD or ALD processes.

In some embodiments, each of the process chambers 930, 940, 945, and 960 is configured to perform a different portion of the disclosed processing method. For example, the process chamber 930 may be configured to perform a nucleation layer formation process, the process chamber 940 may be configured to perform a first metal conversion process, the process chamber 945 may be configured to be a metrology station or perform a first metal conversion process, and the process chamber 960 may be configured to perform a second metal deposition process. Those skilled in the art will recognize that the number and arrangement of individual process chambers on the tool may vary, and that the embodiment depicted in fig. 10 represents only one possible configuration.

In some embodiments, the processing system 900 includes one or more metrology stations. For example, the metrology station may be located inside the pre-clean/buffer chamber 920, inside the central transfer station 910, or inside any individual processing chamber. The metrology station may be any location within the system 900 that allows the distance of the grooves to be measured without exposing the substrate to an oxidizing environment.

At least one controller 950 is coupled to one or more of the central transfer station 910, the pre-clean/buffer chamber 920, the process chamber 930, the process chamber 940, the process chamber 945, or the process chamber 960. In some embodiments, more than one controller 950 is connected to individual chambers or stations and a primary control processor is coupled to each of the individual processors to control the system 900. The controller 950 may be one of any form of general purpose computer processor, microcontroller, microprocessor, etc., that may be used to control various chambers and sub-processors in an industrial setting.

The at least one controller 950 may have a processor 952, a memory 954 coupled to the processor 952, an input/output device 956 coupled to the processor 952, and support circuits 958 that communicate between the various electronic components. The memory 954 may include one or more of a transitory memory (e.g., random access memory) and a non-transitory memory (e.g., storage).

The memory 954, or computer-readable medium of the processor, may be readily available memory, such as one or more of Random Access Memory (RAM), Read Only Memory (ROM), floppy disk, hard disk, or any other form of digital storage, local or remote. The memory 954 may retain a set of instructions operable by the processor 952 to control parameters and components of the system 900. The support circuits 958 are coupled to the processor 952 for supporting the processor in a conventional manner. The circuitry may include, for example, cache memory, power supplies, clock circuits, input/output circuits, subsystems, and the like.

The processes may generally be stored in the memory in the form of software routines that, when executed by the processor, cause the processing chamber to perform the processes of the present disclosure. The software routines may also be stored and/or executed by a second processor (not shown) that is remotely located from the hardware being controlled by the processor. Some or all of the methods of the present disclosure may also be performed in hardware. Likewise, the processes may be implemented in software and performed using a computer system in hardware, for example, in an application specific integrated circuit or other type of hardware implementation, or a combination of software and hardware. When executed by the processor, the software routines transform the general-purpose computer into a special-purpose computer (controller) that controls the operation of the chamber such that the process is performed.

In some embodiments, the controller 950 has one or more configurations to perform individual processes or sub-processes to perform methods. The controller 950 may be connected with the intermediate component and configured to operate the intermediate component to perform the functions of the method. For example, the controller 950 may be connected to and configured to control one or more of: air valves, actuators, motors, slit valves, vacuum controls, and the like.

The controller 950 of some embodiments has one or more configurations selected from: an arrangement for moving a substrate on a robot between a plurality of process chambers and a metrology station; a configuration to load and/or unload substrates from the system; forming an arrangement of nucleation layers; converting the nucleation layer to a configuration of a first metal layer; and/or a configuration to deposit a second metal layer.

Examples of the invention

For each of the following examples, the samples were prepared by depositing a tungsten layer on an amorphous tungsten layer. The amorphous tungsten layer is formed by converting the amorphous silicon layer.

A nucleation layer comprising amorphous silicon (a-Si) is formed on a surface of a substrate by exposing the surface of the substrate to a nucleation precursor comprising disilane. The thickness of the nucleation layer is aboutTo aboutWithin the range. The substrate surface is substantially free of the barrier layer prior to exposure to the nucleation precursor. Exposing the nucleation layer to WF at a partial pressure in a range from about 0.1 Torr to about 0.5 Torr₆To convert the nucleation layer into a first metal layer comprising amorphous tungsten (a-W). Use of WF by atomic layer deposition₆And H₂A second metal layer is formed on the first metal layer.

Example 1

Samples were prepared as indicated above. Some samples were processed "in situ" without air shut-off. Other samples were processed "ex situ" with air breaks after the nucleation layer was formed but before the first metal layer was formed.

The ex situ prepared samples are shown inA resistivity of about 30 μ Ω · cm for the second metal layer below. The ex situ prepared samples are shown inA resistivity of about 17 μ Ω · cm for the second metal layer below.

The samples were photographed. An image of an in situ sample is shown in fig. 11A, while an image of an ex situ sample is shown in fig. 11B. The darker layer in these images is the first metal layer. The images show that the first metal layer of the in-situ treated sample has better film continuity than the non-in-situ treated sample.

Film adhesion tests were also performed on these samples. A piece of tape was brought into contact with the sample and removed. The transfer results show that no film was removed from the sample by the tape when the tape was removed. An image of the tape resulting from the adhesion test is shown in fig. 11C. As shown in the images, the in-situ treated samples exhibited better adhesion (less film removed by the tape) than the non-in-situ treated samples.

Example 2

Samples were also prepared on CVD OX and 1K OX substrates. CVD OX substrates are prepared by exposing a silicon substrate to a CVD process to deposit a silicon oxide layer. An alumina layer is deposited on the silicon oxide and the substrate is spike annealed before further processing.

By thermally oxidizing a silicon substrate in a furnace to a thickness of aboutTo prepare a 1K OX substrate. An aluminum oxide layer is deposited on the silicon oxide layer. The substrate is not annealed before further processing.

The substrate was further processed to prepare the samples indicated above. Some samples were processed "in situ" without air shut-off. Other samples were processed "ex situ" with air breaks after the first metal layer was formed but before the second metal layer was formed.

Evaluation of the second Metal layer of the sampleResistivity, stress, resistance non-uniformity, and thickness non-uniformity. The results are presented in table 1.

TABLE 1

These measurements show that films of similar thickness have lower resistivity when processed in situ compared to non-in situ processing. Furthermore, the in situ treated samples showed greater compressive stress. In addition, the in situ processed samples also showed a second metal layer of more uniform sheet resistance and thickness across the substrate surface.

Reference throughout this specification to "one embodiment," "certain embodiments," "one or more embodiments," or "an embodiment" means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases such as "in one or more embodiments," "in certain embodiments," "in one embodiment," or "in an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment of the present disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

Although the disclosure herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made in the method and apparatus of the present disclosure without departing from the spirit and scope of the disclosure. Thus, it is intended that the present disclosure cover the modifications and variations of this disclosure provided they come within the scope of the appended claims and their equivalents.