阅读说明：本技术 一种用于esd保护的基区变掺杂晶体管 (Base region variable doping transistor for ESD protection ) 是由 蒲石 田泽 郎静 邵刚 谢运祥 于 2020-12-05 设计创作，主要内容包括：本发明涉及一种用于ESD保护的基区变掺杂晶体管。本发明包括P型衬底、第一NWELL区、第一PWELL区、第一N+接触区、第二N+接触区和第一P+接触区,第一NWELL区位于P型衬底内部上方,第一PWELL区位于第一NWELL区内部右上方,第一N+接触区位于第一NWELL区内部左上方,第二N+接触区位于第一PWELL区内部左上方,第一P+接触区位于第一PWELL区内部右上方,第一PWELL区通过线性变掺杂的掺杂方式形成。本发明能够通过基区的自建场降低基区的输运系数,从而提高器件的维持电压,避免闩锁效应的发生。(The invention relates to a base region variable doping transistor for ESD protection. The N + contact area is positioned on the left upper part inside the first NWELL area, the second N + contact area is positioned on the left upper part inside the first NWELL area, the first P + contact area is positioned on the right upper part inside the first PWELL area, and the first PWELL area is formed by a doping mode of linear varying doping. The invention can reduce the transport coefficient of the base region through the self-built field of the base region, thereby improving the maintaining voltage of the device and avoiding the occurrence of latch-up effect.)

1. A base-region-varying doped transistor structure for ESD protection, characterized by: the transistor structure comprises a P-type substrate, a first NWELL area, a first PWELL area, a first N + contact area, a second N + contact area and a first P + contact area, wherein the first NWELL area is positioned above the inner part of the P-type substrate, the first PWELL area is positioned on the upper right side of the inner part of the first NWELL area, the first N + contact area is positioned on the upper left side of the inner part of the first NWELL area, the second N + contact area is positioned on the upper left side of the inner part of the first PWELL area, the first P + contact area is positioned on the upper right side of the inner part of the first PWELL area, and the first ELPWL area is formed by a doping mode of linear doping.

2. The base-changed doped transistor structure for ESD protection according to claim 1, characterized in that: the first PWELL area is not uniformly doped, the doping concentration close to the second N + contact area is low, and the doping concentration close to the first N + contact area is high.

3. A base-region-varying doped transistor structure for ESD protection, characterized by: the transistor structure comprises a P-type substrate, a second NWELL area, a second P + contact area, a third N + contact area and a third P + contact area, wherein the second NWELL area is positioned at the upper right inside the P-type substrate, the third P + contact area is positioned at the upper left inside the P-type substrate, the second P + contact area is positioned at the upper left inside the second NWELL area, the third N + contact area is positioned at the upper right inside the second NWELL area, and the second NWELL area is formed in a doping mode of linear down-doping.

4. The base-changed doped transistor structure for ESD protection according to claim 3, characterized in that: the second NWELL region is not uniformly doped, the doping concentration close to the third P + contact region is low, and the doping concentration close to the second P + contact region is high.

Technical Field

The invention relates to the field of electronic science and technology, mainly used for electrostatic Discharge (ESD) protection technology, in particular to a base region variable doping transistor for ESD protection.

Background

ESD, i.e., electrostatic discharge, is a phenomenon that is ubiquitous in nature. ESD exists in every corner of people's daily life. Such conventional electrical phenomena are a fatal threat to sophisticated integrated circuits.

With the improvement of the integrated circuit manufacturing process, the minimum line width of the integrated circuit is reduced to the submicron or even nanometer level, so that the performance of the chip is improved, and the anti-ESD striking capability is also greatly reduced, and therefore, the electrostatic damage is more serious. The contradiction between process development and the ESD resistance of a chip becomes a problem that must be considered by the integrated circuit designer.

Conventional devices for ESD protection include: diode, MOSFET, Resistor, BJT, SCR, etc. Compared with other trigger structures, the NPN structure has bidirectional conduction characteristics and good protection performance, and is often parasitic in various trigger structures, so that the NPN structure has important significance on research and application of ESD protection devices.

The holding voltage is an important design parameter of the ESD protection device, and its value must be larger than the normal operating voltage of the protected circuit to prevent the protection device from entering the latch-up state and have the anti-latch-up capability. The conventional NPN structure for ESD protection has a fatal disadvantage that a snapback phenomenon occurs after the NPN transistor is turned on, and a sustain voltage after the snapback is very low. If the VDD of the protected circuit is high, the NPN will not self-turn off once triggered, and latch-up occurs.

Disclosure of Invention

The structure of the NPN transistor with the base region changed and doped is an NPN device structure with the base region, and the transport coefficient of the base region can be reduced through the self-built field of the base region, so that the maintaining voltage of the device is improved, and the latch-up effect is avoided.

The technical solution of the invention is as follows: the invention relates to a base region variable doping transistor structure for ESD protection, which is characterized in that: the transistor structure comprises a P-type substrate, a first NWELL area, a first PWELL area, a first N + contact area, a second N + contact area and a first P + contact area, wherein the first NWELL area is positioned above the inner part of the P-type substrate, the first PWELL area is positioned on the upper right side of the inner part of the first NWELL area, the first N + contact area is positioned on the upper left side of the inner part of the first NWELL area, the second N + contact area is positioned on the upper left side of the inner part of the first PWELL area, the first P + contact area is positioned on the upper right side of the inner part of the first PWELL area, and the first PWELL area is formed in a doping mode of changing doping into doping through linear.

The first PWELL area as the base area of the transistor is not uniformly doped, the doping concentration near the second N + contact area is low, and the doping concentration near the first N + contact area is high.

A base region change doping transistor structure for ESD protection is characterized in that: the transistor structure comprises a P-type substrate, a second NWELL area, a second P + contact area, a third N + contact area and a third P + contact area, wherein the second NWELL area is positioned at the upper right inside the P-type substrate, the second P + contact area is positioned at the upper left inside the second NWELL area, the third N + contact area is positioned at the upper right inside the second NWELL area, the third P + contact area is positioned at the upper left inside the P-type substrate, and the second NWELL area is formed by a linear variable doping mode

The second NWELL region serving as the base region of the transistor is not uniformly doped, the doping concentration close to the third P + contact region is low, and the doping concentration close to the second P + contact region is high.

The base region variable doping transistor for ESD protection provided by the invention reduces the transport coefficient of the base region through base region variable doping, thereby improving the maintaining voltage of the device and avoiding the occurrence of latch-up effect.

Drawings

FIG. 1 is a block diagram of a first embodiment of the present invention;

FIG. 2 is a process diagram of base-doping according to the present invention;

fig. 3 is a structural diagram of a second embodiment of the present invention.

The reference numerals are explained below:

01. a P-type substrate; 10. a first NWELL zone; 13. a second NWELL region; 22. a first PWELL region; 20. a second PWELL region; 11. a first N + contact region; 12. a second N + contact region; 14. a third N + contact region; 21. a first P + contact region; 23. a second P + contact region; 24. a third P + contact region.

Detailed Description

The technical solution of the present invention is further described in detail with reference to the accompanying drawings and specific embodiments.

Example 1

Referring to fig. 1, the structure of the first embodiment of the present invention includes: the P-type substrate 01, the first NWELL region 10, the first PWELL region 22, the first N + contact region 11, the second N + contact region 12 and the first P + contact region 21, wherein the first NWELL region 10 is positioned above the inner portion of the P-type substrate 01, the first PWELL region 22 is positioned above and to the right of the inner portion of the first NWELL region 10, the first N + contact region 11 is positioned above and to the left of the inner portion of the first NWELL region 10, the second N + contact region 12 is positioned above and to the left of the inner portion of the first PWELL region 22, the first P + contact region 21 is positioned above and to the right of the inner portion of the first PWELL region 22, and the first PWELL region 10 is formed by a doping method of linear variable doping.

Referring to fig. 2, the working principle of the first embodiment is as follows: the variable doping base region of the first PWELL region 10 is formed by linear variable doping, and the doping is not uniform, the doping concentration near the emitter region (the second N + contact region 12) is low, the doping concentration near the collector region (the first N + contact region 11) is high, and the impurity is fully ionized at room temperature, so that the multi-electron holes have approximately the same concentration distribution as the acceptor impurity. The non-uniformity of the hole concentration causes holes to diffuse from a high concentration to a low concentration, while the ionized impurities are immobilized, and thus are negatively charged near the collector region and positively charged near the emitter region. The separation of space charges creates a built-in electric field. The built-in electric field inhibits minority carriers (electrons) injected into the base region from drifting to the collector region, and inhibits the transport of the minority carriers in the base region, so that the transport coefficient of the base region is reduced, and the holding voltage of the device is improved.

Example 2

Referring to fig. 3, the structure of the second embodiment of the present invention includes: the P-type substrate 01, the second NWELL region 13, the second P + contact region 23, the third N + contact region 14 and the third P + contact region 24, the second NWELL region 13 is located on the upper right side inside the P-type substrate 01, the third P + contact region 24 is located on the upper left side inside the P-type substrate 01, the second P + contact region 23 is located on the upper left side inside the second NWELL region 13, the third N + contact region 14 is located on the upper right side inside the second NWELL region 13, and the second NWELL region 13 is formed through a linear variable doping mode.

The variable doping base region of the second NWELL region 13 is formed by linear variable doping, and has non-uniform doping, low doping concentration near the emitter region (third P + contact region 24), and high doping concentration near the collector region (second P + contact region 23).

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.