阅读说明：本技术 一种改善鳍式器件衬底图形不平坦对光刻聚焦影响的方法 (Method for improving influence of uneven pattern of fin type device substrate on photoetching focusing ) 是由 彭翔 于 2020-12-17 设计创作，主要内容包括：一种改善鳍式器件衬底图形不平坦对光刻聚焦影响的方法,包括用硬掩膜层填平分布有密集和孤立的FIN鳍式器件衬底；根据工艺要求确定在硬掩膜层上依次形成抗反射层的厚度范围和光刻胶的厚度,选取抗反射层的厚度范围中的N个厚度值(T-1、T-2、…T-N)；使用软件模拟出光刻胶和抗反射层在193纳米曝光波长下反射率最低时的最佳抗反射层厚度T-i；根据T-i值使用软件反推出反射率最大时对应的紫外光波长,使用这个波长紫外光代替可见光对鳍式衬底进行平坦度的侦测。因此,本发明避免了衬底FIN信息的反射所造成平坦度测量误侦测,消除了失焦影响；且根据光刻胶和抗反射层的平整度信息,获得了光刻最佳聚焦点,改善了光刻图形形貌和线宽差异,提高了器件的合格率。(A method for improving influence of uneven patterns of a FIN device substrate on photoetching focusing comprises the steps of filling and leveling a dense and isolated FIN device substrate by using a hard mask layer; determining the thickness range of an anti-reflection layer and the thickness of a photoresist which are sequentially formed on the hard mask layer according to the process requirements, and selecting N thickness values (T) in the thickness range of the anti-reflection layer 1 、T 2 、…T N ) (ii) a Software was used to simulate the optimal antireflective layer thickness T for the lowest reflectivity of the photoresist and antireflective layer at 193 nm exposure wavelength i (ii) a According to T i The value is back-derived by software to the corresponding ultraviolet wavelength when the reflectivity is maximum, and the ultraviolet light with the wavelength is used for replacing visible lightAnd detecting the flatness of the fin substrate. Therefore, the method avoids the misdetection of flatness measurement caused by the reflection of the FIN information of the substrate, and eliminates the out-of-focus influence; and according to the flatness information of the photoresist and the anti-reflection layer, the optimal photoetching focus point is obtained, the morphology and the line width difference of the photoetching pattern are improved, and the qualification rate of the device is improved.)

1. A method for improving influence of uneven pattern of a fin device substrate on photoetching focusing is characterized by comprising the following steps:

step S1: providing a FIN field effect transistor device substrate, wherein FIN dense regions and FIN isolated regions are distributed at different positions on the FIN field effect transistor device substrate, and the FIN dense regions and the FIN isolated regions are covered and filled by a hard mask layer;

step S2: determining the thickness range of an anti-reflection layer and the thickness of photoresist which are sequentially formed on the hard mask layer according to the process requirements, and selecting N thickness values (T) in the thickness range of the anti-reflection layer₁、T₂、…T_N) According to the N thickness values (T) of the antireflection layer₁、T₂、…T_N) Respectively matching the thickness of the photoresist layer, the refractive indexes of the anti-reflection layer and the photoresist layer under 193 nm wavelength ultraviolet light and the dielectric coefficient of the hard mask layer material, and simulating a relation curve graph of the thickness and the reflectivity of the anti-reflection layer;

step S3: according to the relation curve graph of the thickness and the reflectivity of the anti-reflection layer, selecting the thickness of the anti-reflection layer corresponding to the lowest reflectivity point in the thickness range of the anti-reflection layer as the optimal thickness T of the anti-reflection layer_i；

Step S4: determining M ultraviolet wavelength values (L) in an ultraviolet wavelength range₁、L₂、…L_M) Wherein the M ultraviolet wavelength values (L)₁、L₂、…L_M) Between 200nm and 400 nm;

step S5: according to the M ultraviolet wavelength values (L)₁、L₂、…L_M) And the antibodyThe optimal thickness Ti of the reflecting material, and the simulation reverse deducing the corresponding ultraviolet wavelength value L when the reflectivity is maximum_jSaid ultraviolet wavelength value L_jBetween 200nm and 400 nm;

step S6: ultraviolet light wavelength value L simulated by using the simulation_jAnd detecting the flatness of an exposure area before photoetching exposure on the substrate of the fin field effect transistor device.

2. The method of claim 1, wherein the anti-reflection layer has a thickness in a range from a nm to B nm; dividing the thickness range of the anti-reflection layer into N equal parts, wherein the value of each equal part is X ═ B-A)/N nanometers, and obtaining N thickness values (A, A + X, A +2X, … A + NX) of the anti-reflection layer; wherein B is a + NX.

3. The method of claim 1, wherein the uv wavelength value ranges from C nm or greater to D nm or less; dividing said range of ultraviolet light wavelength values into M equal portions, each of said equal portions having a value of Y ═ C-D/M nanometers, resulting in M of said ultraviolet light wavelength values (C, C + X, C +2X, … C + MY); wherein D ═ C + MY.

4. The method of claim 3, wherein the UV wavelength value ranges from 248nm to 400 nm.

5. The method for improving lithography focus effects of fin device substrate pattern unevenness according to any one of claims 1-4, wherein the simulation is performed using software, the software comprising S-litho software.

Technical Field

The invention relates to the technical Field of semiconductor integrated circuit processes, in particular to a method for improving influence of unevenness of a substrate graph of a Fin-type device (FinFET) on photoetching focusing.

Background

In the fabrication of Integrated Circuits (ICs), photolithography is a relatively common process flow. Referring to fig. 1, fig. 1 is a schematic reflection diagram of a Planar MOS lithography focusing system in the prior art. As shown in fig. 1, the conventional flat panel transistor thus includes, from top to bottom, at least a substrate layer (Silicon substrate), a patterned layer (pattern layer) covered with a Hard mask (Hard mask), an anti-reflection layer (BARC), and a photoresist (Resist).

It is clear to those skilled in the art that before performing an exposure process on a conventional flat-panel transistor (Planar MOS), a measurement (leveling) of the flatness of the exposed area of the wafer substrate is usually required. In the process of measuring the flatness, the photoetching machine adopts visible light (with the wavelength of 600 nm-1050 nm) to irradiate an exposure area, and the light can pass through a photoresist (Resist), an anti-reflection layer (BARC) and a plurality of light-permeable intermediate layers to reflect and feed back the uneven patterned layer condition on the substrate to a photoetching focusing system (as shown in figure 1); then, the photoetching machine carries out focusing correction on the flatness of each exposure area so as to achieve the optimal exposure focus in one-to-one correspondence.

If the measured result in the same exposure area is the value of the rugged points, the average value of the rugged points is taken as the focus, so that the defocus (defocus) caused by the rugged points can be compensated as long as the process window of the layer of lithography focus Depth (DOF) is enough.

As Integrated Circuit (IC) technology has advanced, the line width (CD) of the pattern has become smaller and smaller, and transistors have also been converted from flat panel devices to fin field effect transistors. Referring to fig. 2, fig. 2 is a reflective schematic diagram of a finfet device lithography focus system. As shown in fig. 2, the finfet device is characterized by a parallel FIN (FIN) standing on a substrate (Silicon substrate) with a height of about 100 nm.

Covering a hard mask layer (hard mask) on the FINs for filling, then coating an anti-reflection layer and photoresist for carrying out a photoetching process, feeding back the information of the FIN height when a photoetching machine is used for measuring the flatness, wherein the information of the FIN height is fed back because the FINs at different positions in an exposure area are distributed differently, are densely distributed at certain places and are separately distributed at certain places, so that the measuring flatness is misdetected, and the information of the densely distributed and the separately distributed FINs is fed back for correction, thereby bringing unnecessary defocus (as shown in FIG. 2). In addition, as the line width of the pattern of the fin field effect transistor device is reduced, the corresponding photoetching focal depth process window is also reduced, and if the defocusing cannot be compensated, the pattern morphology and the line width difference and the final device yield are not qualified.

Disclosure of Invention

The invention aims to solve the problem caused by the misdetection of the flatness of the fin field effect transistor device, and provides a method for improving the influence of the unevenness of a substrate graph of the fin field effect transistor device on photoetching focusing.

In order to achieve the purpose, the technical scheme of the invention is as follows:

a method for improving influence of uneven substrate graph of a FinFET device on photoetching focus comprises the following steps:

step S1: providing a FIN field effect transistor device substrate, wherein FIN (FIN structure) dense areas and FIN isolated areas are distributed at different positions on the FIN field effect transistor device substrate, and a hard mask layer is adopted to cover and level the FIN dense areas and the FIN isolated areas;

step S2: determining the thickness range of an anti-reflection layer and the thickness of photoresist which are sequentially formed on the hard mask layer according to the process requirements, and selecting N thickness values (T) in the thickness range of the anti-reflection layer₁、T₂、…T_N) According to the N thickness values (T) of the antireflection layer₁、T₂、…T_N) Respectively matching the thickness of the photoresist layer, the refractive indexes of the anti-reflection layer and the photoresist layer under 193 nm wavelength ultraviolet light and the dielectric coefficient of the hard mask layer material, and simulating a relation curve graph of the thickness and the reflectivity of the anti-reflection layer;

step S3: according to the relation curve graph of the thickness and the reflectivity of the anti-reflection layer, selecting the thickness of the anti-reflection layer corresponding to the lowest reflectivity point in the thickness range of the anti-reflection layer as the optimal thickness T of the anti-reflection layer_i；

Step S4: determining M ultraviolet wavelength values (L) in an ultraviolet wavelength range₁、L₂、…L_M) Wherein the M ultraviolet wavelength values (L)₁、L₂、…L_M) Between 200nm and 400 nm;

step S5: according to the M ultraviolet wavelength values (L)₁、L₂、…L_M) And the optimal thickness Ti of the anti-reflection material, and simulating and reversely deducing the corresponding ultraviolet wavelength value L when the reflectivity is maximum_jSaid ultraviolet wavelength value L_jBetween 200nm and 400 nm;

step S6: ultraviolet light wavelength value L simulated by using the simulation_jAnd detecting the flatness of an exposure area before photoetching exposure on the substrate of the fin field effect transistor device.

Furthermore, the thickness range of the anti-reflection layer is more than or equal to A nanometers and less than or equal to B nanometers; dividing the thickness range of the anti-reflection layer into N equal parts, wherein the value of each equal part is X ═ B-A)/N nanometers, and obtaining N thickness values (A, A + X, A +2X, … A + NX) of the anti-reflection layer; wherein B is a + NX.

Further, the range of the wavelength value of the ultraviolet light is more than or equal to C nanometers and less than or equal to D nanometers; dividing said range of ultraviolet light wavelength values into M equal portions, each of said equal portions having a value of Y ═ C-D/M nanometers, resulting in M of said ultraviolet light wavelength values (C, C + X, C +2X, … C + MY); wherein D ═ C + MY.

Furthermore, the wavelength value range of the ultraviolet light is 248 nanometers to 400 nanometers.

Further, the simulation is completed by software, and the software comprises S-litho software.

According to the technical scheme, compared with the traditional method of a photoetching machine for carrying out leveling detection on the flatness of the substrate by using visible light, the method for improving the influence of the unevenness of the substrate of the FIN field effect transistor device on photoetching focusing provided by the invention has the advantages that the absorption rate of ultraviolet light on the hard mask layer is higher than that of the visible light, so that the unnecessary defocusing influence caused by leveling misdetection due to the information of a reflecting substrate FIN is avoided; in addition, due to the selected ultraviolet light L_jThe interference enhancement effect can be formed at the maximum reflectivity of the photoresist and the anti-reflection layer, the flatness information of the photoresist and the anti-reflection layer can be fed back more truly, and the true optimal photoetching focus point can be obtained, so that the morphology and the line width difference of the photoetching pattern are improved, and the qualification rate of the device is improved.

Drawings

FIG. 1 is a schematic reflection diagram of a Planar MOS lithography focusing system in the prior art

FIG. 2 is a reflection diagram of a FinFET device lithography focus system

FIG. 3 is a flow chart illustrating a method for improving lithographic focus effects of substrate profile unevenness in FinFET devices according to a preferred embodiment of the present invention

FIG. 4 is a schematic diagram showing the reflectance and the thickness of the anti-reflection layer under different wavelengths of UV light according to the embodiment of the present invention, wherein w1 is 193 nm UV light, and w 2-w 5 is UV light with a wavelength ranging from 200nm to 400nm

FIG. 5 is a graph showing absorption curves of a hard mask material at different wavelengths, where λ is the wavelength of light and k is the dielectric constant of the hard mask material

FIG. 6 is a schematic diagram illustrating an emission result of a leveling process performed on a FinFET device substrate by a lithography machine using ultraviolet light according to an embodiment of the present invention

Detailed Description

The following describes in further detail embodiments of the present invention with reference to fig. 3-6.

In the embodiment of the invention, the flatness of the exposure area of the wafer substrate needs to be measured (leveling) before the exposure of the substrate photoetching of the fin field effect transistor device, so that the flatness information of the photoresist and the anti-reflection layer can be fed back more truly, and the true photoetching optimal focus point can be obtained, thereby improving the photoetching pattern appearance, the line width difference and the device yield. The invention provides a method for improving influence of uneven substrate graph of a fin field effect transistor device on photoetching focus, which comprises the following steps: providing a substrate of a FIN field effect transistor device, distributing dense and isolated FINs on the substrate, filling the dense and isolated FINs with a hard mask layer, and then carrying out a photoetching process; the optimal thickness T of the photoresist and anti-reflective layer at 193 nm exposure wavelength was simulated using S-litho software_iThen according to T_iThe same software is used for reversely deducing the corresponding ultraviolet wavelength L between 200nm and 400nm when the reflectivity is maximum_jThe ultraviolet light with the wavelength replaces visible light to carry out level detection on the FIN substrate, and the FIN substrate has the advantages that the absorptivity of the ultraviolet light with the short wavelength in the hard mask layer is higher than that of the visible light, and the influence of unnecessary defocusing caused by level misdetection due to the fact that information of the FIN of the substrate is not uniformly distributed can not be reflected; and ultraviolet light L_jThe interference enhancement effect can be formed when the reflectivity of the photoresist and the anti-reflection layer is maximum, the flatness information of the photoresist and the anti-reflection layer can be fed back more truly, and the true optimal focusing point of the photoetching can be obtained.

Referring to fig. 3, fig. 3 is a flow chart illustrating a method for improving lithographic focus effects of substrate profile unevenness in finfet devices according to a preferred embodiment of the present invention. As shown in fig. 3, the method for improving the influence of the substrate pattern unevenness of the finfet device on the lithography focus specifically includes the following steps:

step S1: providing a FIN field effect transistor device substrate, wherein FIN (FIN structure) dense areas and FIN isolated areas are distributed at different positions on the FIN field effect transistor device substrate, and a hard mask layer is adopted to cover and level the FIN dense areas and the FIN isolated areas;

step S2: determining the thickness range of an anti-reflection layer and the thickness of photoresist which are sequentially formed on the hard mask layer according to the process requirements, and selecting N thickness values (T) in the thickness range of the anti-reflection layer₁、T₂、…T_N) According to the N thickness values (T) of the antireflection layer₁、T₂、…T_N) And respectively matching the thickness of the photoresist layer, the refractive indexes of the anti-reflection layer and the photoresist layer under 193 nm wavelength ultraviolet light and the dielectric coefficient of the hard mask layer material, and simulating a relation curve graph of the thickness and the reflectivity of the anti-reflection layer.

In a preferred embodiment of the present invention, the thickness of the various layers of the substrate and the refractive index (n) of each layer (including the photoresist and the antireflective layer) under 193 nm ultraviolet light and the dielectric constant (k) of the hardmask material are known based on the requirements of the lithography process. For example, the thickness range of the anti-reflection layer is more than or equal to A nanometers and less than or equal to B nanometers; dividing the thickness range of the anti-reflection layer into N equal parts, wherein the value of each equal part is X ═ B-A)/N nanometers, and obtaining N thickness values (A, A + X, A +2X, … A + NX) of the anti-reflection layer; wherein B is a + NX.

Step S3: according to the relation curve graph of the thickness and the reflectivity of the anti-reflection layer, selecting the thickness of the anti-reflection layer corresponding to the lowest reflectivity point in the thickness range of the anti-reflection layer as the optimal thickness T of the anti-reflection layer_i。

Referring to fig. 4, fig. 4 is a graph illustrating the reflectivity and the thickness of the anti-reflective layer under different wavelengths of ultraviolet light according to the embodiment of the present invention, wherein w1 is 193 nm ultraviolet light, and w 2-w 5 is ultraviolet light with a wavelength in a range of 200nm to 400 nm.

As shown in FIG. 4, the thickness of the various film layers of the substrate and the refractive index (n) of each layer (including the photoresist and the antireflective layer) at 193 nm wavelength UV are known based on the lithographic process requirements&Simulating a relation curve graph of the thicknesses and the reflectivities of different anti-reflection layers by using S-litho software, and then selecting the thickness corresponding to the lowest point of the reflectivity as the optimal thickness T of the anti-reflection layer_i。

As shown in fig. 4, a graph of the relationship between the Thickness (barre Thickness) of the anti-reflection layer and the Reflectivity (Reflectivity) was simulated by using S-litho software, and then the Thickness corresponding to the lowest point of the Reflectivity was selected as the optimal Thickness. The thickness of the lowest reflection point corresponding to the wavelength w1{193 nm } is T_iThe thickness of the reflection lowest point corresponding to the wavelength w1{193 nm } is T_iIs 0.08 μm.

In the embodiment of the present invention, ultraviolet light (UV) with a shorter wavelength (usually selected in a range of 200nm to 400 nm) is used to perform leveling detection on the finfet device substrate instead of visible light, and since the UV wavelength energy is larger than the visible light energy and is more easily absorbed by the material, most of the UV light that has passed through the photoresist and the anti-reflection layer is absorbed by the covered hardmask layer (as shown in fig. 5), and the height information of the substrate FIN is not reflected (as shown in fig. 6).

Specifically, step S4 is executed: determining M ultraviolet wavelength values (L) in an ultraviolet wavelength range₁、L₂、…L_M) Wherein the M ultraviolet wavelength values (L)₁、L₂、…L_M) Between 200nm and 400 nm. In consideration of the photoresist exposure sensitivity, it is particularly noted that the simulated Ultraviolet (UV) light wavelength needs to be greater than 193 nm and as far away from the 193 nm wavelength as possible, and generally greater than 248nm does not affect the 193 nm photoresist. Thus, the M ultraviolet wavelength values (L)₁、L₂、…L_M) Should be greater than 193 nm, and is typically selected between 200nm and 400 nm; preferably, the wavelength value of the ultraviolet light ranges from 248 nanometers to 400 nanometers.

In a preferred embodiment of the present invention, the wavelength range of the ultraviolet light is greater than or equal to C nanometers and less than or equal to D nanometers; dividing the ultraviolet light wavelength range into M equal parts, each of which has a value of Y ═ C-D)/M nanometers, resulting in M thicknesses of the anti-reflection layer (C, C + X, C +2X, … C + MY); wherein D ═ C + MY.

Next, step S5: according to the M ultraviolet wavelength values (L)₁、L₂、…L_M) And the optimal thickness Ti of the anti-reflection material, and simulating and reversely deducing the corresponding ultraviolet wavelength value L when the reflectivity is maximum_jSaid ultraviolet wavelength value L_jBetween 200nm and 400 nm.

Step S6: ultraviolet light wavelength value L simulated by using the simulation_jAnd detecting the flatness of an exposure area before photoetching exposure on the substrate of the fin field effect transistor device.

Referring to fig. 5 and 6, fig. 5 is a graph showing the Absorption curves of the hard mask layer material at different wavelengths according to an embodiment of the present invention, where λ is the wavelength of light in nm, k is the dielectric constant of the hard mask material, and the ordinate in fig. 5 is the light Absorption rate (absorbance of hardmark) of the hard mask layer material; fig. 6 is a schematic diagram illustrating an emission result of a leveling performed by a lithography machine on a finfet device substrate using ultraviolet light according to an embodiment of the present invention. As shown in fig. 5, since the wavelength of ultraviolet light is larger than the wavelength of visible light and is more easily absorbed by the material than the visible light, the ultraviolet light transmitted through the photoresist and the anti-reflection layer is mostly absorbed by the covered hard mask layer, and the height information of the substrate FIN is not reflected (as shown in fig. 6).

That is, the simulated ultraviolet light with a certain wavelength (ASML is provided with a UV light source with a wavelength of 225 nm-400 nm on a photoetching machine of a model 1970 or more) is used for carrying out level detection on the FIN-type device substrate, the ultraviolet light can form an interference enhancement effect on the photoresist and the anti-reflection layer, the flatness information of the photoresist and the anti-reflection layer can be fed back more truly, the influence caused by the height and the distributed dense isolation degree of FIN on the substrate can be eliminated to the maximum extent, and the true optimal photoetching focus point is obtained.

The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.