CAN data receiving and transmitting method based on MCU IO and SJA1000
阅读说明：本技术 基于mcu io和sja1000的can数据收发方法 (CAN data receiving and transmitting method based on MCU IO and SJA1000 ) 是由 张�浩 于 2020-11-08 设计创作，主要内容包括：本发明涉及一种基于MCU IO和独立CAN控制器SJA1000的CAN总线数据收发方法,属于光电产品数据收发技术领域。本发明利用MCU IO和SJA1000以及CTM8251等电路芯片完成了CAN收发电路的搭建,采用MCU的一部分IO控制SJA1000控制接口,另外用8个IO通过双向数据缓冲芯片连接SJA1000的数据/地址接口,两者进行协同配合实现CAN总线数据的收发。实现了基于IO的地址/数据复用总线对SJA1000寄存器的读写,在此基础上完成了SJA1000的初始化、CAN总线数据的读取和发送,最终实现了光电产品对外的CAN总线信息传输。该方法鲁棒性高,移植性强,综合成本低。(The invention relates to a CAN bus data receiving and transmitting method based on MCU IO and an independent CAN controller SJA1000, and belongs to the technical field of photoelectric product data receiving and transmitting. The CAN bus data transmitting and receiving circuit is built by using MCU IO and SJA1000, CTM8251 and other circuit chips, a part of IO of the MCU is used for controlling the SJA1000 control interface, in addition, 8 IOs are used for connecting the data/address interface of the SJA1000 through the bidirectional data buffer chip, and the two are cooperatively matched to realize the transmitting and receiving of CAN bus data. The reading and writing of the address/data multiplexing bus based on IO to the SJA1000 register are realized, the initialization of the SJA1000 and the reading and sending of CAN bus data are completed on the basis, and finally the external CAN bus information transmission of the photoelectric product is realized. The method has the advantages of high robustness, strong portability and low comprehensive cost.)
1. A CAN bus data receiving and transmitting method based on MCU IO and SJA1000 is characterized in that the adopted circuit comprises MCU, SN74LVC4245A, SJA1000 and CTM8251 chips, wherein PB 0-PB 5 of the MCU are connected with control pins CS, ALE, RD, WR, RST and INT of the SJA1000, PA8 and PA9 of the MCU are connected with an enable pin OE and a direction control pin DIR of SN74LVC4245A, and PA 0-PA 7 of the MCU are connected with data pins 1AD 0-1 AD7 of the SN74LVC 4245A; data pins 2AD 0-2 AD7 of SN74LVC4245A are connected with address/data pins AD 0-AD 7 of SJA1000, a receiving pin RX and a transmitting pin TX of the SJA1000 are respectively connected with a transmitting pin and a receiving pin of CTM8251, and the CTM8251 is connected with CANH, CANL and CANG of external CAN bus equipment to complete communication exchange of photoelectric products and the external equipment; the method comprises the following steps:
step 1: performing power-on reset on the MCU, waiting for other circuits including SJA1000 to be powered on, configuring IO pins connected with a control pin of the SJA1000 and an input control pin of SN74LVC4245A, and configuring the input and output directions and the default level of the IO pins;
step 2: initializing SJA1000, wherein the initialization of SJA1000 can be initialized only under the condition of a reset mode, and the RST pin level needs to be pulled down;
and step 3: the input/output buffer and the related status register and command register are configured to complete the transceiving of CAN bus data.
2. The CAN bus data transceiving method based on MCU IO and SJA1000 as claimed in claim 1, wherein the initialization of SJA1000 in step 2 is as follows:
1) the SJA1000 enters a reset mode, namely RST is set to be low level, the reset is effective, the data of the status register is read, and the reset mode is determined to be entered;
2) setting clock frequency, writing a frequency division value into a clock frequency division register, and reading the register value to ensure correct writing;
3) setting a baud rate, writing a baud rate value into a baud rate register, and then reading the baud rate register value to ensure correct writing;
4) setting an acceptance code and a mask, respectively writing configuration data into an acceptance code register and an acceptance mask register, and then reading the value of the register to ensure correct writing;
5) setting output control, writing configuration data into an output control register, and reading the value of the register to ensure correct writing;
6) the SJA1000 exits the reset mode, i.e., RST is set high, the reset is disabled and enters the active mode, and the read status register ensures that the reset mode has been exited.
3. The CAN bus data transceiving method based on MCU IO and SJA1000 as claimed in claim 1, wherein the CAN bus data transceiving in step 3 is as follows:
1) reading a state register of the SJA1000, if the receiving state of the state register is 1, namely receiving, and the state of a sending buffer is 0, namely locking, waiting until the receiving state is 0, and the state of the sending buffer is 1;
2) writing frame information bytes into a first address area 0x10 of a descriptor area of the transmission buffer, and writing identification codes into second to fifth byte areas 0x11-0x14 of the descriptor area of the transmission buffer in sequence;
3) writing data into a data area of the sending buffer area;
4) to the command register, the 0x01 command is written.
4. The CAN bus data transceiving method based on MCU IO and SJA1000 as claimed in claim 1, wherein CAN bus data reception in step 3 is as follows:
1) reading a state register of the SJA1000, if the receiving state of the state register is 1, namely receiving, and the state of a receiving buffer is 0, namely no available data exists, waiting until the receiving state is 0, and the state of the receiving buffer is 1;
2) reading 0x10 to 0x22 in turn;
3) writing a command of 0x04 to the SJA1000 command register, releasing the receive buffer;
4) delaying for 10 counting cycles;
5) a command of 0x00 is written to the SJA1000 command register, initializing the command register.
5. The CAN bus data transceiving method based on MCU IO and SJA1000 as recited in claim 1, wherein any operation on SJA1000 needs to be completed by reading and writing registers.
6. The CAN bus data transceiving method based on MCU IO and SJA1000 as claimed in claim 5, wherein writing data to the register is as follows:
1) enabling the SN74LVC4245 chip, and setting the data direction to be from MCU data to SJA 1000;
2) the input latch signal ALE of the SJA1000 is high, so that the latch is effective;
3) assigning 8-bit addresses of registers needing to be written to IO pins PA 0-PA 7 according to bits, and setting PA 0-PA 7 as output;
4) delaying for 10 clock cycles;
5) the input latch signal ALE of the device SJA1000 is low, so that the latch is invalid;
6) the chip select signal CS of the SJA1000 is low, so that the chip select is effective;
7) the write signal WR of the SJA1000 is low, and the write is effective;
8) assigning 8-bit data to be written to IO pins PA 0-PA 7 according to bits;
9) delaying for 10 clock cycles;
10) write signal WR of SJA1000 is high, write is invalid;
11) delaying for 10 clock cycles;
12) the chip select signal CS of the SJA1000 is high, so that the chip select is invalid;
13) and turning off the SN74LVC4245 chip enable.
7. The CAN bus data transceiving method based on MCU IO and SJA1000 as claimed in claim 5, wherein reading data to the register is as follows:
1) enabling the SN74LVC4245 chip, and setting the data direction to be from MCU data to SJA 1000;
2) the input latch signal ALE of the SJA1000 is high, so that the latch is effective;
3) assigning 8-bit addresses of registers needing to be read to IO pins PA 0-PA 7 according to bits;
4) delaying for 10 clock cycles;
5) the input latch signal ALE of the device SJA1000 is low, so that the latch is invalid;
6) the chip select signal CS of the SJA1000 is low, so that the chip select is effective;
7) the data direction of the SN74LVC4245 chip is set to be SJA1000 data to MCU;
8) the SJA1000 read signal RD is low, and the reading is effective;
9) delaying for 10 clock cycles;
10) STM32 IO pins PA 0-PA 7 are set as input, values of PA 0-PA 7 are read, and the combination is data needing to be read;
11) a write signal RD of the SJA1000 is high, and reading is invalid;
12) the chip select signal CS of the SJA1000 is high, so that the chip select is invalid;
13) and turning off the SN74LVC4245 chip enable.
Technical Field
The invention belongs to the technical field of CAN bus transceiving, and particularly relates to a CAN data transceiving method based on MCU IO and SJA1000, which is applied to external communication of photoelectric products.
Background
The CAN bus is used as a reliable and flexible bus technology and is widely applied to industrial control, but at present, some MCU chips at low ends do not have built-in CAN transceiving controllers, and some MCUs have built-in CAN controllers which are not stable, and the low-end MCU does not have parallel data interfaces or is occupied, and IO is a necessary interface of all MCU, so that the application range of the CAN bus is improved by adopting IO and independent CAN controllers to transmit CAN data. SJA1000 is a mature and reliable independent CAN controller, IO is a basic pin of an MCU chip, the level of the IO CAN be set to be high or low, the high or low level of the IO level CAN be used for controlling a control pin of the SJA1000, in addition, 8 IO analog parallel data/address interfaces are adopted for transmitting data and addresses of the SJA1000 and the MCU, and therefore the transceiving control of CAN bus data CAN be completed by adopting the combination of the IO of the MCU and the SJA 1000. IO and SJA1000 are used for transmitting and receiving CAN bus data, analog address, data and control signals are controlled by using the level of an IO port, and the time sequence, direction, level and the like among different signals are reasonably arranged.
Disclosure of Invention
Technical problem to be solved
In order to solve the problems that the existing photoelectric product is slow and unstable in transmission of external CAN bus information, the invention provides a CAN data receiving and transmitting method based on MCU IO and SJA 1000.
Technical scheme
A CAN bus data receiving and transmitting method based on MCU IO and SJA1000 is characterized in that the adopted circuit comprises MCU, SN74LVC4245A, SJA1000 and CTM8251 chips, wherein PB 0-PB 5 of the MCU are connected with control pins CS, ALE, RD, WR, RST and INT of the SJA1000, PA8 and PA9 of the MCU are connected with an enable pin OE and a direction control pin DIR of SN74LVC4245A, and PA 0-PA 7 of the MCU are connected with data pins 1AD 0-1 AD7 of the SN74LVC 4245A; data pins 2AD 0-2 AD7 of SN74LVC4245A are connected with address/data pins AD 0-AD 7 of SJA1000, a receiving pin RX and a transmitting pin TX of the SJA1000 are respectively connected with a transmitting pin and a receiving pin of CTM8251, and the CTM8251 is connected with CANH, CANL and CANG of external CAN bus equipment to complete communication exchange of photoelectric products and the external equipment; the method comprises the following steps:
step 1: performing power-on reset on the MCU, waiting for other circuits including SJA1000 to be powered on, configuring IO pins connected with a control pin of the SJA1000 and an input control pin of SN74LVC4245A, and configuring the input and output directions and the default level of the IO pins;
step 2: initializing SJA1000, wherein the initialization of SJA1000 can be initialized only under the condition of a reset mode, and the RST pin level needs to be pulled down;
and step 3: the input/output buffer and the related status register and command register are configured to complete the transceiving of CAN bus data.
The technical scheme of the invention is further that: the initialization of SJA1000 in step 2 is as follows:
1) the SJA1000 enters a reset mode, namely RST is set to be low level, the reset is effective, the data of the status register is read, and the reset mode is determined to be entered;
2) setting clock frequency, writing a frequency division value into a clock frequency division register, and reading the register value to ensure correct writing;
3) setting a baud rate, writing a baud rate value into a baud rate register, and then reading the baud rate register value to ensure correct writing;
4) setting an acceptance code and a mask, respectively writing configuration data into an acceptance code register and an acceptance mask register, and then reading the value of the register to ensure correct writing;
5) setting output control, writing configuration data into an output control register, and reading the value of the register to ensure correct writing;
6) the SJA1000 exits the reset mode, i.e., RST is set high, the reset is disabled and enters the active mode, and the read status register ensures that the reset mode has been exited.
The technical scheme of the invention is further that: the CAN bus data in step 3 are sent as follows:
1) reading a state register of the SJA1000, if the receiving state of the state register is 1, namely receiving, and the state of a sending buffer is 0, namely locking, waiting until the receiving state is 0, and the state of the sending buffer is 1;
2) writing frame information bytes into a first address area 0x10 of a descriptor area of the transmission buffer, and writing identification codes into second to fifth byte areas 0x11-0x14 of the descriptor area of the transmission buffer in sequence;
3) writing data into a data area of the sending buffer area;
4) to the command register, the 0x01 command is written.
The technical scheme of the invention is further that: the CAN bus data in step 3 are received as follows:
1) reading a state register of the SJA1000, if the receiving state of the state register is 1, namely receiving, and the state of a receiving buffer is 0, namely no available data exists, waiting until the receiving state is 0, and the state of the receiving buffer is 1;
2) reading 0x10 to 0x22 in turn;
3) writing a command of 0x04 to the SJA1000 command register, releasing the receive buffer;
4) delaying for 10 counting cycles;
5) a command of 0x00 is written to the SJA1000 command register, initializing the command register.
The technical scheme of the invention is further that: any operation on the SJA1000 needs to be done by reading and writing registers.
The technical scheme of the invention is further that: writing data to the register is specifically as follows:
1) enabling the SN74LVC4245 chip, and setting the data direction to be from MCU data to SJA 1000;
2) the input latch signal ALE of the SJA1000 is high, so that the latch is effective;
3) assigning 8-bit addresses of registers needing to be written to IO pins PA 0-PA 7 according to bits, and setting PA 0-PA 7 as output;
4) delaying for 10 clock cycles;
5) the input latch signal ALE of the device SJA1000 is low, so that the latch is invalid;
6) the chip select signal CS of the SJA1000 is low, so that the chip select is effective;
7) the write signal WR of the SJA1000 is low, and the write is effective;
8) assigning 8-bit data to be written to IO pins PA 0-PA 7 according to bits;
9) delaying for 10 clock cycles;
10) write signal WR of SJA1000 is high, write is invalid;
11) delaying for 10 clock cycles;
12) the chip select signal CS of the SJA1000 is high, so that the chip select is invalid;
13) and turning off the SN74LVC4245 chip enable.
The technical scheme of the invention is further that: reading data from the register is specifically as follows:
1) enabling the SN74LVC4245 chip, and setting the data direction to be from MCU data to SJA 1000;
2) the input latch signal ALE of the SJA1000 is high, so that the latch is effective;
3) assigning 8-bit addresses of registers needing to be read to IO pins PA 0-PA 7 according to bits;
4) delaying for 10 clock cycles;
5) the input latch signal ALE of the device SJA1000 is low, so that the latch is invalid;
6) the chip select signal CS of the SJA1000 is low, so that the chip select is effective;
7) the data direction of the SN74LVC4245 chip is set to be SJA1000 data to MCU;
8) the SJA1000 read signal RD is low, and the reading is effective;
9) delaying for 10 clock cycles;
10) STM32 IO pins PA 0-PA 7 are set as input, values of PA 0-PA 7 are read, and the combination is data needing to be read;
11) a write signal RD of the SJA1000 is high, and reading is invalid;
12) the chip select signal CS of the SJA1000 is high, so that the chip select is invalid;
13) off SN74LVC4245 chip enable
Advantageous effects
The CAN data receiving and transmitting method based on MCU IO and SJA1000 provided by the invention utilizes MCU IO and SJA1000 and related chips to complete a hardware circuit for receiving and transmitting CAN bus data, completes the control of SJA1000 by means of the high and low level of IO, completes the reading and writing of SJA1000 registers by utilizing the simulated addresses and data of 8 IO interfaces, reasonably optimizes the control sequence and arranges the data direction to complete the initialization setting of SJA1000 and the transmission and reception of CAN data on the basis, and realizes the stable transmission of CAN bus information of photoelectric products to the outside.
The hardware connection method is simple and clear, has wide application, CAN be adopted as long as the IO pin of the MCU is enough, and the CAN module is not required to be arranged in the MCU, and the parallel interface is not required, and CAN be widely applied to the external information transmission of photoelectric products. The hardware connection method is simple and reliable, and the comprehensive cost is low. The data receiving and transmitting algorithm is clear, easy to transplant and high in robustness.
Drawings
FIG. 1 is a diagram of the hardware connections of the present invention;
FIG. 2 is a block diagram of the internal components of the SJA1000 chip of the present invention;
FIG. 3 is an overall flow chart of the algorithm of the present invention;
FIG. 4 is a flow chart of the SJA1000 initialization of the present invention;
FIG. 5 is a flow chart of data transmission according to the present invention;
fig. 6 is a flow chart of data reception according to the present invention.
Detailed Description
The invention will now be further described with reference to the following examples and drawings:
the invention utilizes the IO and SJA1000 chips of the MCU to build a CAN bus-based transceiver circuit, and the algorithm is designed to realize the transceiving of the CAN bus data of the photoelectric product. Finally, the CAN bus data CAN be received and transmitted at low cost, the hardware limitation of CAN bus application is reduced, the MCU without the embedded CAN module and the MCU chip without the parallel data interface CAN also complete the receiving and transmitting of the CAN bus data, and the application range of the CAN bus is expanded.
A CAN independent controller SJA1000 is adopted as a core device for CAN bus data receiving and transmitting. The CTM8251 converts the data of the CAN bus into a data form which CAN be received by SJA 1000. And the other part of IO pins are connected with the data/address pins of the SJA1000 through the SN74LVC4245A and used for receiving and transmitting CAN bus data. The SN74LVC4245A is used for controlling the data transmission direction of the MCU and the SJA1000, thereby completing the data transmission of the address data multiplexing bus.
As shown in fig. 1, a hardware circuit is built by using MCU, SN74LVC4245A, SJA1000 and CTM8251 chips, and the circuit is embedded in an external communication circuit board inside the optoelectronic device. PB 0-PB 5 of the MCU are connected with control pins CS, ALE, RD, WR, RST and INT of the SJA1000, PA8 and PA9 of the MCU are connected with an enable pin OE and a direction control pin DIR of SN74LVC4245A, and PA 0-PA 7 of the MCU are connected with data pins 1AD 0-1 AD7 of SN74LVC 4245A. Data pins 2AD 0-2 AD7 of SN74LVC4245A are connected with address/data pins AD 0-AD 7 of SJA1000, a receiving pin RX and a transmitting pin TX of the SJA1000 are respectively connected with a transmitting pin and a receiving pin of CTM8251, and the CTM8251 is connected with CANH, CANL and CANG of external CAN bus equipment to complete communication exchange of photoelectric products and the external equipment.
The SJA1000 is a stand-alone CAN controller with advanced features for automotive and general industrial applications, and the SJA1000 has a series of advanced functions suitable for a variety of applications, particularly important in system optimization diagnostics and maintenance.
The SJA1000 has two working modes, one is a BasicCAN and the other is a PeliCAN (supporting CAN 2.0B protocol), the invention uses the PeliCAN mode which is most widely used in the industry, the BasicCAN mode is simpler than the PeliCAN mode, and the invention CAN be transplanted and modified.
The SJA1000 receives the data received by the CTM8251, converts the data into 8 parallel port data, and can convert 8-bit parallel port data input by the SJA1000 into serial transmission data.
The SJA1000 is mainly composed of an interface management module, a transceiver module, an oscillator and a reset module, wherein the interface management module completes connection to an external main controller, pins of the interface management module are divided into control pins and address/data pins, the address/data pins are multiplexing pins, the control pins mainly comprise chip selection, latching, degree, writing and the like, and the main pins are specifically defined as follows:
SN74LVC4245A is an eight-way bus transceiver with tri-state output and 3.3V-5V shifter with bidirectional conducting function, which can be used for both receiving and transmitting, and which controls the direction of data through direction pin (DIR), converting data from 5V level to 3.3V level. Data control for SN74LVC4245A is shown in the table below.
The CTM8251 high-speed CAN isolation transceiver converts differential data on a CAN bus into data which are received and transmitted independently and has a front-back isolation function.
The MCU chip can be a commonly used MCU chip in the market, the level characteristics of the MCU IO port need to be considered by adopting different MCU chips, and if the level is not matched with the SJA1000, a level matching chip, such as a 74-series level matching chip, is added.
As shown in fig. 3, for the data transceiving process of the present invention, first, power-on reset of the MCU is performed, waiting for other circuits including the SJA1000 to be powered on, configuring the IO pin connected to the control pin of the SJA1000 and the input control pin of the SN74LVC4245A, and configuring the input/output direction and the default level size thereof. Next, SJA1000 is initialized, and the initialization of SJA1000 can only be initialized in the case of reset mode, which requires pulling RST pin level low. After initialization, the input/output buffer and the related status register and command register are configured to complete the transceiving of CAN bus data.
The SJA1000 should be initialized first, and the clock frequency, baud rate, acceptance code and mask, output control, etc. are set. When data is transmitted, the status of the status register is read first, and if transmission is permitted, the frame information byte and the identification code are set, and the transmission data is written into the transmission buffer, and a transmission command is written into the command register, and then the SJA1000 automatically transmits the data. Reading CAN bus data is similar to sending, firstly, reading a status register, if receiving is allowed, reading data in a receiving buffer register in sequence, and releasing a receiving buffer after reading is completed. The core of CAN bus data reception based on IO and SJA1000 is to complete reading and writing to SJA1000 registers using IO.
The SJA1000 is a microcontroller of I/O equipment based on memory addressing, and the independent operation of the equipment is realized by correcting an on-chip RAM register, so that any operation on the SJA1000 needs to be finished by reading and writing the register, and firstly, a reading and writing algorithm of the register based on an IO port is introduced. Because the data and the address are multiplexed buses, if a certain register needs to be operated, the register address is firstly written into the register, the register address is written into the SJA1000, then the ALE pin latch address of the SJA1000 is controlled, and finally the data of the register is written or read as required.
Writing data to a register
1) Enabling the SN74LVC4245 chip, and setting the data direction to be from MCU data to SJA 1000;
2) the input latch signal ALE of the SJA1000 is high, so that the latch is effective;
3) assigning 8-bit addresses of registers needing to be written to IO pins PA 0-PA 7 according to bits, and setting PA 0-PA 7 as output;
4) delaying for 10 clock cycles;
5) the input latch signal ALE of the device SJA1000 is low, so that the latch is invalid;
6) the chip select signal CS of the SJA1000 is low, so that the chip select is effective;
7) the write signal WR of the SJA1000 is low, and the write is effective;
8) assigning 8-bit data to be written to IO pins PA 0-PA 7 according to bits;
9) delaying for 10 clock cycles;
10) write signal WR of SJA1000 is high, write is invalid;
11) delaying for 10 clock cycles;
12) the chip select signal CS of the SJA1000 is high, so that the chip select is invalid;
13) and turning off the SN74LVC4245 chip enable.
Reading data from a register
1) Enabling the SN74LVC4245 chip, and setting the data direction to be from MCU data to SJA 1000;
2) the input latch signal ALE of the SJA1000 is high, so that the latch is effective;
3) assigning 8-bit addresses of registers needing to be read to IO pins PA 0-PA 7 according to bits;
4) delaying for 10 clock cycles;
5) the input latch signal ALE of the device SJA1000 is low, so that the latch is invalid;
6) the chip select signal CS of the SJA1000 is low, so that the chip select is effective;
7) the data direction of the SN74LVC4245 chip is set to be SJA1000 data to MCU;
8) the SJA1000 read signal RD is low, and the reading is effective;
9) delaying for 10 clock cycles;
10) STM32 IO pins PA 0-PA 7 are set as input, values of PA 0-PA 7 are read, and the combination is data needing to be read;
11) a write signal RD of the SJA1000 is high, and reading is invalid;
12) the chip select signal CS of the SJA1000 is high, so that the chip select is invalid;
13) and turning off the SN74LVC4245 chip enable.
(1) Initialization of SJA1000
Initialization flow for SJA1000 is as in fig. 4.
1) The SJA1000 enters a reset mode, namely RST is set to be low level, the reset is effective, the data of the status register is read, and the reset mode is determined to be entered;
2) setting clock frequency, writing a frequency division value into a clock frequency division register, and reading the register value to ensure correct writing;
3) setting a baud rate, writing a baud rate value into a baud rate register, and then reading the baud rate register value to ensure correct writing;
4) setting an acceptance code and a mask, respectively writing configuration data into an acceptance code register and an acceptance mask register, and then reading the value of the register to ensure correct writing;
5) setting output control, writing configuration data into an output control register, and reading the value of the register to ensure correct writing;
6) the SJA1000 exits the reset mode, i.e., RST is set high, the reset is disabled and enters the active mode, and the read status register ensures that the reset mode has been exited.
(2) CAN bus data transmission algorithm
The data transmission flow chart is shown in fig. 5.
1) Reading the status register of the SJA1000, if the receiving status of the status register is 1 (receiving) and the sending buffer status is 0 (locking), waiting until the receiving status is 0 and the sending buffer status is 1;
2) writing frame information bytes into a first address area (0x10) of a descriptor area of a transmission buffer, and writing identification codes into second to fifth byte areas (0x11-0x14) of the descriptor area of the transmission buffer in sequence;
3) writing data into a data area of the sending buffer area;
4) to the command register, the 0x01 command is written.
(3) CAN bus data receiving algorithm
The data reception flow chart is shown in fig. 6.
1) Reading a status register of the SJA1000, and if the receiving status of the status register is 1 (receiving) and the receiving buffer status is 0 (no available data), waiting until the receiving status is 0 and the receiving buffer status is 1;
2) reading 0x10 to 0x22 in turn;
3) writing a command of 0x04 to the SJA1000 command register, releasing the receive buffer;
4) delaying for 10 counting cycles;
5) a command of 0x00 is written to the SJA1000 command register, initializing the command register.
- 上一篇：一种医用注射器针头装配设备
- 下一篇：efuse控制器、芯片及efuse读写系统