阅读说明：本技术 用于将物理层与通过多重图案化形成的图案对齐的方法和相关联系统 (Method and associated system for aligning a physical layer with a pattern formed by multiple patterning ) 是由 细川浩平 于 2020-06-19 设计创作，主要内容包括：公开了用于将物理层与通过多重图案化形成的图案对齐的方法以及相关联的系统。一种方法可以包含确定用于通过多重图案化形成图案的第一层与第二层之间的未对齐向量。所述方法还可以包含基于所述第一层与所述第二层之间的所述未对齐向量计算所述图案的中心位置。进一步地,所述方法可以包含将第三层与所述图案的中心位置对齐。(Methods for aligning a physical layer with a pattern formed by multiple patterning and associated systems are disclosed. A method may include determining a misalignment vector between a first layer and a second layer for patterning by multiple patterning. The method may also include calculating a center position of the pattern based on the misalignment vector between the first layer and the second layer. Further, the method may include aligning a third layer with a center position of the pattern.)

1. A method of aligning a physical layer with a pattern, the method comprising:

determining a misalignment vector between a first layer and a second layer for forming a pattern by multiple patterning;

calculating a center position of the pattern based on the misalignment vector between the first layer and the second layer; and

aligning the third layer with a center position of the pattern.

2. The method of claim 1, wherein determining the misalignment vector comprises determining the misalignment vector between the first layer comprising an active line layer and the second layer comprising an active shear layer.

3. The method of claim 1, wherein calculating the center position of the pattern comprises calculating a center position of an active area pattern.

4. The method of claim 1, wherein aligning the third layer with the center position of the pattern comprises aligning one of a digit line, a bit contact, and a word line with the center position of the pattern.

5. The method of claim 1, wherein aligning comprises aligning the third layer with the center position of the pattern based on two or more misalignment vectors including the misalignment vector between the first layer and the second layer and at least one of a misalignment vector between the third layer and the first layer and a misalignment vector between the third layer and the second layer.

6. The method of claim 5, wherein aligning the third layer with the center position of the pattern based on the two or more misalignment vectors comprises:

multiplying each of the two or more unaligned vectors by an associated transformation matrix;

summing the products of the multiplications to produce a registration vector between the third layer and the center location of the pattern; and

aligning the third layer with the center position of the pattern based on the registration vector.

7. The method of claim 1, wherein aligning the third layer with the center location of the pattern comprises calculating a registration vector between the third layer and the center location of the pattern.

8. The method of claim 1, wherein calculating the center position of the pattern further comprises calculating the center position of the pattern based on a transformation matrix associated with the first layer and the second layer, components of the transformation matrix being determined by at least one of a pattern angle of the first layer and a pattern angle of the second layer.

9. A method of aligning a physical layer with a virtual layer formed by multiple patterning, the method comprising:

forming a dummy layer by multiple patterning;

determining a displacement vector between at least two physical layers used to form the virtual layer;

determining a center of the virtual layer based on the displacement vector;

determining a registration vector between a third physical layer and the center of the virtual layer; and

aligning the third physical layer with a center of the virtual layer based on the registration vector.

10. The method of claim 9, wherein determining the registration vector between the third physical layer and the center of the virtual layer comprises determining the registration vector based on at least two measurable vectors associated with the at least two physical layers and the third physical layer.

11. The method of claim 9, wherein determining the registration vector between the third physical layer and the center of the virtual layer comprises determining the registration vector based on two or more displacement vectors including the displacement vector between at least two physical layers, a displacement vector between the third physical layer and a first layer of the at least two physical layers, and a displacement vector between the third physical layer and a second layer of the at least two physical layers.

12. The method of claim 9, wherein determining the registration vector between the third physical layer and the center of the virtual layer comprises determining the registration vector based on: at least one of the displacement vector between at least two physical layers and the displacement vector between the third physical layer and a first layer of the at least two physical layers and the displacement vector between the third physical layer and a second layer of the at least two physical layers.

13. The method of claim 9, wherein determining the center of the virtual layer further comprises determining the center of the virtual layer based on a transformation matrix that includes a component of the transformation matrix determined by at least one of a pattern angle of a first layer of the at least two physical layers and a pattern angle of a second layer of the at least two physical layers.

14. The method of claim 13, wherein determining the center of the virtual layer further comprises multiplying the transformation matrix by the displacement vector.

15. A system, comprising:

one or more processors configured to:

determining a registration vector between a first layer and a second layer for forming a pattern by one or more multiple patterning operations;

determining a location of the pattern based on the registration vector between the first layer and the second layer and a first transformation matrix associated with the first layer and the second layer; and is

Determining a registration vector between a third layer and the pattern based on two or more of: the registration vector between the first layer and the second layer, the registration vector between the third layer and the first layer, and the registration vector between the third layer and the second layer.

16. The system of claim 15, wherein the one or more processors are further configured to align the third layer with the pattern based on the registration vector between the third layer and the location of the pattern.

17. The system of claim 15, wherein a component of the first transformation matrix is based on at least one of a pattern angle of the first layer and a pattern angle of the second layer.

18. The system of claim 15, wherein the registration vector is determined based on the registration vector between the first layer and the second layer and a registration vector between the third layer and the first layer.

19. The system of claim 18, wherein the one or more processors are further configured to:

multiplying the registration vector between the first layer and the second layer by the first transformation matrix to produce a first product, the first transformation matrix including components based on at least one of a pattern angle of the first layer and a pattern angle of the second layer;

multiplying the registration vector between the third layer and the first layer by a second transformation matrix to produce a second product, the second transformation matrix including components based on at least one of a pattern angle of the first layer and a pattern angle of the second layer; and is

Summing the first product and the second product.

20. The system of claim 15, wherein the one or more processors are configured to determine the location of the pattern based on a location vector of the pattern determined by multiplying the registration vector between the first layer and the second layer by the first transformation matrix, the first transformation matrix including component values determined based on at least one of a pattern angle of the first layer and a pattern angle of the second layer.

21. A method of aligning a physical layer with a pattern, the method comprising:

determining a displacement vector associated with a pattern formed by the multiple patterning;

determining a center position of the pattern based on the displacement vector; and

determining a registration vector between a conductive layer and the center location of the pattern based on a plurality of measurable vectors.

22. The method of claim 21, further comprising aligning the conductive layer with the center position of the pattern based on the registration vector.

23. The method of claim 21, wherein determining the registration vector comprises determining the registration vector based on two or more measurable vectors associated with a first layer used to form the pattern, a second layer used to form the pattern, and the conductive layer.

24. The method of claim 23, wherein determining the registration vector based on the two or more measurable vectors comprises determining the registration vector based on the displacement vector and a registration vector between the conductive layer and either of the first layer or the second layer.

25. The method of claim 23, wherein determining the displacement vector comprises determining a displacement vector between the first layer and the second layer.

Technical Field

Embodiments of the present disclosure relate to semiconductor manufacturing, and more particularly, to a method of aligning a physical layer with a pattern formed by multiple patterning. Still more particularly, some embodiments relate to methods and related systems for determining the center of a pattern formed by one or more multiple patterning operations, and aligning a physical layer with the center of the pattern.

Background

Photolithography, a process commonly used in Integrated Circuit (IC) fabrication, may be used to create two-dimensional patterns on a substrate by the controlled application of energy (e.g., electromagnetic, ion beam, or other radiation) to a reactive material or resist deposited on the substrate. As geometries in substrate processing continue to shrink, the technical challenges of forming structures on substrates increase. One suitable lithographic technique for achieving increasingly smaller critical dimensions involves multiple patterning techniques for providing pitch separation. Such multiple patterning techniques include, for example, double patterning (i.e., involving two patterned layers), triple patterning (i.e., involving three patterned layers), and quadruple patterning (i.e., involving four patterned layers). In a multiple patterning process, a target pattern that is not printable in a single lithographic step is decomposed into multiple pattern layers with smaller pitch that can be printed by a single lithographic step. In the case of double patterning, the target pattern is decomposed into a first pattern layer and a second pattern layer.

As multiple patterned lithography evolves, another challenge in IC manufacturing involves aligning successive structures (e.g., layers and/or patterns) of the IC to ensure proper electrical contact between the structures of the IC. Without proper alignment, the IC may not be able to function as specified (if at all).

Disclosure of Invention

One or more embodiments of the present disclosure include a method of aligning a physical layer with a pattern. The method may include determining a misalignment vector between a first layer and a second layer for patterning by multiple patterning. The method may also include calculating a center position of the pattern based on the misalignment vector between the first layer and the second layer. Further, the method may include aligning a third layer with a center position of the pattern.

In another embodiment, a method of aligning a physical layer with a pattern may include determining a displacement vector associated with a pattern formed by multiple patterning. The method may further include determining a center position of the pattern based on the displacement vector. Further, the method may include determining a registration vector between a conductive layer and the center location of the pattern based on a plurality of measurable vectors.

According to another embodiment, a method may include aligning a physical layer with a virtual layer formed by multiple patterned lithography. In this embodiment, the method includes forming a virtual layer by multiple patterning, and determining a displacement vector between at least two physical layers used to form the virtual layer. Further, the method may include determining a center of the virtual layer based on the displacement vector. Also, the method may include determining a registration vector between a third physical layer and the center of the virtual layer. Further, the method may include aligning a third physical layer with a center of the virtual layer based on the registration vector.

Some embodiments of the present disclosure include a system. The system may include one or more processors. The one or more processors may be configured to determine a registration vector between a first layer and a second layer for patterning by multi-patterning. The one or more processors may also be configured to determine a location of the pattern based on the registration vector between the first layer and the second layer and a first transformation matrix associated with the first layer and the second layer. Further, the one or more processors may be configured to determine a registration vector between a third layer and the pattern based on two or more of: the registration vector between the first layer and the second layer, the registration vector between the third layer and the first layer, and the registration vector between the third layer and the second layer.

Drawings

Fig. 1 shows a shallow trench isolation module and a word line module.

Fig. 2 depicts the number of layers and the pattern, as well as the displacement of the pattern due to displacement errors associated with the number of layers.

Fig. 3 contains a plot showing the displacement of the physical layer and the displacement of the center of the pattern.

Fig. 4A contains a plot depicting example measured error values.

FIG. 4B contains a plot depicting correction values for the measured error values shown in FIG. 4A.

Fig. 5A depicts a pattern formed by the combination of two layers.

Fig. 5B illustrates two layers, a pattern formed by the combination of the two layers, and a layer to be aligned with the pattern, according to various embodiments of the present disclosure.

Fig. 6 contains a plot illustrating example layers and vectors used in examples of aligning layers to patterns according to various embodiments of the present disclosure.

Fig. 7A depicts a plot containing example measured error values.

Fig. 7B depicts a plot of example correction values including the measured error values shown in fig. 7A, in accordance with various embodiments of the present disclosure.

Fig. 8A contains a plot of measured error values illustrating an example of a corrected value converted into a layer according to various embodiments of the present disclosure.

Fig. 8B contains a plot of measured error values illustrating an example of conversion into correction values for another layer, in accordance with various embodiments of the present disclosure.

Fig. 9 contains a plot illustrating example layers and vectors used in another example of aligning a layer with a pattern in accordance with various embodiments of the present disclosure.

Fig. 10 contains a plot illustrating example layers and vectors used in yet another example of aligning a layer with a pattern in accordance with various embodiments of the present disclosure.

Fig. 11 is a flow diagram of an example method of aligning a layer with a pattern in accordance with various embodiments of the present disclosure.

Fig. 12 is a block diagram of an example computing system, in accordance with various embodiments of the present disclosure.

Fig. 13 is a block diagram of an example processing system including the example computing system of fig. 12, in accordance with various embodiments of the present disclosure.

Detailed Description

As described above, the geometry in the substrate process continues to shrink. This trend is applicable to memory devices, such as semiconductor-based integrated circuits in computers or other electronic systems, to meet the demand for increased portability, computing power, memory capacity, and energy efficiency. For example, reducing feature sizes is evident in Dynamic Random Access Memory (DRAM), flash memory, Static Random Access Memory (SRAM), Ferroelectric (FE) memory, and the like. For example, a DRAM may contain thousands of identical device components in the form of memory cells. By reducing the size of the electronic device structure including the memory cells and the width and length of the conductive lines used to access the memory cells, the memory device can be made smaller. In addition, storage capacity can be increased by installing more memory cells on a given area in a memory device.

The continued reduction in feature size places greater demands on the techniques used to form the features. As mentioned above, photolithography is commonly used to pattern features such as conductive lines and pads. The concept of pitch can be used to describe the size of these features. Pitch can be defined as the distance between the same points in two adjacent features. These features are typically defined by spaces between adjacent features, which are typically filled with a material such as an insulator. Thus, pitch can be viewed as the sum of the width of a feature and the width of the space on one side of the feature that separates the feature from an adjacent feature. However, due to factors such as optics and the limitations of the wavelength of light or other radiation available, lithographic techniques have a minimum achievable pitch below which a particular lithographic technique cannot reliably form features. Therefore, the minimum pitch of the photolithographic technique is an obstacle to continued feature size reduction.

Shrinking feature sizes to increase bit density continues beyond the resolution limits of state-of-the-art lithographic scanners. Various multiple patterning lithography techniques are evolving in order to form device patterns below the resolution limit (e.g., below 37nm half-pitch). However, as will be appreciated, the specifications for overlay control (e.g., aligning layers within registration tolerances between layers) have become more stringent.

Various modules, such as Shallow Trench Isolation (STI) modules, bit contact modules, redistribution layers (RDL) modules, and capacitor modules, are formed by the combination of several layers (e.g., in one or more multiple patterning operations). Referring to fig. 1, an STI module 100 is depicted. STI module 100 includes an active line layer 102, an Active Chop (AC) layer 104, and an Active Area (AA)106 including a pattern 107 having a center 108. For example, the active line layer 102 contains four times the pitch of the active line pattern below the 18nm half pitch, and the AC layer 104 contains a double pitch of the space pattern. As will be appreciated, the pattern 107 is formed by a combination of the layers 102 and 104 (i.e., by one or more multiple patterning operations). More specifically, layer 104 may "cut" the active lines in layer 102 to form "island" patterns 107 on active areas 106. The pattern 107 formed by multiple patterning lithography is not a physical layer.

To form a semiconductor component, such as a memory cell, a layer in another module (e.g., a Word Line (WL) module, a Bit Contact (BC) module, or a Digit Line (DL) module) should be directly aligned with the center of the pattern of active areas. More specifically, with continued reference to FIG. 1, the word line module 110, and more specifically the word lines 112 of the word line module 110, should be directly aligned with the center 108 of the pattern 107.

However, conventional overlay control can only align with the physical layer, and thus conventional overlay control cannot align the physical layer (e.g., conductive layer) with the pattern (e.g., pattern 107) formed by multiple patterned lithography. More specifically, displacement errors (e.g., displacement errors of the layers 102 and 104) may occur in a multiple patterning process, and thus alignment with the layers 102 or 104 may displace a pattern (e.g., the pattern 107) formed by the multiple patterning process.

More specifically, referring to fig. 2, an example showing displacement errors and displacement of the pattern will now be described. Fig. 2 shows a layer (also referred to herein as "layer 202"), such as an active line layer (e.g., layer 102 of fig. 1), represented by line 202. Fig. 2 further illustrates a layer (also referred to herein as "layer 204"), such as an effective shear layer (e.g., layer 104 of fig. 1), represented by line 204. Further, at each intersection of line 202 and line 204, there may be a pattern center 206. It should be noted that fig. 2 depicts only nine pattern centers, however a pattern center may exist at each intersection of line 202 and line 204. Fig. 2 further shows conductive lines (e.g., word lines) 208, where each conductive line 208 is aligned with a pattern center 206.

For example, during one or more multiple patterning operations to form the layer 202 and the layer 204, misalignment (also referred to herein as "displacement error") may occur between the layer 202 and the layer 204 (i.e., in the direction depicted by the arrow 210). This displacement error may displace each pattern center 206 (i.e., in the direction depicted by arrow 212). As another example, another displacement error may occur between the layers 202 and 204 (i.e., in the direction depicted by arrow 214) during one or more multiple patterning operations. This displacement error may displace the pattern center 206 (i.e., in the direction depicted by arrow 216).

Further, the displacement between the layers 202 and 204 may not be equal to the displacement of the pattern center 206. For example, fig. 3 depicts a diagram 300 including two physical layers and a pattern center, the diagram being formed by one or more multiple patterning operations. More specifically, FIG. 3 shows a layer 302, a layer 304, and a pattern center 306. In this example, if the layer 302 is displaced by +/-1nm, the pattern center 306 may be displaced by +/-1.08nm in the x-direction and/or +/-2.80nm in the y-direction. Thus, as should be appreciated, there is no linear relationship between the displacement error associated with the layers 302 and 304 and the displacement of the pattern center caused by the displacement error associated with the layers 302 and 304.

Further, in the conventional semiconductor manufacturing method involving only a single layer, if misalignment occurs in, for example, the X-Y direction (i.e., 2D coordinate system), the value to be corrected is the same as the measured error value (e.g., a value measured by a measurement tool). A conventional method of correcting misalignment of a single layer (i.e., formed by photolithography) is more fully described with reference to fig. 4A and 4B. Fig. 4A contains a plot 400 illustrating a plurality of registration error measurements, and fig. 4B contains a plot 410 illustrating a plurality of correction values associated with the error measurements shown in the plot 400. For example, if the measured error is (-2, -1) (i.e., -2nm in the X direction and-1 nm in the Y direction) (i.e., as identified by reference numeral 402 of FIG. 4A), then in conventional methods, the correction will be made with the same value (i.e., as identified by reference numeral 412 of FIG. 4B). Further, if the measured error is (2, 2) (i.e., 2nm in the X-direction and 2nm in the Y-direction) (i.e., as identified by reference numeral 404 of fig. 4A), then correction will be made with the same value (i.e., as identified by reference numeral 414 of fig. 4B). In other words, if the measured error value is E, correction is performed in the opposite direction using the value E. However, this solution is not flexible enough and may not always be accurate.

Various embodiments of the present disclosure relate to aligning a physical layer with a pattern (also referred to herein as a "dummy layer") formed by multiple patterning lithography (e.g., by one or more multiple patterning operations). More particularly, some embodiments relate to forming a pattern (i.e., by one or more multiple patterning operations) and thereafter aligning another physical layer with the pattern. More particularly, some embodiments relate to forming a pattern based on at least two physical layers, determining a displacement error between the at least two physical layers, calculating a center position of the pattern based on the displacement error, determining a registration (e.g., a registration vector) between the center position and a third physical layer based on a plurality of measurable vectors, and aligning the third physical layer with the center position of the pattern based on the determined registration.

As described more fully herein, various embodiments of the present disclosure provide a technical solution to one or more problems caused by techniques that may not be reasonably performed by humans, and are rooted in computer technology in order to overcome the above-described problems and/or challenges. Further, at least some embodiments disclosed herein may improve computer-related techniques by allowing a computer to perform functions that previously could not be performed by the computer.

Various embodiments of the present disclosure are described with reference to patterns generated based on two layers, however, the embodiments are not limited thereto. Rather, embodiments disclosed herein may be applicable to aligning a physical layer with a pattern formed by a combination of any number of layers (e.g., by double patterning, triple patterning, quadruple patterning, or any other multiple patterning operation). Further, while various embodiments have been described with reference to an X-Y coordinate system, the present disclosure is not so limited and it should be understood that other coordinate systems (e.g., orthogonal coordinate systems, non-orthogonal coordinate systems, polar coordinate systems, coordinate systems based on three or more arbitrary angular axes, but not so limited) may be used in performing various embodiments.

Fig. 5A depicts layers a and B and a pattern C formed by the combination of layers a and B (i.e., by multiple patterning lithography). Fig. 5B illustrates that layer D may be aligned with the combination of layers a and B, which is equivalent to layer D being aligned with pattern (also referred to herein as "virtual layer") C. For example, layer a of fig. 5A and 5B may comprise an active line layer (e.g., layer 102 of fig. 1) or any other type of layer, layer B of fig. 5A and 5B may comprise an active cut layer (e.g., layer 104 of fig. 1) or any other type of layer, pattern C of fig. 5A and 5B may comprise an Active Area (AA) pattern (e.g., pattern 107 of fig. 1) or any other (i.e., formed by multiple patterning lithography) pattern, and layer D of fig. 5B may comprise a conductive layer, such as a word line (e.g., word line 112 of fig. 1), a digit line, a Bit Contact (BC) or any other type of layer.

According to various embodiments, as described more fully below, two physical layers (e.g., layer A and layer B (e.g., displacement vectors) may be determined based on one or more pattern angles associated with the two physical layers (e.g., angle thetaa and/or angle thetab; see, e.g., FIG. 9 and/or FIG. 10)) Displacement vectors (also referred to herein as "misalignment vectors" or "registration vectors") between the two. Further, as described more fully below, according to some embodiments, the displacement vector between two physical layers (e.g., the displacement of layer B from layer a (e.g., the displacement vector) may be based) To determine a position vector for a pattern (e.g., pattern C) formed by one or more multiple patterning operations involving the two physical layers. Further, in some embodiments, may be based on one or more measurable vectors associated with the two physical layers and/or the third layer (e.g., displacement vectors for layer B and layer a (i.e., displacement vectors)) Layer a and layer D (i.e., registration vector)) And/or a registration vector of layer B with layer D (i.e., a registration vector)) To determine a registration (i.e., relative position vector) from the third layer (e.g., layer D) to the pattern (e.g., pattern C). Further, according to various embodiments, the determined registration (i.e., registration of layer D with virtual layer C) may be used to align a third layer (e.g., layer D) with a pattern (e.g., pattern C) (e.g., in a semiconductor manufacturing process).

As described more fully below, the registration vector Reg (i.e., shown in equation (1)) used to determine the alignment (i.e., registration) with the pattern (i.e., produced by the multiple patterning process involving n layers) is based on a measurable error vector (#) that is based on_n，η_n) And a transformation matrix containing component values ("components") (i.e., a, b, c, and d) based on the geometric information used to form one or more layers of the pattern. The registration vector Reg is provided by the following equation:

where ξ and η are measured error values,is a transformation matrix, and n denotes for multiple patterningAn nth layer (e.g., two, three, four, five, or more layers) of measured alignment of the operational registration data.

According to various embodiments, as described more fully below, if the measured error (also referred to herein as "misalignment," "displacement," or "bias") is (x, y), the value to be corrected may be a (x, y), where a represents a transformation matrix (i.e., the transformation matrix of equation (1)).

Referring to fig. 6, an example of determining the center position of a pattern (e.g., an active area pattern) will now be described. Fig. 6 depicts layer M, which may comprise a physical layer. As a specific example, layer M may comprise an active line layer (e.g., layer a shown in fig. 5A). Further, fig. 6 depicts layer N, which may also contain a physical layer. As a specific example, layer N may comprise an Active Cutoff (AC) layer (e.g., layer B shown in fig. 5A). In the multiple patterning process, layer N may move from an ideal position to an actual position due to the interlayer displacement between layer M and layer N. In fig. 6, layer N is a layer depicted at an ideal position, and layer N' is a layer depicted at an actual position.

In this example, assume that layer M is the anchor layer (i.e., layer M remains at the ideal location (e.g., 0, 0)). Position vector (i.e., vector) of layer M) Is zero. Further, due to the inter-layer displacement (i.e., displacement vector) between layer N and layer M) The position of a pattern (e.g., a pattern formed by one or more multiple patterning operations involving layer M and layer N) may be moved from an ideal position (indicated by origin O) to an actual position (indicated by reference letter P). Further, assuming registration back to the origin O, the offset vector of the pattern center position may be defined as a vectorTo define a pattern as the root of the registration tree (e.g., N > M > P), a vector may be definedDefined as the position vector of the pattern. Vector quantityMay be equal to a vectorThe registration vector of the pattern may be determined according to the following equation:

further, a position vectorCan be based on displacement vectorsAnd (4) determining. Thus, based on equation (1), the position vector(i.e., the amount of the acid,) The following can be defined:

whereinIs a displacement vectorAnd a, b, c and d are component values of the transformation matrix.

Thus, based on the position vectorThe center of the pattern is known, and the position vector is based on the misalignment vector(i.e., misalignment between layer M and layer N) and a transformation matrix (i.e., component values that include a pattern angle based on layer M (e.g., relative to the x-axis) and/or layer N (e.g., relative to the x-axis)). As described more fully below, the center of the pattern may be used to determine registration between the center of the pattern and the physical layer to be aligned with the pattern. Further, using the determined registration (i.e., the registration between the center of the pattern and the physical layer to be aligned with the pattern), the physical layer (e.g., in a semiconductor manufacturing process) may be aligned with the center of the pattern.

Fig. 7A shows a plot 700 containing measured error values (e.g., (x, y)), and fig. 7B shows a plot 710 containing correction values (e.g., a (x, y), where a is a transformation matrix). More specifically, plot 700 contains a plurality of measured error values (i.e., displacement error values), and plot 710 depicts a plurality of correction values associated with the measured error values of plot 700 and determined in accordance with various embodiments as disclosed more fully below. For example, if the measured error value is-2 nm in the X-direction (i.e., Δ X) and-1 nm in the Y-direction (i.e., Δ Y) (i.e., as identified by reference numeral 702 of fig. 7A), a correction value (i.e., as identified by reference numeral 712 of fig. 7B) associated with the measured error value may be determined based on the measured error value and the transformation matrix (e.g., based on equation (3)) (i.e.,). As another example, if the measured error value is 2nm in the x-direction and 2nm in the y-direction (i.e., as identified by reference numeral 704 of fig. 7A), a correction value associated with the measured error value (i.e., as identified by reference numeral 714 of fig. 7B) may be determined based on the measured error value and a transformation matrix (e.g., based on equation (3)).

Fig. 8A is a plot 800 containing a plurality of example measured error values 802 (i.e., displacement error values) and associated correction values 804 determined by various embodiments disclosed herein. More specifically, the measured error value 802 is measured based on the misalignment of layer B with layer a (see, e.g., fig. 5A). For example, the measured error value 802 may be measured by one or more measurement tools. Further, in this example, based on equation (3) above, correction value 804 for aligning layer D with pattern C (see fig. 5B) formed by layer a and layer B (see, e.g., fig. 5A) may be determined from correction value 804Provided wherein in this example a is 0.5, b is-0.575581, c is 1.303030, and d is-1.5, andis a measured error value 802 (i.e., a displacement vector in the x and y directions)). As described more fully below, the component values a, B, c, and d may be determined by one or more pattern angles associated with layer a and layer B.

As shown in plot 800, for a measured error value 802 of about-2 nm in the x-direction and about 2nm in the y-direction, the associated correction value 804 is about-4 nm in the x-direction and about-3.6 nm in the y-direction. Further, for a measured error value 802 of about 2nm in the x-direction and about 0nm in the y-direction, the associated correction value 804 is about 2.8nm in the x-direction and about 2.5nm in the y-direction. As should be appreciated, the correction value 804 may be determined or may be used to determine the center of the pattern.

Fig. 8B is a plot 850 containing example measured error values 852 (i.e., displacement error values) and associated correction values 854 determined by various embodiments disclosed herein. More specifically, the measured error value 852 is measured based on the misalignment of layer B with layer a (see, e.g., fig. 5A). For example, the measured error value 852 may beMeasured by one or more measuring tools. Further, in this example, based on equation (3) above, the correction value 854 for aligning layer D with pattern C (see FIG. 5B) may be determined byWherein in this example a is 1.5, b is-0.575581, c is 1.303030 and d is-0.5, andis a measured error value 852 (i.e., a displacement vector in the x-direction and the y-direction)). As described more fully below, the component values a, B, c, and d may be determined by one or more pattern angles associated with layer a and layer B.

As shown in plot 850, for a measured error value 852 of about-2 nm in the x-direction and about 2nm in the y-direction, the associated correction value 854 is about-6.1 nm in the x-direction and about-1.6 nm in the y-direction. Further, for a measured error value 852 of about 1nm in the x-direction and about 1nm in the y-direction, the associated correction value 854 is about 2nm in the x-direction and about 1.8nm in the y-direction. As should be appreciated, the correction value 854 determines or may be used to determine the center of the pattern.

Further, in the example described with reference to FIGS. 8A and 8B, to align a physical layer (e.g., physical layer D) with a pattern (e.g., pattern C; see FIG. 5B), the registration vector Reg may be determined by the following equation (i.e., based on equation (1)):

referring to the plot 900 shown in fig. 9, example operations for aligning a layer with a pattern according to various embodiments of the present disclosure will now be described. Plot 900 depicts a line 902 representing layer a (also referred to as an "anchor layer") of fig. 5A and a line 906 representing layer B (also referred to as a "supplemental layer") of fig. 5A. In this example, for purposes of explanation, line 902 will be referred to as layer a and line 906 will be referred to as layer B. Fig. 9 further depicts the origin O.

Each of the layers a and B shown in fig. 9 is positioned at an ideal position, however, the layer B may deviate from the ideal position due to process variations. Thus, fig. 9 further depicts line 904 of layer B at an actual location (i.e., a deviation from an ideal location). For purposes of explanation, line 904 will be referred to as layer B'. Further, a dot 908 in fig. 9 represents the center of a pattern formed by layer a and layer B (i.e., by multiple patterning lithography), and a dot 910 represents the center of a layer (i.e., a physical layer, such as layer D in fig. 5B) to be aligned with the dot 908. For purposes of explanation, point 908 will be referred to as the center position of target pattern C, and point 910 will be referred to as layer D. Plot 900 further depicts an angle θ a (i.e., the angle from the x-axis to line 902) and an angle θ b (i.e., the angle from the x-axis to line 904).

To determine the geometric relationship of the layers shown in FIG. 9, each layer may be defined as a linear function according to the following equation:

for layer a: y ═ ax, where slope a ═ arctan (θ a); (5)

for layer B: y-bx, wherein slope b-arctan (θ b); (6)

for layer B': y-BAy ═ b (x-BAx), where the displacement vector

Further, equations (8) - (13) (also referred to as "simultaneous equations") provided below may be used to calculate the coordinates of the intersection between layer a (i.e., at origin O) and layer B, where the displacement vector is(also referred to herein as a "position vector," "misalignment vector," "displacement vector," or "registration vector"), as provided by equation (14).

x＝(BAy-bBAx)/(a-b)； (8)

y＝a(BAy-bBAx)/(a-b)； (9)

x＝-b/(a-b)*BAx+b/(a-b)*BAy； (10)

y＝-ab/(a-b)*BAx＝a/(a-b)*BAy； (11)

x＝1/(a-b){-bBAx+BAy}； (12)

y＝1/(a-b){-abBAx+aBAy}； (13)

In this example, equation (14) is equal to the vectorThe vector and the position vectorInstead, the position vector is based on a displacement vectorAnd (4) determining. Displacement vectorIs equal to the vectorThe vector and the position vectorThe opposite is true. Thus, a position vectorIs equal to the vector

Further, a position vector of the position of the center position of pattern C (e.g., center 108 of pattern 107 of FIG. 1) may be providedCan be used as displacement vectorIs calculated, the displacement vector defines the relative position of layer B to layer a. More specifically, a position vectorThe following can be calculated:

position vectorAnd then may be used to determine how to align the physical layer (e.g., layer D) with pattern C (e.g., the center of pattern C). More specifically, the registration vector (also referred to herein as the "position")May be derived from three measurable vectors (e.g., vectors) associated with three physical layersVector quantitySum vector) Two measurable vectors. For example, registration vectorsThe following can be determined:

wherein

Further, substituting equation (16) into equation (20) provides equation (21):

in addition, the vectorCan be divided into vectorsSum vectorTo provide equation (22):

further, substituting equation (22) into equation (21) provides equations (23) - (27):

whereinIs an identity matrix;

further, the vectorCan be divided into vectorsSum vectorTo provide equations (29) and (30):

further, substituting equation (29) into equation (27) provides equations (30) - (35):

further, the vectors are registeredProvided by equation (36):

it should be noted that the registration vectorsFrom two of the three measurable vectors (e.g.,andtwo of (d) as provided above.

It should be understood that, in this example,is a misalignment vector between layer A and layer D, andis the misalignment vector between layer B and layer D. Based on registration vectorsLayer D (e.g., word line) may be aligned with pattern C. For example, assuming layer D is a word line (e.g., word line 112 of fig. 1) and pattern C is an active area pattern (e.g., pattern 107 of fig. 7), layer D may be based on the registration vectorAligned with the center of pattern C (e.g., center 108 of fig. 1). Further, according to some embodiments, the vector is registeredMay be used to make one or more adjustments to semiconductor processes and/or systems used to manufacture other semiconductor devices, such as manufacturing system 1330 in fig. 13.

Another example operation for aligning a layer with a pattern in accordance with various embodiments will now be described with reference to plot 1000 shown in fig. 10. Drawing 1002 depicts a line 1002 representing a first layer (e.g., layer a of fig. 5B) (also referred to as an "anchor layer") and a line 1006 representing a second layer (e.g., layer B of fig. 5B) (also referred to as a "supplemental layer"). In this example, for purposes of explanation, line 1002 will be referred to as layer Q and line 1006 will be referred to as layer R. Fig. 10 further depicts the origin O.

Each of the layers Q and R shown in fig. 10 is positioned at an ideal position, however, the layer R may deviate from the ideal position due to process variations. Fig. 10 further depicts a line 1004 representing the layer R at an actual location (i.e., a deviation from an ideal location). For purposes of explanation, line 1004 will be referred to as layer R'. Further, a point S in fig. 10 indicates the center of a pattern formed by the layer Q and the layer R (i.e., by multiple patterning lithography), and a line 1010 indicating the layer T to be aligned with the center of the pattern S. Plot 1000 further depicts angle θ q (i.e., the angle from the x-axis to line 1002, angle θ r (i.e., the angle from the x-axis to line 1006), and angle θ t (i.e., the angle from the x-axis to line 1010).

To determine the geometric relationship of the layers shown in FIG. 10, each layer may be defined as a linear function according to the following equation:

for layer Q: y is qx, where q is arctan (θ q); (37)

for layer R: y-rx, wherein r-arctan (θ r); (38)

for layer R': y-RQy ═ r (x-RQx), where the displacement vector

For layer T: y-tx, where t-arctan (θ t); (40)

further, vector based on layer Q and layer RCan be determined as a misalignment vectorAs shown in equation (41):

the anchor layer Q is fixed at the origin O, and is therefore used to determine a vector of the center position of the pattern S (e.g., the center 108 of the pattern 107 of FIG. 1)Is equal to the vectorAs shown in equation (42):

misalignment vectorAnd measurable misalignment vectorAnd then may be used to determine how to align the physical layer (e.g., layer T) with the center of the pattern S. More specifically, based on equation (1), the misalignment vectorCan be provided by equation (43):

as should be appreciated, in this example,is a misalignment vector between layer Q and layer T, andis the misalignment vector between layer R and layer T. Based on unaligned vectorsLayer T (e.g., word lines, digit lines, or bit contacts) may be aligned with pattern S. For example, assume that layer T is a word line (e.g., word line 112 of FIG. 1) and pattern S is an active area pattern (e.g., pattern 107 of FIG. 7), based on a misalignment vectorLayer T may be aligned with the center of pattern S (e.g., center 108 of fig. 1).

FIG. 11 is a flow diagram of an example method 1100 of aligning a physical layer with a pattern formed by multiple patterning lithography, in accordance with various embodiments disclosed. The method 1100 may be arranged in accordance with at least one embodiment described in the present disclosure. In some embodiments, method 1100 may be performed by an apparatus or system, such as system 1200 of fig. 12, system 1300 of fig. 13, or another apparatus or system. Although illustrated as discrete blocks, various blocks may be separated into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation.

The method 1100 may begin at block 1102, where a misalignment vector between a first layer and a second layer for forming a pattern by multiple patterning operations is determined, and the method 1100 may continue to block 1104. For example, a misalignment vector (e.g., a misalignment vector)) The first layer and/or the second layer may be modified by one or more angles (e.g., angle thetaa and/or angle thetab; see, e.g., fig. 9 and/or fig. 10). Further, for example, the first layer may comprise an active line layer (e.g., layer 102 of an STI module; see FIG. 1) and the second layer may comprise an active cut layer (e.g., layer 104 of an STI module; see FIG. 1). Further, for example, the alignment vector may be determined by a processor (e.g., processor 1210 of fig. 12).

At block 1104, a center position of the pattern may be calculated based on the misalignment vector, and the method 1100 may continue to block 1106. More specifically, for example, the center position of the pattern (e.g., center position 108 of pattern 107; see FIG. 1) may be based on a misalignment vector (e.g., the misalignment vector of FIG. 9)) And a transformation matrix associated with at least one of the first layer and the second layer. Still more specifically, the center position of the pattern may be determined by multiplying the misalignment vector (i.e., the relative position between the first layer and the second layer) by a transformation matrix (e.g., as shown in equation (3)). Further, component values (also referred to herein as "components")") may be varied by a pattern angle of the first layer and/or a pattern angle of the second layer (e.g., angle thetaa and/or angle thetab; see, e.g., fig. 9 and/or fig. 10). Further, for example, the center position of the pattern may be determined by a processor (e.g., processor 1210 of fig. 12).

At block 1106, the third layer may be aligned with a center position of the pattern. For example, the third layer may include a conductive layer such as a bit contact, a digit line, or a word line. Further, for example, the third layer may be aligned based on the determined registration vector between the third layer and the center position of the pattern. For example, the registration vector may be determined by two or more measurable vectors. More specifically, for example, the registration vector may be determined by at least one of a misalignment vector between the first layer and the second layer and a misalignment vector between the third layer and the first layer and a misalignment vector between the third layer and the second layer. Still more particularly, in some embodiments, the registration vector may be determined by multiplying each of the two or more measurable vectors by an associated transformation matrix and summing the multiplied products to produce the registration vector (e.g., according to equation (1)). Further, for example, the registration vector may be determined by a processor (e.g., processor 1210 of fig. 12).

Modifications, additions, or omissions may be made to method 1100 without departing from the scope of the disclosure. For example, the operations of method 1100 may be performed in a different order. Further, the outlined operations and actions are provided by way of example only, and some of the operations and actions may be optional, combined into fewer operations and actions, or expanded into additional operations and actions without departing from the spirit of the disclosed embodiments. For example, in various embodiments, a method (e.g., method 1100) may include forming a pattern by one or more multiple patterning operations involving a first layer and a second layer. More specifically, in one example, the first layer may be formed by a multiple patterning operation, and the second layer may be formed by another multiple patterning operation. In these examples, these multiple patterning operations may form a pattern. In another example, the pattern may be formed by a single multiple patterning operation to form the first layer and the second layer. For example, alignment may be performed by a scanner or stepper to measure a position vector that refers to a grid (reference grid). Further, the third layer may be processed based on the position vectors of the first layer and the second layer.

Fig. 12 illustrates an example system 1200 in accordance with at least one embodiment described herein. System 1200 may include any suitable system, device, or apparatus configured to perform one or more embodiments of the present disclosure. The system 1200 may include a processor 1210, a data store 1220, a memory 1230, and a communications device 1240, all of which may be communicatively coupled. Data store 1220 may contain various types of data, such as measured error values, position vectors, and/or registration vectors associated with a semiconductor process, or other measurable vectors associated with one or more layers used in a semiconductor manufacturing process, geometric information data for one or more layers, and/or any other data relevant to determining a center position of a pattern formed by multiple patterning and/or aligning a physical layer with a pattern (e.g., a center of a pattern).

In general, processor 1210 may comprise any suitable special purpose or general purpose computer, computing entity, or processing device comprising various computer hardware or software modules, and may be configured to execute instructions stored on any suitable computer-readable storage medium. For example, processor 1210 may include a microprocessor, microcontroller, Digital Signal Processor (DSP), Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA), or any other digital or analog circuitry configured to interpret and/or execute program instructions and/or process data.

Although illustrated in fig. 12 as a single processor, it is to be understood that processor 1210 may comprise any number of processors distributed across any number of network locations or physical locations, configured to perform any number of operations described herein, individually or collectively. In some embodiments, processor 1210 may interpret and/or execute program instructions and/or process data stored in data storage 1220, memory 1230, or both data storage 1220 and memory 1230. In some embodiments, processor 1210 may fetch program instructions from memory 1230 and load the program instructions into memory 1230.

After the program instructions are loaded into memory 1230, processor 1210 may execute the program instructions, such as instructions for performing method 1100 (see fig. 11) as described herein. For example, the processor 1210 may determine a misalignment vector between multiple layers (e.g., a first layer and a second layer) used in a multiple patterning operation. The processor 1210 may also calculate a position (e.g., a center position) of the pattern ("virtual layer") based on the misalignment vector. Further, the processor 1210 may determine how to align the third layer with the calculated position of the virtual layer (or align the third layer).

Data storage 1220 and memory 1230 may include a computer-readable storage medium or one or more computer-readable storage media for carrying or having computer-executable instructions or data structures stored thereon. Such computer-readable storage media can be any available media that can be accessed by a general purpose or special purpose computer, such as the processor 1210.

By way of example, and not limitation, such computer-readable storage media can comprise non-transitory computer-readable storage media including Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), compact disc read only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory devices (e.g., solid state memory devices), or any other storage medium that can be used to carry or store desired program code in the form of computer-executable instructions or data structures and that can be accessed by a general purpose or special purpose computer. Combinations of the above should also be included within the scope of computer-readable media. Computer-executable instructions may include, for example, instructions and data configured to cause processor 1210 to perform an operation or group of operations.

Communication unit 1240 may include any component, device, system, or combination thereof configured to transmit or receive information over a network. In some embodiments, the communication unit 1240 may communicate with other locations, other devices at the same location, or even with other components within the same system. For example, communication unit 1240 may include a modem, a network card (wireless or wired), an infrared communication device, a wireless communication device (e.g., an antenna), and/or a chipset (e.g., a bluetooth device, 802.6 device (e.g., a Metropolitan Area Network (MAN)), a WiFi device, a WiMax device, a cellular communication facility, etc.), among others. The communication unit 1240 may allow data to be exchanged with a network and/or any other device or system.

Fig. 13 depicts an example processing system 1300 in accordance with various embodiments of the present disclosure. As shown, the processing system 1300 includes one or more tools 1310, which may include one or more measurement tools configured to measure one or more displacement measurements (e.g., error values) associated with, for example, semiconductor manufacturing. More specifically, tool 1310 may include a photo stepper and/or scanner tool configured to measure alignment (i.e., a position vector from an ideal position) and/or registration (e.g., a position vector between layers).

Further, the processing system 1300 further includes a computing system 1320, which may include the system 1200 of FIG. 12. Tool 1310 may be configured to provide one or more measurements to computing system 1320 for performing the various embodiments disclosed herein. Although computing system 1320 is shown coupled to tool 1310, in some embodiments computing system 1320 may include tool 1310. Further, the processing system 1300 includes a fabrication system 1330 that may include, for example, one or more steppers used for various semiconductor fabrication operations, such as, but not limited to, photolithography, etching, cleaning, doping, and singulation.

In some embodiments, the computing system 1320 may be configured to provide information (e.g., data and/or instructions) for performing various semiconductor manufacturing operations to the manufacturing system 1330. In other words, for example, one or more operations performed by the manufacturing system 1330 may be based on one or more measurements made by the tool 1310 and/or operations performed by the computing system 1320. Further, the tool 1310 may perform measurements on devices (e.g., layers and/or patterns) formed by the processing system 1330.

According to various embodiments disclosed herein, and in contrast to some conventional systems and methods, a position of a pattern may be determined based on displacement errors associated with at least two physical layers forming the pattern, and a third physical layer may be aligned with the position of the pattern based on a determined registration between the position of the pattern and the third physical layer.

One or more embodiments of the present disclosure include a method of aligning a physical layer with a pattern. For example, a method may include determining a misalignment vector between a first layer and a second layer for patterning by multiple patterning. The method may also include calculating a center position of the pattern based on the misalignment vector between the first layer and the second layer. Further, the method may include aligning a third layer with a center position of the pattern.

According to another embodiment, a method may include aligning a physical layer with a virtual layer formed by multiple patterned lithography. In this embodiment, the method includes forming a virtual layer by multiple patterning, and determining a displacement vector between at least two physical layers used to form the virtual layer. Further, the method may include determining a center of the virtual layer based on the displacement vector. Also, the method may include determining a registration vector between a third physical layer and the center of the virtual layer. Further, the method may include aligning a third physical layer with a center of the virtual layer based on the registration vector.

Some embodiments of the present disclosure include a computing system. The computing system may include one or more processors. The one or more processors may be configured to determine a registration vector between a first layer and a second layer for patterning by multi-patterning. The one or more processors may also be configured to determine a location of the pattern based on the registration vector between the first layer and the second layer and a first transformation matrix associated with the first layer and the second layer. Further, the one or more processors may be configured to determine a registration vector between a third layer and the pattern based on two or more of: the registration vector between the first layer and the second layer, the registration vector between the third layer and the first layer, and the registration vector between the third layer and the second layer.

As used herein, unless otherwise specified, the term "semiconductor" should be broadly construed to encompass microelectronic and MEMS devices (e.g., magnetic memories, optical devices, etc.) that may or may not operate with semiconductor functionality.

By convention, the various features illustrated in the drawings may not be drawn to scale. The illustrations presented in this disclosure are not intended to be actual views of any particular apparatus (e.g., device, system, etc.) or method, but are merely idealized representations which are employed to describe various embodiments of the present disclosure. Accordingly, the dimensions of the various features may be arbitrarily increased or decreased for clarity. In addition, some of the drawings may be simplified for clarity. Accordingly, the drawings may not depict all of the components of a given apparatus (e.g., device) or all of the operations of a particular method.

Terms used herein, and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as "open" terms (e.g., the term "including" should be understood as "including but not limited to," the term "having" should be understood as "having at least," the term "includes" should be understood as "includes but is not limited to," etc.).

Additionally, if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles "a" or "an" limits any particular claim containing such introduced claim recitation to embodiments containing only one such recitation, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an" (e.g., "a" and/or "an" should be interpreted to mean "at least one" or "one or more"); the same holds true for the use of definite articles used to introduce claim recitations. As used herein, "and/or" includes any and all combinations of one or more of the associated listed items.

In addition, even if a specific number of an introduced claim recitation is explicitly recited, it should be understood that such recitation should be interpreted to mean at least the recited number (e.g., the bare recitation of "two recitations," without other modifiers, means at least two recitations, or two or more recitations). Further, in those instances where a convention similar to "at least one of A, B and C, etc." or one or more of "A, B and C, etc." is used, such a construction is generally intended to encompass a alone, B alone, C, A and B, A and C, B and C or A, B and C, among others. For example, use of the term "and/or" is intended to be interpreted in this manner.

Further, any disjunctive word or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase "a or B" should be understood to encompass the possibility of "a" or "B" or "a and B".

In addition, the terms "first," "second," "third," and the like, herein do not necessarily imply a particular order or number of elements. In general, the terms "first," "second," "third," and the like are used as general identifiers to distinguish between different elements. If the terms "first," "second," "third," etc. do not imply a particular order, these terms should not be construed as implying a particular order. Moreover, if the terms "first," "second," "third," etc. are not indicated to imply a particular number of elements, these terms should not be taken to imply a particular number of elements.

The embodiments of the present disclosure described above and illustrated in the drawings are not intended to limit the scope of the present disclosure, which is encompassed by the appended claims and their legal equivalents. Any equivalent embodiments are within the scope of the present disclosure. Indeed, various modifications of the disclosure, in addition to those shown and described herein (e.g., alternative useful combinations of the elements described), will become apparent to those skilled in the art from the description. Such modifications and embodiments are also within the scope of the appended claims and equivalents.