阅读说明：本技术 基于斯格明子的自旋忆阻突触器件 (Spin memristor synapse device based on sigermin ) 是由 曾中明 李荣鑫 张宝顺 于 2020-04-03 设计创作，主要内容包括：本发明公开了一种基于斯格明子的自旋忆阻突触器件,其包括：两端口存在自旋霍尔角的重金属层；位于重金属层上的磁性自由层,所述磁性自由层被划分为隧道结区和斯格明子存储区域,所述隧道结区和所述斯格明子存储区之间设置有阻碍斯格明子自由移动的阻隔件；依次设置于隧道结区上的绝缘势垒层、磁性钉扎层和金属顶电极；其中,所述金属顶电极被配置为连接初始化电流以在所述隧道结区产生斯格明子,所述重金属层被配置为连接写入电流以驱动斯格明子在所述隧道结区和所述斯格明子存储区之间移动,所述金属顶电极还被配置为连接读出电流以读取所述隧道结区的电导。本发明提供的自旋忆阻突触器件具有读写能耗低、稳定性高、电导态数目相对多的优点。(The invention discloses a spinmemristor synapse device based on a siganus, which comprises: two ports of the heavy metal layer have spinning Hall angles; the magnetic free layer is positioned on the heavy metal layer and is divided into a tunnel junction area and a skullam storage area, and a barrier piece for blocking the free movement of skullam is arranged between the tunnel junction area and the skullam storage area; the insulating barrier layer, the magnetic pinning layer and the metal top electrode are sequentially arranged on the tunnel junction region; wherein the metal top electrode is configured to connect an initialization current to generate a sggmen in the tunneling junction region, the heavy metal layer is configured to connect a write current to drive the sggmen to move between the tunneling junction region and the sggmen storage region, and the metal top electrode is further configured to connect a readout current to read a conductance of the tunneling junction region. The spin memristor synapse device provided by the invention has the advantages of low read-write energy consumption, high stability and relatively large number of electric conduction states.)

1. A spinmemristive synapse device based on a sGermin, comprising:

two ports of the heavy metal layer have spinning Hall angles;

a magnetic free layer on the heavy metal layer; the magnetic free layer is divided into a tunnel junction area and a skullet storage area, and a barrier piece for blocking the free movement of skullet is arranged between the tunnel junction area and the skullet storage area;

the insulating barrier layer, the magnetic pinning layer and the metal top electrode are sequentially arranged on the tunnel junction region;

wherein the metal top electrode is configured to connect an initialization current to generate a sggmen in the tunneling junction region, the heavy metal layer is configured to connect a write current to drive the sggmen to move between the tunneling junction region and the sggmen storage region, and the metal top electrode is further configured to connect a readout current to read a conductance of the tunneling junction region.

2. The spin memristive synapse device of claim 1, wherein the barrier is a high perpendicular magnetic anisotropy barrier layer on the magnetic free layer, a length of the high perpendicular magnetic anisotropy barrier layer in a width direction of the magnetic free layer not completely covering the magnetic free layer.

3. The spin memristive synapse device of claim 2, wherein the material of the high perpendicular magnetic anisotropy barrier layer is CoFeB/MgO, Fe/MgO, [ Co/Pt ], FeB/MgO, or Co.

4. The spin memristive synapse device of claim 3, wherein the high perpendicular magnetic anisotropy barrier layer has a thickness of 1nm to 100 nm.

5. The spin memristive synapse device of claim 1, wherein the barrier is a nanowire disposed in the magnetic free layer, the nanowire having one end connected to the tunneling junction region and another end connected to the sggming sub-storage region.

6. The spin-memristive synapse device of claim 5, wherein the nanowire has a linewidth configured to allow passage of only a single sggmine under its boundary.

7. The spin memristive synapse device of claim 6, wherein the nanowire has a linewidth of 20nm to 10 μ ι η.

8. A spin memristive synaptic device according to any of claims 1-7, wherein the material of the heavy metal layer is Pt or Ta; the magnetic free layer is made of CoFeB, Fe, [ Co/Pt ]]FeB or Co; the insulating barrier layer is made of MgO and TiO₂、Al₂O₃Or MgAlO; the magnetic pinning layer comprises a first magnetic layer, an antiferromagnetic coupling spacer layer and a second magnetic layer which are sequentially arranged from bottom to top, wherein the materials of the first magnetic layer and the second magnetic layer are respectively selected from Co, Fe and [ Co/Pt ]]CoFeB, CoFe, FeB or NiFe, the material of the anti-ferromagnetic coupling spacer layer is Ru or W; the metal top electrode is made of Pt, Ta, Cr, Au or Ti.

9. The spin memristive synapse device of claim 8, wherein the heavy metal layer has a thickness of 2nm to 10nm, the magnetic free layer has a thickness of 0.5nm to 3nm, the insulating barrier layer has a thickness of 0.5nm to 3nm, the magnetic pinning layer has a thickness of 2nm to 10nm, and the metal top electrode has a thickness of 10nm to 100 nm.

10. A spin memristive synaptic device according to any of claims 1-7, wherein the heavy metal layer is as wide as the magnetic free layer, the heavy metal layer extending from both ends of the magnetic free layer in a length direction.

Technical Field

The invention belongs to the technical field of magnetic elements, and particularly relates to a spinmemristor synapse device based on a siganus quantum and protected by topology.

Background

Memristors, which are the fourth basic element of the circuit after resistance, capacitance, and inductance, have attracted much research in recent years on their non-volatility, excellent read-write energy ratios, and write rates. Meanwhile, the low-energy-consumption efficient operation and storage separation system of the traditional von Neumann architecture computer is increasingly unable to meet the requirements of people on high-performance computation, and the brain-like nerve morphology computation is regarded as the most potential competitor of the traditional von Neumann architecture and is rapidly developed.

The brain-like nerve morphology calculation realizes high-performance calculation such as identification through the construction of an artificial neural network, the artificial neural network comprises two devices of artificial neurons and artificial synapses, the neurons have the characteristic of nonlinear response, and the synapses have the function of weight storage and are the most key devices for realizing the storage-calculation-integrated high-energy-efficiency calculation. The memristor is the most beneficial implementation mode of the synaptic device, the nonvolatile variable conductance of the memristor can be used as variable synaptic weight, and the low writing and reading power consumption makes the memristor very beneficial to the network construction with large integration level. Therefore, memristors have attracted a large amount of research in recent years as neural network synapses.

The spintronics device has intrinsic variable resistance, and different electric conduction states of the spintronics device have unique advantages in the aspects of stability and writing and reading power consumption. However, conventional spintronics devices, such as magnetic tunnel junctions, often have only two electrical conductivity states and are not suitable as polymorphic synapses.

Disclosure of Invention

In view of the defects in the prior art, in order to realize stable polymorphic conductance, namely polymorphic synaptic weight in a spintronics device, the invention aims to provide a spinmemristive synapse device based on Stegimen with low read-write energy consumption, high stability and relatively large number of conducting states.

In order to achieve the purpose, the invention adopts the following technical scheme:

a spinmemristive synapse device based on a siganus, comprising:

two ports of the heavy metal layer have spinning Hall angles;

a magnetic free layer on the heavy metal layer; the magnetic free layer is divided into a tunnel junction area and a skullet storage area, and a barrier piece for blocking the free movement of skullet is arranged between the tunnel junction area and the skullet storage area;

the insulating barrier layer, the magnetic pinning layer and the metal top electrode are sequentially arranged on the tunnel junction region;

wherein the metal top electrode is configured to connect an initialization current to generate a sggmen in the tunneling junction region, the heavy metal layer is configured to connect a write current to drive the sggmen to move between the tunneling junction region and the sggmen storage region, and the metal top electrode is further configured to connect a readout current to read a conductance of the tunneling junction region.

Preferably, the barrier is a high perpendicular magnetic anisotropy barrier layer on the magnetic free layer, a length of the high perpendicular magnetic anisotropy barrier layer in a width direction of the magnetic free layer not completely covering the magnetic free layer.

Specifically, the material of the high perpendicular magnetic anisotropy barrier layer is CoFeB/MgO, Fe/MgO, [ Co/Pt ], FeB/MgO or Co.

More specifically, the high perpendicular magnetic anisotropy barrier layer has a thickness of 1nm to 100 nm.

Preferably, the barrier is a nanowire disposed in the magnetic free layer, one end of the nanowire is connected to the tunnel junction region, and the other end of the nanowire is connected to the sgemin storage region.

In particular, the nanowire has a line width that is configured to allow only a single sgemin to pass through under its boundary.

More specifically, the nanowire has a line width of 20nm to 10 μm.

Wherein the heavy metalThe material of the layer is Pt or Ta; the magnetic free layer is made of CoFeB, Fe, [ Co/Pt ]]FeB or Co; the insulating barrier layer is made of MgO and TiO₂、Al₂O₃Or MgAlO; the magnetic pinning layer comprises a first magnetic layer, an antiferromagnetic coupling spacer layer and a second magnetic layer which are sequentially arranged from bottom to top, wherein the materials of the first magnetic layer and the second magnetic layer are respectively selected from Co, Fe and [ Co/Pt ]]CoFeB, CoFe, FeB or NiFe, the material of the anti-ferromagnetic coupling spacer layer is Ru or W; the metal top electrode is made of Pt, Ta, Cr, Au or Ti.

The thickness of the heavy metal layer is 2 nm-10 nm, the thickness of the magnetic free layer is 0.5 nm-3 nm, the thickness of the insulating barrier layer is 0.5 nm-3 nm, the thickness of the magnetic pinning layer is 2 nm-10 nm, and the thickness of the metal top electrode is 10 nm-100 nm.

The heavy metal layer and the magnetic free layer are equal in width, and the heavy metal layer extends out of two ends of the magnetic free layer in the length direction.

The spinmemristive synapse device based on the sGemings provided by the embodiment of the invention utilizes STT (Spin Transfer Torque) current (namely initialization current) to generate the sGemings in a tunneling junction region, and utilizes SOT (Spin Orbit Torque) current (namely writing current) to enable the sGemings to migrate between the tunneling junction region and a storage region, thereby changing the conductance of the tunneling junction region to complete the update of synapse weight, and obtaining the synapse device with relatively large number of conductance states. The generation of the siganus and the reading of the electric conduction state are the same path, the requirements of the SOT current driving siganus movement on the current magnitude are lower than the driving domain wall movement by multiple orders of magnitude, and the initialization current only needs one time, so that the energy consumption for updating and reading the synaptic device weight can be greatly reduced, and the electric conduction state is also greatly increased. In addition, the stability of the synapse device provided by the invention is excellent because of the stability and nonvolatile characteristics of the sgemingson.

Drawings

FIG. 1 is a schematic structural diagram of a spin memristive synapse device as provided in example 1 of the present disclosure;

FIG. 2 is a top view of a spin memristive synapse device as in FIG. 1;

FIG. 3 is a schematic cross-sectional view taken along line A-A of the device of FIG. 2;

FIG. 4 is a schematic structural diagram of a spin memristive synapse device as provided in embodiment 2 of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in detail below with reference to the accompanying drawings. Examples of these preferred embodiments are illustrated in the accompanying drawings. The embodiments of the invention shown in the drawings and described in accordance with the drawings are exemplary only, and the invention is not limited to these embodiments.

It should be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and/or processing steps closely related to the scheme according to the present invention are shown in the drawings, and other details not so relevant to the present invention are omitted.

Example 1

The present embodiment provides a spinmemristive synapse device based on a sigermann, which, with reference to fig. 1-3, includes: the two ports of the heavy metal layer are provided with spin Hall angles 10; a magnetic free layer 20 on the heavy metal layer 10, the magnetic free layer 20 being divided into a tunneling junction region 20a and a sgrming sub-storage region 20 b; an insulating barrier layer 30, a magnetic pinning layer 40, and a metal top electrode 50 sequentially disposed on the tunnel junction region 20 a.

Wherein a barrier 60 is disposed between the tunnel junction region 20a and the sgurni storage region 20b to prevent sgurni from freely moving. In the present embodiment, as shown in fig. 1 to 3, the barrier 60 is a high perpendicular magnetic anisotropy barrier layer on the magnetic free layer 20, and the length of the high perpendicular magnetic anisotropy barrier layer in the width direction (Y direction in fig. 2) of the magnetic free layer 20 does not completely cover the magnetic free layer 20.

Wherein, the magnetic pinning layer 40 is vertical pinning, and the high perpendicular magnetic anisotropy barrier layer and the magnetic free layer are vertical easy axes. The magnetic free layer 20 requires an energy environment for stabilizing the sggmelin, and the perpendicular anisotropy of the high perpendicular magnetic anisotropy barrier layer 60 is significantly higher than that of the magnetic free layer 20 to achieve the function of blocking the sgingelin movement.

Wherein, the heavy metal layer 10 has the same width as the magnetic free layer 20, and the heavy metal layer 10 extends from two ends of the magnetic free layer 20 in a length direction (e.g., an X direction in fig. 2) to form electrodes so as to more conveniently connect current.

Wherein, the material of the heavy metal layer 10 can be selected to be Pt or Ta; the material of the magnetic free layer 20 can be selected from CoFeB, Fe, [ Co/Pt ]]FeB or Co; the material of the insulating barrier layer 30 may be selected from MgO and TiO₂、Al₂O₃Or MgAlO; the magnetic pinning layer 40 comprises a first magnetic layer, an antiferromagnetic coupling spacer layer and a second magnetic layer which are arranged from bottom to top in sequence, wherein the materials of the first magnetic layer and the second magnetic layer can be selected from Co, Fe and [ Co/Pt ] respectively]CoFeB, CoFe, FeB or NiFe, the material of the anti-ferromagnetic coupling spacer layer can be selected to be Ru, W, etc.; the material of the metal top electrode 50 can be selected from Pt, Ta, Cr, Au or Ti. The material of the high perpendicular magnetic anisotropy barrier layer 60 may be selected from CoFeB/MgO, Fe/MgO, [ Co/Pt ]]FeB/MgO or Co.

Wherein, the thickness of the heavy metal layer 10 may be set to 2nm to 10nm, the thickness of the magnetic free layer 20 may be set to 0.5nm to 3nm, the thickness of the insulating barrier layer 30 may be set to 0.5nm to 3nm, the thickness of the magnetic pinning layer 40 may be set to 2nm to 10nm, and the thickness of the metal top electrode 50 may be set to 10nm to 100 nm. The thickness of the high perpendicular magnetic anisotropy barrier layer 60 may be set to 1nm to 100 nm.

Wherein the metallic top electrode 50 is configured to connect an initialization current I_intTo generate a Stargarmin 70 at the tunneling junction region 20a, the heavy metal layer 10 being configured to connect a write current I_writeTo drive the movement of the sgamun 70 between the tunneling junction region 20a and the sgamun storage region 20b, the metal top electrode 50 is further configured to connect the readOutput current I_readTo read the conductance of the tunneling junction region 20 a. Wherein the generation of the sigecures and the reading of the electrical conductivity are the same path.

With reference to fig. 1 to 3, the current I is initialized_intThe magnetic free layer 20 is injected from the junction region, and the spin current generated by the STT effect generates a sigrons in the magnetic free layer junction region 20a of a specific magnetic moment. Wherein the saturation number of the Sgermin, the size of the Sgermin, the repulsive force between the Sgermin, and the initialization current I_intIs determined by the magnitude of the magnetic energy environment of the magnetic free layer 20 and the larger the area of the free layer, the greater the number of saturations. Wherein, after initialization is completed I_intNo further access was made.

At an initialization current I_intAfter a sufficient number of sgrmins are generated at the tunneling junction region 20a, a write current pulse I is applied_writeTo drive migration of the sgurni across or around the barrier created by the high perpendicular magnetic anisotropy barrier layer 60 to the sgurni storage region 20 b. The write current pulse I is due to the existence of potential barriers and the repulsion of the segmentons from each other_writeThe amplitude and pulse time of (a) will affect the number of skulls crossing the barrier region, leaving a different number of skulls at the tunnel junction region 20 a. Similarly, I in the opposite direction_writeThe migration of the sigxels from the sigxel storage region 20b to the tunnel junction region 20a can be driven.

I_writeThe direction of (d) and the direction of motion of the sgemins are determined by the micro-magnetic structure of the sgemins and the spin hall angle of the heavy metal layer 10. For example, for a skullet with the same magnetic structure, the same current is applied to the Pt and Ta heavy metal layers, and the moving directions of the skullet are opposite in both cases.

The number of sgrmine remaining in the tunnel junction region 20a determines the conductance of the junction region, and different numbers of sgrmine may have different conductances as determined by I_readReading out, thereby realizing that the current I can be written by synapse_writeControlled variable synaptic weights.

The following will further describe the embodiments of the present invention by combining the law of motion of the siganus oramin and the principle of the tunnel junction conductance.

For a single siganus, the motion of its magnetic structure under the action of spin current generated by SOT can be obtained by the LLG equation:

wherein m is reduced magnetic moment, gamma is gyromagnetic ratio, H_effAlpha is the damping coefficient of the magnetic free layer 20, M, for the total effective field_sTo saturate the magnetic moment, mu_BIs Bohr magneton, theta_SHAnd t_fThe spin Hall angle of the heavy metal layer 10 and the thickness, j, of the magnetic free layer 20_eIs the SOT current. The calculation of the material system results in the SOT effect that the skulls move along or against the SOT current direction, and the threshold current density for driving the movement of the skulls is 10⁶A/m²Order of magnitude, 10 of specific driven domain wall¹⁰A/m²The magnitude is much lower. The speed of the movement of the skynerger is 10-100 m/s, and the direction is determined by the spin Hall angle. The energy consumption using the sggmen as the basis for the electrical conduction state is much lower than that using the domain wall, and therefore the energy consumed by the conductance change (i.e., the update of synaptic weights) of the sggmen-based memristor-stressed device is much lower than that of the conventional memristor.

Assuming that the magnetic free layer 20 and the magnetic pinned layer 40 are perfectly antiparallel before initialization, their electrical conductivity G₁The internal magnetic moment of the seguin is parallel to the magnetic pinning layer 40, the seguin area S, the number of seguin within the junction region n, the junction region area S₀The conductance when the magnetic free layer 20 and the magnetic pinned layer 40 are perfectly parallel is G₂(G₂＞G₁). And, in case that the area of the sgemin wall is small, the total conductance of the tunneling junction region 20a is regarded as the magnetic moment parallel region with the area nS and the area S₀The antiparallel regions of magnetic moments of-nS are parallel. Then, the total conductance of the tunnel junction region 20a is calculated according to the following formula:

from the above equation, it can be understood that the total conductance of the tunnel junction region 20a can be controlled by the number of sgrmins, and thus, by choosing the appropriate I_writeThe amplitude and the width control the number of the sgemins, and further control the conductance, namely, the conductance is updated to the synaptic weight of the spin memristive synaptic device, so that the synaptic device with relatively more conductive state number is obtained.

Example 2

Compared with embodiment 1, the blocking member 60 located between the tunneling junction region 20a and the segmentum storage region 20b in this embodiment is different from that in embodiment 1, and the rest of the components are the same, so the same parts are not repeated in this embodiment.

Referring to fig. 4, in the present embodiment, the barrier 60 between the tunnel junction region 20a and the sggming sub-storage region 20b is a nanowire 60 disposed in the magnetic free layer 20, and one end of the nanowire 60 is connected to the tunnel junction region 20a, and the other end is connected to the sggming sub-storage region 20 b. After the magnetic free layer 20 is completed, the nanowires 60 are formed in the magnetic free layer 20 by a patterned etching process, for example.

The line width of the nanowire 60 is determined according to the size of the generated siganus oramin 70, and the boundary effect of the nanowire only allows the single siganus min to pass through, and the siganus min moves in the nanowire 70 in an aligned mode. Meanwhile, the entry of the siganus into the nanowire is hindered due to the existence of repulsive force between the siganus. In a preferred embodiment, the line width of the nanowire may be set to 20nm to 10 μm.

In the same manner as in example 1, by a write current pulse I_writeTo drive the migration of the siganus oramin between the tunnel junction region 20a and the siganus min storage region 20b through the nanowire 70, leaving a different number of siganus min at the tunnel junction region 20 a. The number of sgrmine remaining in the tunnel junction region 20a determines the conductance of the junction region, and different numbers of sgrmine may have different conductances as determined by I_readReading out, thereby realizing that the current I can be written by synapse_writeControlled variable synaptic weights.

The two spining memristive synapse devices based on the skamming are provided by the embodiments of the present invention, and are a tunnel junction region and a skamming storage region, the generation of the skamming is completed by using the STT current, the migration of the skamming, that is, the update of the synapse weight, is completed by using the SOT current, and the synapse device with a relatively large number of conductive states is obtained. The generation of the siganus and the reading of the electric conduction state are the same path, the requirements of the SOT current driving siganus movement on the current magnitude are lower than the driving domain wall movement by multiple orders of magnitude, and the initialization current only needs one time, so that the energy consumption for updating and reading the synaptic device weight can be greatly reduced, and the electric conduction state is also greatly increased. The spin memristor synapse device provided by the embodiment of the invention has the characteristics of nonvolatility, high stability, extremely low writing and reading energy consumption, large number of electric conduction states and easiness in control, and has great advantages as a synapse device of a neural network.

The foregoing is directed to embodiments of the present application and it is noted that numerous modifications and adaptations may be made by those skilled in the art without departing from the principles of the present application and are intended to be within the scope of the present application.