阅读说明：本技术 半导体器件 (Semiconductor device with a plurality of transistors ) 是由 韩广涛 葛薇薇 于 2020-07-29 设计创作，主要内容包括：公开了一种半导体器件,包括衬底和位于衬底上的体区,体区上表面包括依次连接的集电区、基区和发射区,在集电区和基区区域中包括场氧区,在该场氧区上包括场板结构,该场板结构为阶梯场板结构。本发明的半导体器件的场板结构在集电区与基区之间的PN结反偏时,可以调节集电区电场,辅助耗尽集电区,在不影响集电区的尺寸和掺杂浓度的情况下,提升器件的耐压,并且阶梯场板结构在集电区和基区区域中提供不同规格的调节电场,针对不同位置提供不同的调节电场,提升了场板结构的应用效果,提升器件性能。(The semiconductor device comprises a substrate and a body region positioned on the substrate, wherein the upper surface of the body region comprises a collector region, a base region and an emitter region which are sequentially connected, the collector region and the base region comprise field oxide regions, the field oxide regions comprise field plate structures, and the field plate structures are stepped field plate structures. According to the field plate structure of the semiconductor device, when PN junctions between the collector region and the base region are reversely biased, the electric field of the collector region can be adjusted, the collector region is exhausted in an auxiliary mode, the withstand voltage of the device is improved under the condition that the size and the doping concentration of the collector region are not influenced, the stepped field plate structure provides adjusting electric fields with different specifications in the collector region and the base region, different adjusting electric fields are provided for different positions, the application effect of the field plate structure is improved, and the performance of the device is improved.)

1. A semiconductor device, comprising:

the device comprises a substrate and a body region positioned on the substrate, wherein the upper surface of the body region comprises a collector region, a base region and an emitter region which are sequentially connected,

the collector region and the base region comprise field oxide regions, the field oxide regions comprise field plate structures, the field plate structures are stepped field plate structures, and adjusting electric fields with different specifications are provided in the collector region and the base region.

2. The semiconductor device according to claim 1,

on a longitudinal section of the semiconductor device, the size of the collector region is larger than that of the base region.

3. The semiconductor device according to claim 1 or 2,

and on the longitudinal section of the semiconductor device, the size of the base region is larger than that of the emitter region.

4. The semiconductor device according to claim 3,

on the longitudinal section of the semiconductor device, the collector region and the base region are nested in an L shape, and the emitter region is nested in an L-shaped surrounding space of the base region.

5. The semiconductor device according to claim 1,

the base region is electrically connected with the base electrode, and the field plate structure is electrically connected with the base electrode.

6. The semiconductor device according to claim 1,

and the emitting region connecting lead is electrically led out to be an emitting electrode of the semiconductor device.

7. The semiconductor device according to claim 1,

the collector region comprises a collector leading-out region positioned on the upper surface, the upper surface of the base region comprises a base leading-out region, and the field oxide region is positioned between the collector leading-out region and the base leading-out region and isolates the collector leading-out region from the base leading-out region.

8. The semiconductor device according to claim 1 or 4,

on a top view surface of the semiconductor device, a projection region of the field plate structure is intersected with both the base region and the collector region.

9. The semiconductor device according to claim 1,

the semiconductor device is an NPN type bipolar junction transistor or a PNP type bipolar junction transistor.

10. The semiconductor device according to claim 1,

the field oxide region further comprises an oxide region, the field plate structure is located on the oxide region, and the oxide region is a thick oxide layer.

Technical Field

The invention relates to the technical field of semiconductors, in particular to a semiconductor device.

Background

A BJT (Bipolar Junction Transistor) device is a commonly used semiconductor device, and includes a base, a collector and an emitter, and generally operates under a low voltage condition, for example, the collector is connected to a voltage of 5V, the base is connected to a current, the emitter outputs a current, and sometimes the BJT device needs to be applied to a high voltage occasion to raise the collector voltage, and the raising of the collector voltage needs to raise the withstand voltage between the collector and the base, that is, the breakdown voltage BVcbo (the highest reverse voltage that can be borne between the base and the collector when the emitter is open-circuited) in the common base configuration of the BJT device.

In the conventional technology, BVcbo is improved by reducing the doping concentration of the collector region or manufacturing a larger collector region to improve the withstand voltage, the reduction of the doping concentration of the collector region affects the current capability of the BJT device, and the manufacture of a larger collector region increases the volume of the device and occupies the chip area.

Disclosure of Invention

In view of the above problems, an object of the present invention is to provide a semiconductor device, thereby improving device performance without changing the doping concentration of the current collecting region and the chip occupation area.

According to an aspect of the present invention, there is provided a semiconductor device including:

the device comprises a substrate and a body region positioned on the substrate, wherein the upper surface of the body region comprises a collector region, a base region and an emitter region which are sequentially connected,

the collector region and the base region comprise field oxide regions, the field oxide regions comprise field plate structures, the field plate structures are stepped field plate structures, and adjusting electric fields with different specifications are provided in the collector region and the base region.

Optionally, in a longitudinal cross section of the semiconductor device, a size of the collector region is larger than a size of the base region.

Optionally, in a longitudinal cross section of the semiconductor device, a size of the base region is larger than a size of the emitter region.

Optionally, on a longitudinal section of the semiconductor device, the collector region and the base region are nested in an L shape, and the emitter region is nested in an L-shaped surrounding space of the base region.

Optionally, the base region is electrically connected to a base, and the field plate structure is electrically connected to the base.

Optionally, the emitter region connecting wire is electrically led out as an emitter of the semiconductor device.

Optionally, the collector region includes a collector extraction region located on an upper surface, the base region upper surface includes a base extraction region, and the field oxide region is located between the collector extraction region and the base extraction region to isolate the collector extraction region from the base extraction region.

Optionally, on a top view plane of the semiconductor device, a projection region of the field plate structure intersects both the base region and the collector region.

Optionally, the semiconductor device is an NPN type bipolar junction transistor or a PNP type bipolar junction transistor.

Optionally, the field oxide region further includes an oxide region thereon, the field plate structure is located on the oxide region, and the oxide region is a thick oxide layer.

The semiconductor device comprises a substrate and a body region positioned on the substrate, wherein the upper surface of the body region comprises a collector region, a base region and an emitter region which are sequentially connected, the collector region and the base region comprise field oxide regions, the field oxide regions comprise field plate structures, the field plate structures are stepped field plate structures, and when PN junctions between the collector region and the base region are reversely biased, the field plate structures provide adjusting electric fields with different specifications in the collector region and the base region, provide different adjusting electric fields for different positions to adjust the electric fields of the collector region, assist in improving the effect that the field plate structures deplete the collector region, improve the withstand voltage of the device and improve the performance.

The size of the collector region is increased, the carrier concentration of the collector region is increased, the current capability of the device is improved, the channel resistance is reduced, and the withstand voltage is improved.

The size of the emission region is reduced, a size expansion space is provided for the collector region, the size of the collector region is improved, and the performance of the device is improved.

The emitter region is directly electrically led out as an emitter electrode, so that the space occupation of the electrode lead-out region is reduced, space is provided for the expansion of other regions of the device, and the performance is improved.

The field plate structure is all connected to the base with the base region electricity, and the voltage of field plate structure is the same with base voltage promptly, can self-interacting electric field, need not additionally to provide field plate structure working power supply, improves the practicality.

And an oxide area is arranged between the field plate structure and the field oxide area, so that the voltage resistance of the device can be further improved.

The collector region is L-shaped in the longitudinal section of the semiconductor device, the projection of the field plate structure covers the turning region of the L-shaped collector region and correspondingly covers more PN junction surfaces formed by the collector region and the base region, the application effect of the field plate technology is improved, and the voltage resistance of the device is improved.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

fig. 1 shows a schematic structural diagram of a semiconductor device according to an embodiment of the present invention.

Detailed Description

Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.

The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples.

Fig. 1 shows a schematic structural diagram of a semiconductor device according to an embodiment of the present invention.

As shown in the figure, fig. 1 is a schematic diagram of a longitudinal cross-sectional structure, a semiconductor device 100 of this embodiment is a BJT device, and includes a substrate 110, a collector region 120, a base region 130, and an emitter region 140, where the collector region 120 is located on the substrate 110, the base region 130 is located on the upper surface of the collector region 120, the emitter region 140 is located on the upper surface of the base region 130, the upper surface of the collector region 120 includes a collector lead-out region 121 (connected to a collector C), the upper surface of the base region 131 includes a base lead-out region 131 (connected to a base B), and on the upper surface of the semiconductor device 100 (also on the upper surface of a body region formed by the collector region 120, the base region 130, and the emitter region 140), the collector lead-out region 121, the base lead-out region 131, and the emitter region 140 are active regions and are sequentially distributed at intervals, and the collector lead-out region. Wherein a field plate structure 160 is provided on the second isolation region 152 (corresponding to the field oxide region between the collector extraction region 121 and the base extraction region 131, on which the field plate structure 160 may be directly provided), the field plate structure 160 being electrically connected to the base B, electrically connected to the base extraction region 131, obtaining the same potential as the base.

The collector extraction region 121, the collector 120 and the emitter region 140 are all doped with a first conductivity type, wherein the emitter region 140 itself can be directly used as an emitter extraction region to be electrically extracted to form an emitter E, and the doping concentrations of the collector extraction region 121 and the collector region 120 are different, so that the structural requirements of the BJT device are met.

The base region 130 and the base lead-out region 131 are doped with the second conductivity type, and the doping concentrations are different, so that the structural requirements of the BJT device are met. Corresponding to the NPN type BJT device, the first conductive type doping is N type doping, and the second conductive type doping is P type doping; the first conductive type doping is P type doping, and the second conductive type doping is N type doping, corresponding to the PNP type BJT device. The substrate 110 may be a P-type silicon substrate or an N-type silicon substrate.

In the semiconductor device 100 of the present embodiment, in the longitudinal cross section shown in fig. 1, the collector region 120 and the base region 130 are nested in an L shape, the emitter region 140 is nested in an L-shaped surrounding space of the base region 130, and a uniform radiation shape from the upper left corner to the lower right corner is formed, so that the size of the emitter region 140 with low requirement on carriers is reduced, a collector region 120 with a larger size can be provided, more collector region carriers can be provided, and the current capability of the semiconductor device 100 is improved; or the same number of carriers is provided in a larger size, the integral doping concentration of the collector region is low, the withstand voltage can be improved, and the current capability of the device can be ensured due to the auxiliary depletion effect of the field plate structure on the collector region.

The first isolation region 151 (oxide region) and the second isolation region 152 (oxide region) are disposed on the body region of the semiconductor device 100, and are made of silicon oxide, which can be used to isolate the emitter, the base, and the collector, and can be used as a mask to inject corresponding doping impurities in alignment when the collector extraction region 121, the base extraction region 131, and the emitter region 140 are fabricated, and the silicon oxide layer can be fabricated by using a local oxidation isolation technique.

The field plate structure 160 is arranged on the second isolation region 152 between the collector extraction region 121 and the base extraction region 131, when a PN junction between the collector region and the base region is reversely biased, an electric field between the collector extraction region 121 and the base extraction region 131 on the upper surface of the body region of the semiconductor device 100 is correspondingly adjusted, the collector region 120 is exhausted in an auxiliary mode, the withstand voltage between the collector C and the base B is improved, and the field plate structure 160 is designed to improve the withstand voltage between the collector and the base without adjusting the doping concentration and the transverse size of the collector region 120 of the original semiconductor device 100, so that the device performance is improved. The field plate technology applied to the field plate structure 160 of the present invention can be applied to a thick oxide, that is, the second isolation region 152 is a region formed by a thick oxide layer, and the thickness of the thick oxide layer can reach 20000 angstroms, so as to improve the withstand voltage; or the second isolation region 152 is a shallow trench isolation.

The field plate structure 160 includes a first field plate structure 161 and a second field plate structure 162, both the first field plate structure 161 and the second field plate structure 162 include a lower field plate oxide layer and an upper polysilicon layer, the polysilicon layer connection electrode receives an electric field control voltage (in this embodiment, the polysilicon layer is electrically connected to the base outside the body region of the semiconductor device 100), the field plate oxide layer is in contact connection with the field oxide region of the semiconductor device 100, the polysilicon layer is isolated from the direct electrical connection with the semiconductor body region to achieve a field effect, so as to regulate and control the electrical performance of the corresponding region of the semiconductor device 100 by an electric field and improve the device withstand voltage, wherein the thickness of the first field plate oxide layer 11 of the first field plate structure 161 is smaller than that of the second field plate oxide layer 21 of the second field plate structure 162 to form a stepped field plate structure, different specifications (including the distance from the field source to the upper surface of the body region) are formed between the base region 130 (base extraction, i.e. the distance from the lower surface of the polysilicon layer to the upper surface of the body region of the field plate structure), different adjusting electric fields are provided for different regions of the body region between the base and the collector, the application effect of the field plate structure is improved, and the device performance is improved. In the embodiment, the field plate structure 160 is a two-step stepped field plate structure, but the implementation of the present invention is not limited to two steps, and more steps may be provided.

In the top view of the semiconductor device 100, the projection region of the field plate structure 160 intersects both the base region 130 and the collector region 120, so that the electric field provided by the field plate structure 160 can directly regulate and control the base region 130 and the collector region 120 at the same time, the regulation and control effect on the PN junction formed by the base region and the collector region is improved, the implementation effect of the field plate technology is improved, and the voltage resistance of the device is further improved.

Meanwhile, the field plate structure 160 is arranged in the second isolation region 152, and the doping concentration and size design of the collector region 120 are adjusted independently, so that the method can be implemented simultaneously, and the withstand voltage of the device is further improved.

According to the semiconductor device, the field plate structure is arranged on the isolation region between the collector region and the base region, the body region electric field from the corresponding collector region to the base region is adjusted, the collector region is exhausted in an auxiliary mode, the doping concentration and the size of the collector region do not need to be adjusted, the voltage resistance of the device can be improved, the doping concentration of the collector region is guaranteed, the carrier concentration is guaranteed, the current performance of the device is guaranteed, and the semiconductor device with excellent current performance and voltage resistance is obtained.

While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.