阅读说明：本技术 滤波器、多工器、通信设备及滤波器制造方法 (Filter, multiplexer, communication apparatus, and filter manufacturing method ) 是由 蔡华林 庞慰 于 2020-05-31 设计创作，主要内容包括：本发明涉及滤波器技术领域,特别地涉及一种滤波器、多工器、通信设备及滤波器制造方法。在该滤波器中,在晶圆的管脚上连接金属平板,当晶圆叠加时,可在滤波器的特定节点形成平板电容,在不增加滤波器制作工艺步骤的情况下,利用引入的电容改善滤波器性能。(The present invention relates to the field of filter technologies, and in particular, to a filter, a multiplexer, a communication device, and a method for manufacturing the filter. In the filter, metal flat plates are connected on pins of a wafer, when the wafer is stacked, flat plate capacitors can be formed at specific nodes of the filter, and the performance of the filter is improved by using the introduced capacitors under the condition of not increasing the manufacturing process steps of the filter.)

1. A filter comprises an upper wafer and a lower wafer which are arranged in an up-and-down overlapping mode, wherein a resonator and a butt joint pin are respectively arranged on the butt joint surface of the upper wafer and the lower wafer, a grounding pin is also arranged on the butt joint surface of the lower wafer, and the butt joint pins on the butt joint surface of the upper wafer and the lower wafer are bonded to form the filter,

the upper wafer is provided with at least one first metal flat plate, the first metal flat plate is on the same layer as an upper electrode or a lower electrode of a resonator of the upper wafer, and the first metal flat plate is connected with a butt joint pin of the upper wafer;

the lower wafer is provided with at least one second metal flat plate, the second metal flat plate is on the same layer as the upper electrode or the lower electrode of the resonator of the lower wafer, and the second metal flat plate is connected with the butt joint pin or the grounding pin of the lower wafer;

the upper wafer and the lower wafer are superposed to enable the first metal flat plate and the second metal flat plate to form a capacitor.

2. The filter of claim 1, wherein the first metal plate is located on the upper electrode layer of the resonator of the upper wafer, and the second metal plate is located on the upper electrode layer of the resonator of the lower wafer;

the upper wafer is also provided with a first lifting layer which is connected with the first metal flat plate through a first middle layer, wherein the first lifting layer is on the same layer as the lower electrode of the resonator of the upper wafer, the first middle layer is on the same layer as the piezoelectric layer of the resonator,

and/or the like and/or,

the lower wafer is also provided with a second lifting layer, and the second lifting layer is connected with the second metal flat plate through a second middle layer, wherein the second lifting layer is on the same layer as the lower electrode of the resonator of the lower wafer, and the second middle layer is on the same layer as the piezoelectric layer of the resonator.

3. The filter of claim 2,

the first lifting layer is the same layer as the lower electrode of the upper wafer resonator, and the first lifting layer is a metal layer or an insulating layer;

the second lifting layer is on the same layer with the lower electrode of the lower wafer resonator, and the second lifting layer is a metal layer or an insulating layer.

4. The filter of claim 3, wherein the first raised layer and the second raised layer are metal layers in the shape of interdigitated electrodes.

5. The filter of claim 1,

the position of the upper wafer, which corresponds to the first metal flat plate, is provided with an airless cavity;

and the position of the lower wafer corresponding to the second metal flat plate is provided with no air cavity.

6. The filter according to any one of claims 1 to 4,

all the series resonators are arranged on the upper wafer, and all the parallel resonators are arranged on the lower wafer;

alternatively, the first and second electrodes may be,

all parallel resonators are arranged on the upper wafer, and all series resonators are arranged on the lower wafer.

7. The filter according to any of claims 1 to 4, wherein the surface layers of the first and second metal plates have passivation layers.

8. The filter of any of claims 1 to 7, wherein the resonators are acoustic wave resonators.

9. A multiplexer comprising a filter according to any one of claims 1 to 8.

10. A communication device comprising a filter according to any one of claims 1 to 8.

11. A method of manufacturing a filter, comprising the steps of:

step 1: forming a resonator and a butt joint pin on the first surface of the upper wafer, forming at least one first metal flat plate by using an upper electrode layer or a lower electrode layer of the resonator, and connecting the first metal flat plate with the butt joint pin of the upper wafer;

step 2: forming a resonator, a butt joint pin and a grounding pin on the first surface of the lower wafer, forming at least one second metal flat plate by using an upper electrode layer or a lower electrode of the resonator, and connecting the second metal flat plate with the butt joint pin or the grounding pin of the lower wafer;

and step 3: and superposing the upper wafer and the lower wafer from top to bottom, wherein the first plane of the upper wafer is arranged opposite to the first plane of the lower wafer, and the butt joint pins of the upper wafer are bonded with the butt joint pins of the lower wafer to form a filter, wherein the first metal flat plate and the second metal flat plate are opposite to form a capacitor.

12. The filter manufacturing method according to claim 11,

in the step 1, at least one first metal flat plate is formed by using an upper electrode layer of a resonator, a first intermediate layer is formed by using a piezoelectric layer of the resonator, and a first lifting layer is formed by using a lower electrode layer of the resonator or an insulating layer on the same layer as the lower electrode layer; the first metal flat plate, the first middle layer and the first lifting layer are arranged in a stacked mode;

and adjusting the thickness of the first lifting layer and the distance between the first metal flat plate and the second metal flat plate so as to adjust the capacitance value of the capacitor.

13. The filter manufacturing method according to claim 11 or 12,

in the step 2, at least one second metal flat plate is formed by using the upper electrode layer of the resonator, a second intermediate layer is formed by using the piezoelectric layer of the resonator, and a second lifting layer is formed by using the lower electrode layer of the resonator or the insulating layer on the same layer as the lower electrode layer; the second metal flat plate, the second middle layer and the second lifting layer are arranged in a stacked mode;

and adjusting the thickness of the second lifting layer and the distance between the second metal flat plate and the first metal flat plate so as to adjust the capacitance value of the capacitor.

14. The filter manufacturing method according to claim 11,

and adjusting the capacitance value of the capacitor by adjusting the area of the first metal plate and/or the second metal plate.

15. The filter manufacturing method according to claim 11,

and adjusting the capacitance value of the capacitor by adjusting the thickness of the passivation layer of the first metal plate and/or the second metal plate.

16. The filter manufacturing method according to claim 11,

in the step 1, all series resonators are formed on the first surface of the upper wafer; in the step 2, all parallel resonators are formed on the first surface of the lower wafer;

alternatively, the first and second electrodes may be,

in the step 1, all parallel resonators are formed on the first surface of the upper wafer; in the step 2, all the series resonators are formed on the first surface of the lower wafer.

Technical Field

The present invention relates to the field of filter technologies, and in particular, to a filter, a multiplexer, a communication device, and a method for manufacturing the filter.

Background

The recent trend toward miniaturization and high performance of communication devices has been increasing, posing even greater challenges to rf front-ends. In the radio frequency communication front end, on one hand, miniaturization is realized by reducing the sizes of a chip and a packaging substrate, and on the other hand, better performance is realized by reducing loss sources and better resonator matching design. In the existing filter structure, there are more passive devices for matching, and meanwhile, various structures such as more inductors, capacitors, couplings and the like are additionally introduced for improving specific performances such as roll-off insertion loss and the like.

A typical structure of a general filter is shown in fig. 1, and fig. 1 is a schematic view of a structure of an acoustic wave filter according to the related art. In this filter 10, inductors 121 and 122 and a plurality of resonators (generally referred to as series resonators) 101 to 104 are provided between an input terminal 131 and an output terminal 132, and resonators 111 to 113 (generally referred to as parallel resonators) and inductors 123 to 125 are provided in a plurality of arms (generally referred to as parallel arms) between a connection point of each series resonator and a ground terminal. A mass loading layer is added to each parallel resonator, and the frequency of the parallel resonator and the frequency of the series resonator are different to form the passband of the filter.

Disclosure of Invention

The invention provides a filter, a multiplexer, communication equipment and a filter manufacturing method.

To achieve the above object, according to one aspect of the present invention, there is provided a filter.

The filter comprises an upper wafer and a lower wafer which are vertically overlapped, wherein a resonator and a butt joint pin are respectively arranged on the butt joint surface of the upper wafer and the lower wafer, a grounding pin is also arranged on the butt joint surface of the lower wafer, the butt joint pins on the butt joint surface of the upper wafer and the lower wafer are bonded to form the filter, the upper wafer is provided with at least one first metal flat plate, the first metal flat plate and an upper electrode or a lower electrode of the resonator of the upper wafer are in the same layer, and the first metal flat plate is connected with the butt joint pin of the upper wafer; the lower wafer is provided with at least one second metal flat plate, the second metal flat plate is on the same layer as the upper electrode or the lower electrode of the resonator of the lower wafer, and the second metal flat plate is connected with the butt joint pin or the grounding pin of the lower wafer; the upper wafer and the lower wafer are superposed to enable the first metal flat plate and the second metal flat plate to form a capacitor.

Optionally, the first metal plate is located on the upper electrode layer of the resonator of the upper wafer, and the second metal plate is located on the upper electrode layer of the resonator of the lower wafer; the upper wafer is also provided with a first lifting layer, the first lifting layer is connected with the first metal flat plate through a first middle layer, the first lifting layer is connected with the lower electrode of the resonator of the upper wafer at the same layer, the first middle layer is connected with the piezoelectric layer of the resonator at the same layer, and/or the lower wafer is also provided with a second lifting layer, the second lifting layer is connected with the second metal flat plate through a second middle layer, the second lifting layer is connected with the lower electrode of the resonator of the lower wafer at the same layer, and the second middle layer is connected with the piezoelectric layer of the resonator at the same layer.

Optionally, the first lifting layer is on the same layer as the lower electrode of the upper wafer resonator, and the first lifting layer is a metal layer or an insulating layer; the second lifting layer is on the same layer with the lower electrode of the lower wafer resonator, and the second lifting layer is a metal layer or an insulating layer.

Optionally, the first and second raised layers are metal layers in the shape of interdigitated electrodes.

Optionally, the upper wafer has no air cavity at a position corresponding to the first metal flat plate; and the position of the lower wafer corresponding to the second metal flat plate is provided with no air cavity.

Optionally, all the series resonators are arranged on the upper wafer, and all the parallel resonators are arranged on the lower wafer; alternatively, all parallel resonators are disposed on the upper wafer and all series resonators are disposed on the lower wafer.

Optionally, the surface layers of the first metal plate and the second metal plate have a passivation layer.

Optionally, the resonator is an acoustic wave resonator.

According to another aspect of the present invention, there is provided a multiplexer including the filter of the present invention.

According to yet another aspect of the invention, a communication device is provided, comprising the filter of the invention.

According to still another aspect of the present invention, there is provided a filter manufacturing method.

The manufacturing method of the filter comprises the following steps: step 1: forming a resonator and a butt joint pin on the first surface of the upper wafer, forming at least one first metal flat plate by using an upper electrode layer or a lower electrode layer of the resonator, and connecting the first metal flat plate with the butt joint pin of the upper wafer; step 2: forming a resonator, a butt joint pin and a grounding pin on the first surface of the lower wafer, forming at least one second metal flat plate by using an upper electrode layer or a lower electrode of the resonator, and connecting the second metal flat plate with the butt joint pin or the grounding pin of the lower wafer; and step 3: and superposing the upper wafer and the lower wafer from top to bottom, wherein the first plane of the upper wafer is arranged opposite to the first plane of the lower wafer, and the butt joint pins of the upper wafer are bonded with the butt joint pins of the lower wafer to form a filter, wherein the first metal flat plate and the second metal flat plate are opposite to form a capacitor.

Optionally, in step 1, at least one first metal plate is formed by using an upper electrode layer of the resonator, a first intermediate layer is formed by using a piezoelectric layer of the resonator, and a first lifting layer is formed by using a lower electrode layer of the resonator or an insulating layer on the same layer as the lower electrode layer; the first metal flat plate, the first middle layer and the first lifting layer are arranged in a stacked mode; and adjusting the thickness of the first lifting layer and the distance between the first metal flat plate and the second metal flat plate so as to adjust the capacitance value of the capacitor.

Optionally, in step 2, at least one second metal flat plate is formed by using the upper electrode layer of the resonator, a second intermediate layer is formed by using the piezoelectric layer of the resonator, and a second lifting layer is formed by using the lower electrode layer of the resonator or an insulating layer on the same layer as the lower electrode layer; the second metal flat plate, the second middle layer and the second lifting layer are arranged in a stacked mode; and adjusting the thickness of the second lifting layer and the distance between the second metal flat plate and the first metal flat plate so as to adjust the capacitance value of the capacitor.

Optionally, the capacitance value of the capacitor is adjusted by adjusting the area of the first metal plate and/or the second metal plate.

Optionally, the capacitance of the capacitor is adjusted by adjusting the thickness of the passivation layer of the first metal plate and/or the second metal plate.

Optionally, in step 1, all the series resonators are formed on the first surface of the upper wafer; in the step 2, all parallel resonators are formed on the first surface of the lower wafer; or, in the step 1, all the parallel resonators are formed on the first surface of the upper wafer; in the step 2, all the series resonators are formed on the first surface of the lower wafer.

According to the technical scheme of the invention, in the filter with the series-parallel split structure, the metal electrodes led out from the two wafers form a plate capacitor at a specific node of the filter in the bonding process. The size of the capacitance introduced is related to the area of the electrodes and the material and thickness of the intermediate dielectric, and when the area is larger, the thickness of the dielectric is smaller, the dielectric constant of the dielectric is larger, the capacitance introduced is larger, and vice versa. The size of the introduced plate capacitor can be adjusted at will. Because the metal electrode layer materials of the upper and lower flat plate metal multiplexing filters of the capacitor and the middle medium of the capacitor are air and/or other insulating materials, the formation of the capacitor is consistent with the production flow of a common filter, and no additional process step is required. In the series-parallel structure, all nodes of the filter are led out, so that the introduction of the capacitance of all the nodes can be realized. On one hand, the introduction of the capacitor can adjust the electromechanical coupling coefficient of the resonator and improve the roll-off of the filter; on one hand, the coupling and transmission zero point at a specific position can be adjusted, and out-of-band rejection is improved; on the other hand, the electromechanical coupling coefficients of the resonators can be adjusted, the degree of freedom of the electromechanical coupling coefficients of the resonators in filter design is increased, and matching and insertion loss are improved.

Drawings

For purposes of illustration and not limitation, the present invention will now be described in accordance with its preferred embodiments, particularly with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram of a filter topology according to the prior art;

FIG. 2 is a graph comparing the impedance change of a filter;

FIG. 3 is a graph of the roll-off comparison on the right side of the filter;

FIG. 4 is a graph of the left roll-off comparison of a filter;

FIG. 5 is a graph of the out-of-band rejection of a filter;

FIG. 6 is a graph comparing the insertion loss performance of filters;

FIG. 7 is a graph comparing the echo performance of a filter;

FIG. 8a is a plan view of a wafer on a filter according to an embodiment of the present invention;

FIG. 8b is a plan view of a wafer under a filter according to an embodiment of the invention;

fig. 8c is a cross-sectional view of a filter provided in an embodiment of the present invention;

FIG. 9a is a circuit diagram of a filter incorporating a capacitor according to an embodiment of the present invention;

fig. 9b is a circuit diagram of parallel capacitors of parallel resonators in the filter according to the embodiment of the present invention;

fig. 9c is a circuit diagram of the parallel capacitors of the series resonator and the parallel resonator in the filter according to the embodiment of the present invention;

FIG. 9d is a circuit diagram of a capacitor formed at a ground pin in the filter according to an embodiment of the present invention;

fig. 10 is a flow chart of a filter manufacturing method according to an embodiment of the present invention.

Detailed Description

In the embodiment of the present invention, the metal plate is connected to the pins of the wafer, when the wafers are stacked, a capacitor can be formed at any specific node of the filter, and the introduced capacitor is used to improve the performance of the filter without increasing the manufacturing process steps of the filter, which will be described in detail below.

After a capacitor is introduced into the filter, on one hand, the electromechanical coupling coefficient of the resonator can be adjusted, and the roll-off of the filter is improved; on one hand, the coupling and transmission zero point at a specific position can be adjusted, and the out-of-band rejection of the filter is improved; on the other hand, the electromechanical coupling coefficients of the resonators can be adjusted, the degree of freedom of the electromechanical coupling coefficients of the resonators in filter design is increased, and filter matching and insertion loss are improved.

Fig. 2 is a graph comparing impedance changes of the filter. As shown in fig. 2, the solid line in the figure is the impedance variation curve of the parallel capacitance of the resonator in the filter, and the dotted line is the impedance variation curve of the non-parallel capacitance of the resonator in the filter, and it can be seen from fig. 2 that the electromechanical coupling coefficient of the filter becomes smaller after the resonator in the filter is connected with the capacitor, so that the roll-off of the filter can be improved. Fig. 3 is a graph of the roll-off comparison on the right side of the filter. As shown in fig. 3, the solid line in the figure is the roll-off curve on the right side of the filter when the series resonators are connected in parallel with the capacitors, and the dotted line is the roll-off curve on the right side of the filter when the series resonators are not connected in parallel with the capacitors, as can be seen from fig. 3, after the series resonators are connected in parallel with the capacitors, the frequency interval from a certain insertion loss (for example, -3dB) to a certain suppression (for example, -50dB) on the right side of the filter is shorter, so that the roll-off performance. Fig. 4 is a graph of the roll-off comparison on the left side of the filter. As shown in fig. 4, the solid line in the graph is the roll-off curve of the left side of the filter when the parallel resonators are connected in parallel, and the dotted line is the roll-off curve of the left side of the filter when the parallel resonators are not connected in parallel, as can be seen from fig. 4, after the capacitors are connected in series, the frequency interval from a certain insertion loss (e.g., -3dB) to a certain suppression (e.g., -50dB) on the right side of the filter is shorter, so that the roll-off performance is better.

Fig. 5 is a graph of the out-of-band rejection of the filter. As shown in fig. 5, the solid line in the figure is an out-of-band rejection curve when a capacitor is introduced into the filter, and the dotted line is an out-of-band rejection curve when a capacitor is not introduced into the filter, as can be seen from fig. 5, the left and right sides of the filter have certain out-of-band rejection requirements, and the coupling and transmission zeros at specific positions can be adjusted after the capacitor is introduced, so that the out-of-band rejection of the filter is improved, but the out-of-band zeros cannot be adjusted to a required frequency point without the coupling capacitor, so that the out-.

Fig. 6 is a graph comparing the insertion loss performance of filters. Figure 7 is a graph comparing the echo performance of the filter. As shown in fig. 6, the solid line in the graph is a graph of insertion loss performance when capacitors are connected in parallel to the resonators, and the dotted line is a graph of insertion loss performance when capacitors are not connected in parallel to the resonators, as can be seen from fig. 6, when the electromechanical coupling coefficients are adjusted by using the capacitors connected in parallel to the resonators, the electromechanical coupling coefficients of different resonators are different, and the electromechanical coupling coefficients of different resonators can better adjust the distribution of the resonator impedance in the passband, so as to obtain a better impedance matching effect, thereby improving the passband insertion loss. Fig. 7 shows that when the electromechanical coupling coefficient is adjusted by using the parallel capacitors on the resonators, the electromechanical coupling coefficients of different resonators are different, and the electromechanical coupling differentiation can bring better impedance distribution characteristics, so that the echo can be improved.

In the embodiment of the invention, the upper wafer and the lower wafer of the filter both comprise resonators, metal flat plates are respectively led out from specific nodes of the filter, and when the upper wafer and the lower wafer are superposed to form the filter, the two metal flat plates are opposite to form a flat capacitor.

Fig. 8a is a plan view of a wafer on a filter in accordance with an embodiment of the present invention. Fig. 8b is a plan view of the wafer under the filter according to the embodiment of the invention. As shown IN FIG. 8a, the upper wafer includes series resonators S1-S4, docking pins IN, OUT, B1-B3, wherein the docking pin IN is connected to the first metal plate C1. As shown IN fig. 8B, the lower wafer includes parallel resonators P1-P3, docking pins IN, OUT, B1-B3, and ground pins G1-G3, wherein the docking pin B1 is connected to the second metal plate C2. When the upper and lower wafers are stacked, the docking pin bonds make electrical connections, and at the same time, the first metal plane C1 and the second metal plane C2 are brought into opposition, thereby forming a capacitor.

Fig. 8c is a cross-sectional view of a filter according to an embodiment of the present invention. As can be seen from fig. 8C, the first metal plate C1 is in the same layer as the upper electrodes of the resonators in the upper wafer, and the second metal plate C2 is in the same layer as the upper electrodes of the resonators in the lower wafer. In the embodiment of the present invention, the arrangement positions of the first metal plate C1 and the second metal plate C2 are not limited to this, and they may be disposed in the same layer as the lower electrode of the resonator, or one of the metal plates may be disposed in the same layer as the upper electrode of the resonator of the wafer, and the other metal plate may be disposed in the same layer as the lower electrode of the resonator of the wafer. When the first metal plate C1 and the second metal plate C2 are respectively in the same layer as the upper electrode of the resonator of the wafer, an intermediate layer and a lifting layer may be further provided, wherein the intermediate layer is a piezoelectric layer of the resonator and is manufactured in synchronization with the piezoelectric layer of the resonator.

The lift-up layer is in the same layer as the bottom electrode, and may be the same material as the bottom electrode. If the plate shape is adopted, the capacitance density is increased, but certain resonance exists, and the performance of the resonator is deteriorated. This resonance can be avoided if interdigitated electrodes are used. The lift-off layer may also be an insulating material, such as AlN, SiN, or SiO₂Etc. to avoid this resonance.

In the embodiment of the invention, the capacitance value of the capacitor can be adjusted in the following way: one is to change the distance between the first metal plate C1 and the second metal plate C2, and the distance is adjusted by adjusting the height of the lift layer, which is the same as the lower electrode of the resonator of the wafer, but the thickness of the lift layer may be the same as or different from the thickness of the lower electrode layer. The other is to change the area of the first metal flat plate C1 and/or the second metal flat plate C2 and adjust the relative area of the two to achieve the purpose of adjusting the capacitance value. The two adjustment modes can be carried out simultaneously. The two ways of adjusting the capacitance do not add extra production process of the filter, that is, the first metal flat plate C1, the second metal flat plate C2, the middle layer and the lifting layer can be synchronously manufactured when manufacturing each layer of the resonator. The method can introduce the capacitor without changing the original manufacturing process and can reduce the manufacturing cost. In addition, a method for adjusting the capacitance value is provided, in which the surface layers of the first metal plate C1 and the second metal plate C2 both include a passivation layer, which is generally AlN, and the dielectric constant between the first metal plate C1 and the second metal plate C2 can be changed by adjusting the thickness of the passivation layer, so as to change the capacitance value.

Fig. 9a is a circuit diagram of a filter with an introduced capacitor according to an embodiment of the present invention. The effect of paralleling the capacitance across the series resonator S1, i.e., the circuit diagram shown in fig. 9a, can be achieved by placing the upper and lower wafers in fig. 8a and 8b one on top of the other. In the upper wafer and the lower wafer shown in fig. 8a and 8b, all the series resonators are manufactured on the upper wafer, and all the parallel resonators are manufactured on the lower wafer, in this way, the parallel branches and the nodes on the series branches need to be bonded and connected, so that all the nodes of the filter have butt-joint pins, that is, all the nodes of the filter can be provided with metal plates, and all the nodes can form capacitors. The embodiment of the invention is not limited to the arrangement mode of the resonators, and parts of series resonators and parts of parallel resonators can be manufactured on the upper wafer and the lower wafer respectively.

In the embodiment of the present invention, the first and second metal plates C1 and C2 are connected to different docking pins or ground pins, so that the capacitors can be formed at different positions. As shown in fig. 9a, a capacitor is connected in parallel to the series resonator S1. Fig. 9b is a circuit diagram of parallel capacitors of the parallel resonators in the filter according to the embodiment of the present invention. As shown in fig. 9b, a capacitance is connected in parallel to the parallel resonator P1. Fig. 9c is a circuit diagram of the parallel capacitors of the series resonator and the parallel resonator in the filter according to the embodiment of the present invention. As shown in fig. 9c, capacitances are connected in parallel to both the series resonator S1 and the parallel resonator P1. Fig. 9d is a circuit diagram of a capacitor formed at the ground pin in the filter according to the embodiment of the present invention. As shown in fig. 9d, a capacitor is formed between a node of the serial branch and the ground node, the capacitor is used for adjusting an out-of-band transmission zero of the filter, the out-of-band rejection at different frequencies can be adjusted by moving the transmission zero, and better out-of-band rejection can be obtained at a required frequency point. The embodiments of the present invention are not limited to the above-mentioned capacitor arrangement modes, and capacitors may be arranged on any one or more of the series resonators and/or the parallel resonators.

The embodiment of the present invention further provides a filter manufacturing method, and fig. 10 is a flow chart of the filter manufacturing method provided by the embodiment of the present invention, where the method includes the following steps:

s1: forming a resonator and a butt joint pin on the first surface of the upper wafer, forming at least one first metal flat plate by using an upper electrode layer or a lower electrode layer of the resonator, and connecting the first metal flat plate with the butt joint pin of the upper wafer;

s2: forming a resonator, a butt joint pin and a grounding pin on the first surface of the lower wafer, forming at least one second metal flat plate by using an upper electrode layer or a lower electrode of the resonator, and connecting the second metal flat plate with the butt joint pin or the grounding pin of the lower wafer;

s3: and superposing the upper wafer and the lower wafer, wherein the first plane of the upper wafer is arranged opposite to the first plane of the lower wafer, and the butt joint pins of the upper wafer are bonded with the butt joint pins of the lower wafer to form a filter, wherein the first metal flat plate and the second metal flat plate are opposite to form a capacitor.

The process flow of the manufacturing method can form the capacitor synchronously, namely, the method provided by the embodiment of the invention can form the capacitor in the filter without additionally increasing process steps, thereby achieving the purposes of optimizing the process flow and reducing the manufacturing cost. The resonator described above may be an acoustic wave resonator, which typically has an air cavity below its lower electrode, as shown in fig. 8 c. In the embodiment of the present invention, air cavities are not formed in the upper and lower wafers corresponding to the formed capacitors to prevent unnecessary resonance.

The filter in the embodiment of the present invention may constitute a multiplexer (the multiplexer herein includes a duplexer), and may also be applied to a communication device.

The above-described embodiments should not be construed as limiting the scope of the invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions can occur, depending on design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.