阅读说明：本技术 多层陶瓷电容器和具有多层陶瓷电容器的板 (Multilayer ceramic capacitor and board having the same ) 是由 朴文秀 崔宰宪 张炳哲 金东勋 崔畅学 金昞建 于 2018-01-16 设计创作，主要内容包括：本发明提供一种多层陶瓷电容器和具有多层陶瓷电容器的板。所述多层陶瓷电容器(MLCC)包括：主体,包括第一介电层和第二介电层,主体包括第一表面、第二表面、第三表面、第四表面、第五表面和第六表面；第一内电极,设置在第一介电层上,暴露于第三表面、第五表面和第六表面,并通过第一空间与第四表面分开；第二内电极,设置在第二介电层上以通过插设在第一内电极和第二内电极之间的第一介电层或第二介电层而与第一内电极背对,暴露于第四表面、第五表面和第六表面,并通过第二空间与第三表面分开；第一介电图案和第二介电图案,第一介电图案设置在第一空间的至少一部分中,第二介电图案设置在第二空间的至少一部分中；以及侧部绝缘层。(The invention provides a multilayer ceramic capacitor and a board having the same. The multilayer ceramic capacitor (MLCC) includes: a body comprising a first dielectric layer and a second dielectric layer, the body comprising a first surface, a second surface, a third surface, a fourth surface, a fifth surface, and a sixth surface; a first internal electrode disposed on the first dielectric layer, exposed to the third surface, the fifth surface, and the sixth surface, and separated from the fourth surface by a first space; a second internal electrode disposed on the second dielectric layer to face away from the first internal electrode through the first dielectric layer or the second dielectric layer interposed between the first internal electrode and the second internal electrode, exposed to the fourth surface, the fifth surface, and the sixth surface, and separated from the third surface by a second space; a first dielectric pattern disposed in at least a portion of the first space and a second dielectric pattern disposed in at least a portion of the second space; and a side insulating layer.)

1. A multilayer ceramic capacitor comprising:

a body including a first dielectric layer and a second dielectric layer, the body including a first surface and a second surface facing away from each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and facing away from each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing away from each other, the first dielectric layer and the second dielectric layer being stacked in the stacking direction;

a first internal electrode disposed on the first dielectric layer, exposed to the third surface, the fifth surface, and the sixth surface, and separated from the fourth surface by a first space;

a second internal electrode disposed on the second dielectric layer to be opposite to the first internal electrode through the first dielectric layer or the second dielectric layer interposed between the first and second internal electrodes, exposed to the fourth, fifth, and sixth surfaces, and separated from the third surface by a second space;

a first dielectric pattern disposed in at least a portion of the first space and a second dielectric pattern disposed in at least a portion of the second space; and

a side insulating layer disposed on the fifth surface and the sixth surface of the body.

2. The multilayer ceramic capacitor according to claim 1, wherein the first dielectric pattern covers an end of the first internal electrode and fills the first space, and the second dielectric pattern covers an end of the second internal electrode and fills the second space.

3. The multilayer ceramic capacitor according to claim 1, wherein a deformation angle of the first internal electrode is 15 ° or less, the deformation angle being an angle at which each portion of the first internal electrode exposed to the third surface is inclined with respect to the second surface.

4. The multilayer ceramic capacitor of claim 1, wherein the first and second dielectric patterns comprise a dielectric that is capable of being sintered at a temperature that is lower than a temperature used to sinter the first and second dielectric layers.

5. The multilayer ceramic capacitor according to claim 1, wherein each of the first internal electrodes includes a first capacitor part and a first lead-out part connecting the first capacitor part to a first external electrode while having a width narrower than that of the first capacitor part.

6. The multilayer ceramic capacitor according to claim 5, wherein a ratio of a difference between the width of the first capacitance section and the width of the first lead-out section to the width of the first capacitance section is 10% to 50%.

7. The multilayer ceramic capacitor according to claim 5, further comprising a third dielectric pattern disposed on a portion of the first capacitance portion of the first dielectric layer contacting the first lead out portion.

8. The multilayer ceramic capacitor of claim 7, wherein the third dielectric pattern comprises a dielectric comprising a low temperature sintered material having a glass composition comprising an alkali metal.

9. The multilayer ceramic capacitor of claim 1, wherein the first and second dielectric patterns comprise a dielectric comprising a low temperature sintered material having a glass component comprising an alkali metal.

10. The multilayer ceramic capacitor according to claim 1, wherein the first dielectric pattern and the second dielectric pattern are made of a material different from a material used to manufacture the first dielectric layer and the second dielectric layer.

11. The multilayer ceramic capacitor according to claim 1, wherein the first and second dielectric patterns are exposed to the fifth and sixth surfaces and contact the side insulating layers.

12. The multilayer ceramic capacitor of claim 1, wherein the side insulating layers comprise a polymer or a ceramic.

13. The multilayer ceramic capacitor of claim 1, wherein the side insulating layers comprise a dielectric.

14. A board having a multilayer ceramic capacitor, the board comprising:

a substrate having a first pad and a second pad disposed on a surface of the substrate; and

a multilayer ceramic capacitor mounted on the substrate,

wherein the multilayer ceramic capacitor includes: a body including a first dielectric layer and a second dielectric layer, the body including a first surface and a second surface facing away from each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and facing away from each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing away from each other, the first dielectric layer and the second dielectric layer being stacked in the stacking direction; a first internal electrode disposed on the first dielectric layer, exposed to the third surface, the fifth surface, and the sixth surface, and separated from the fourth surface by a first space; a second internal electrode disposed on the second dielectric layer to be opposite to the first internal electrode through the first dielectric layer or the second dielectric layer interposed between the first and second internal electrodes, exposed to the fourth, fifth, and sixth surfaces, and separated from the third surface by a second space; a first dielectric pattern disposed in at least a portion of the first space and a second dielectric pattern disposed in at least a portion of the second space; and a side insulating layer disposed on the fifth surface and the sixth surface of the body.

15. The panel of claim 14, wherein said first dielectric pattern covers an end of said first internal electrode and fills said first space, and said second dielectric pattern covers an end of said second internal electrode and fills said second space.

16. The plate of claim 14, wherein a deformation angle of the first inner electrode is 15 ° or less, the deformation angle being an angle at which each portion of the first inner electrode exposed to the third surface is inclined with respect to the second surface.

17. The plate of claim 14, wherein the first and second dielectric patterns comprise a dielectric that is capable of being sintered at a temperature lower than a temperature used to sinter the first and second dielectric layers.

18. The panel as claimed in claim 14, wherein the first inner electrodes each include a first capacitor part and a first lead out part connecting the first capacitor part to the first outer electrode while having a width narrower than that of the first capacitor part.

19. The board according to claim 18, wherein a ratio of a difference between a width of the first capacitance section and a width of the first lead-out section to the width of the first capacitance section is 10% to 50%.

20. The board of claim 18, the multilayer ceramic capacitor further comprising a third dielectric pattern disposed on a portion of the first capacitive portion of the first dielectric layer that contacts the first lead out portion.

21. The plate of claim 20, wherein said third dielectric pattern comprises a dielectric comprising a low temperature sintered material having a glass component comprising an alkali metal.

22. The plate of claim 14, wherein the first and second dielectric patterns comprise a dielectric comprising a low temperature sintered material having a glass component comprising an alkali metal.

23. The panel of claim 14, wherein the first and second dielectric patterns are made of a material different from a material used to fabricate the first and second dielectric layers.

24. The panel of claim 14, wherein the first and second dielectric patterns are exposed at the fifth and sixth surfaces and contact the side insulating layers.

25. The panel of claim 14, wherein said side insulating layer comprises a polymer or a ceramic.

26. The plate of claim 14, wherein the side insulating layer comprises a dielectric.

27. A multilayer ceramic capacitor comprising:

a body including a first dielectric layer and a second dielectric layer, the body including a first surface and a second surface facing away from each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and facing away from each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing away from each other, the first dielectric layer and the second dielectric layer being stacked in the stacking direction;

a first internal electrode disposed on the first dielectric layer, exposed to the third surface, and separated from the fourth surface by a first space;

a second internal electrode disposed on the second dielectric layer to be opposite to the first internal electrode by the first dielectric layer or the second dielectric layer interposed between the first and second internal electrodes, exposed to the fourth surface, and separated from the third surface by a second space;

a first dielectric pattern disposed in a portion of the first space and a second dielectric pattern disposed in a portion of the second space; and

first and second external electrodes disposed on the third and fourth surfaces, respectively, and electrically connected to the first and second internal electrodes, respectively.

28. The multilayer ceramic capacitor of claim 27, wherein the first and second dielectric patterns are made of a material different from a material used to fabricate the first and second dielectric layers.

29. The multilayer ceramic capacitor according to claim 27, wherein the first dielectric pattern extends to overlap an end of the first internal electrode and fill the first space, and the second dielectric pattern extends to overlap an end of the second internal electrode and fill the second space.

30. The multilayer ceramic capacitor according to claim 27, wherein a deformation angle of the first internal electrode is 15 ° or less, the deformation angle being an angle at which each portion of the first internal electrode exposed to the third surface is inclined with respect to the second surface.

31. The multilayer ceramic capacitor of claim 27, wherein each of the first internal electrodes includes a first capacitor portion and a first lead-out portion connecting the first capacitor portion to a first external electrode while having a width narrower than that of the first capacitor portion, and further comprising a third dielectric pattern disposed on a portion of the first dielectric layer where the first capacitor portion contacts the first lead-out portion.

32. The multilayer ceramic capacitor of claim 27, wherein the first internal electrode is exposed to the fifth surface and the sixth surface, the second internal electrode is exposed to the fifth surface and the sixth surface, and

the multilayer ceramic capacitor further includes side insulating layers disposed on the fifth and sixth surfaces of the body.

33. The multilayer ceramic capacitor of claim 32, wherein the first and second dielectric patterns are exposed at the fifth and sixth surfaces and contact the side insulating layers.

Technical Field

The present disclosure relates to a multilayer ceramic capacitor and a board having the same.

Background

A capacitor is a device capable of storing electrical power. When a voltage is applied to two oppositely facing electrodes of the capacitor, the respective electrodes of the capacitor are charged. When a Direct Current (DC) voltage is applied to electrodes of the capacitor, a DC current flows into the capacitor while storing power therein. However, when the power storage is completed, the DC current no longer flows therein. In contrast, when an Alternating Current (AC) voltage is applied to the electrodes, an AC current continuously flows into the capacitor while the polarities of the electrodes alternate with each other.

Such capacitors can be classified into the following various types according to the type of insulator disposed between the electrodes: an aluminum electrolytic capacitor having electrodes formed of aluminum and having a thin oxide layer between the electrodes; a tantalum capacitor using tantalum as an electrode material; ceramic capacitors using a high-k dielectric such as barium titanate between electrodes; a multilayer ceramic capacitor (MLCC) using a high-k based ceramic as a dielectric between electrodes and providing the dielectric as a multilayer structure; and a film capacitor provided as a dielectric between the electrodes using a polystyrene film.

Among these capacitors, the MLCC may have excellent temperature characteristics and frequency characteristics, and may be realized to have a compact size, thereby being applied to various fields used in, for example, high frequency circuits.

MLCCs according to the prior art have: a stacked body formed by stacking a plurality of dielectric sheets; external electrodes formed on the outer surface of the laminate to have different polarities; and inner electrodes alternately stacked inside the stacked body to be electrically connected to the outer electrodes, respectively.

In recent years, as electronic products are formed to have a compact size and a high integration degree, much research has been conducted on achieving the compact size and the high integration degree in the MLCC. In particular, in the case of the MLCC, in order to obtain high capacitance and compact size in the MLCC, various attempts have been made to improve the connectivity of the internal electrodes while thinning and highly stacking the dielectric layers.

In particular, it becomes more important to ensure reliability of a product in which a thin film dielectric layer and an internal electrode are highly stacked. As the number of stacks of the dielectric layers and the internal electrodes increases, there may be an increase in the amount of step portions formed due to a difference in thickness between a portion (such as a center portion of the MLCC) in which the internal electrodes and the dielectric layers are stacked and another portion (such as an edge portion) in which some of the internal electrodes formed in the portion may not be formed. Such a stepped portion may cause the end of the inner electrode to bend due to the lateral elongation of the dielectric layer during densification of the pressed MLCC body.

That is, when some portions of the dielectric layer are repositioned to fill the stepped portion, the end of the inner electrode may be bent, and the edge portion may remove an empty space formed by the stepped portion through the recessed cover and the reduction of the edge width. The capacitive layer may also elongate due to the reduced edge width by removing empty space in the edge. Such a structurally irregular elongation of the inner electrode may degrade characteristics of the MLCC, such as breakdown voltage (BDV) characteristics.

The occurrence of the stepped portion as described above may be problematic in both a first direction perpendicular to a stacking direction of the internal electrodes and the dielectric layers of the MLCC and a second direction perpendicular to the first direction and to the stacking direction. Therefore, there is a need for a solution to this problem.

Disclosure of Invention

An aspect of the present disclosure may provide a multilayer ceramic capacitor (MLCC) having a structure capable of solving a problem of formation of stepped portions due to a difference in thickness between different portions of a laminate including dielectric layers and internal electrodes.

According to an aspect of the present disclosure, a multilayer ceramic capacitor (MLCC) may include: a body including a first dielectric layer and a second dielectric layer, the body including a first surface and a second surface facing away from each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and facing away from each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing away from each other, the first dielectric layer and the second dielectric layer being stacked in the stacking direction; a first internal electrode disposed on the first dielectric layer, exposed to the third surface, the fifth surface, and the sixth surface, and separated from the fourth surface by a first space; a second internal electrode disposed on the second dielectric layer to be opposite to the first internal electrode through the first dielectric layer or the second dielectric layer interposed between the first and second internal electrodes, exposed to the fourth, fifth, and sixth surfaces, and separated from the third surface by a second space; a first dielectric pattern disposed in at least a portion of the first space and a second dielectric pattern disposed in at least a portion of the second space; and a side insulating layer disposed on the fifth surface and the sixth surface of the body.

According to another aspect of the present disclosure, a board having a multilayer ceramic capacitor (MLCC) may include: a substrate having a first pad and a second pad disposed on a surface of the substrate; and a multilayer ceramic capacitor mounted on the substrate, wherein the multilayer ceramic capacitor includes: a body including a first dielectric layer and a second dielectric layer, the body including a first surface and a second surface facing away from each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and facing away from each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing away from each other, the first dielectric layer and the second dielectric layer being stacked in the stacking direction; a first internal electrode disposed on the first dielectric layer, exposed to the third surface, the fifth surface, and the sixth surface, and separated from the fourth surface by a first space; a second internal electrode disposed on the second dielectric layer to be opposite to the first internal electrode through the first dielectric layer or the second dielectric layer interposed between the first and second internal electrodes, exposed to the fourth, fifth, and sixth surfaces, and separated from the third surface by a second space; a first dielectric pattern disposed in at least a portion of the first space and a second dielectric pattern disposed in at least a portion of the second space; and a side insulating layer disposed on the fifth surface and the sixth surface of the body.

According to another aspect of the present disclosure, a multilayer ceramic capacitor (MLCC) may include: a body including a first dielectric layer and a second dielectric layer, the body including a first surface and a second surface facing away from each other in a stacking direction, a third surface and a fourth surface connected to the first surface and the second surface and facing away from each other, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing away from each other, the first dielectric layer and the second dielectric layer being stacked in the stacking direction; a first internal electrode disposed on the first dielectric layer, exposed to the third surface, and separated from the fourth surface by a first space; a second internal electrode disposed on the second dielectric layer to be opposite to the first internal electrode by the first dielectric layer or the second dielectric layer interposed between the first and second internal electrodes, exposed to the fourth surface, and separated from the third surface by a second space; a first dielectric pattern disposed in a portion of the first space and a second dielectric pattern disposed in a portion of the second space; and first and second external electrodes disposed on the third and fourth surfaces, respectively, and electrically connected to the first and second internal electrodes, respectively.

Drawings

The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

FIG. 1 shows a schematic perspective view of a multilayer ceramic capacitor (MLCC) according to an exemplary embodiment;

FIG. 2 shows a schematic perspective view of a body of an MLCC according to an exemplary embodiment;

FIG. 3 shows a schematic cross-sectional view taken along line I-I' of FIG. 1;

FIG. 4 shows a schematic cross-sectional view taken along line II-II' of FIG. 1;

fig. 5A shows a schematic cross-sectional view of an MLCC according to a comparative example, and fig. 5B shows an enlarged view of a cross-section of an end portion in a length direction of the MLCC according to the comparative example, and depicts a measured deformation angle of an inner electrode;

fig. 6A shows a schematic cross-sectional view of an MLCC according to an exemplary embodiment, and fig. 6B shows an enlarged view of a cross-section of an end portion in a length direction of the MLCC according to an exemplary embodiment, and depicts a measured deformation angle of an inner electrode;

fig. 7 is an image of a cross section of an MLCC having an edge portion according to a comparative example, and depicts a position P where breakdown voltage (BDV) characteristics are poor;

fig. 8A and 8B illustrate gaps between internal electrodes and dielectric patterns provided on ceramic sheets prior to a process of stacking to form a body during the manufacture of the MLCC;

fig. 9A and 9B illustrate shapes of internal electrodes and dielectric patterns printed on ceramic sheets prior to a process of stacking to form a body during the manufacture of the MLCC;

FIGS. 10A and 10B show schematic plan views of a first and second inner electrode of a MLCC according to another example embodiment; and

FIG. 11 shows a schematic perspective view of a plate with an MLCC according to another exemplary embodiment.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

This disclosure may, however, be embodied in different forms and should not be construed as limited to the particular embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

Throughout the specification, it will be understood that when an element such as a layer, region, or wafer (or substrate) is referred to as being "on," connected to, "or" bonded to "another element, it can be directly on," connected to, or bonded to the other element, or there may be other elements intervening therebetween. In contrast, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there may be no intervening elements present. Like numbers refer to like elements throughout. As used herein, the term "and/or" includes any one of the associated listed items and any combination of any two or more.

It will be apparent that, although the terms "first," "second," and "third," etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.

Spatially relative terms, such as "above … …," "above," "below … …," and "below," may be used herein for ease of description to describe one element's relationship to another element as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as being "above" or "over" relative to another element or feature would then be "below" or "beneath" relative to the other element or feature. Thus, the term "above … …" includes both orientations "above … …" and "below … …" depending on the particular directional orientation of the drawing. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The singular is also intended to include the plural unless the context clearly dictates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and/or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, elements, and/or groups thereof.

Hereinafter, embodiments of the present disclosure will be described with reference to schematic drawings showing embodiments of the present disclosure. In the drawings, variations in the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, may be estimated. Thus, embodiments of the present disclosure should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. The following embodiments may also be constituted alone or as a combination of a plurality or all of them.

The disclosure described below may have various configurations, and only required configurations are set forth herein, but the disclosure is not limited thereto.

Multilayer ceramic capacitor (MLCC)

Fig. 1 shows a schematic perspective view of an MLCC 100 according to an exemplary embodiment, and fig. 2 shows a schematic perspective view of a main body 110 of the MLCC 100 according to an exemplary embodiment. Fig. 3 shows a schematic cross-sectional view taken along line I-I 'of fig. 1, and fig. 4 shows a schematic cross-sectional view taken along line II-II' of fig. 1.

Referring to fig. 1 to 4, an MLCC 100 according to an exemplary embodiment will be described hereinafter.

The MLCC 100 according to an exemplary embodiment may include a body 110 in which a plurality of first dielectric layers 111a and a plurality of second dielectric layers 111b are stacked, and first and second external electrodes 151 and 152.

The body 110 may be formed by stacking a first dielectric layer 111a and a second dielectric layer 111b in a thickness direction of the body and firing the stacked first and second dielectric layers 111a and 111 b. The number of the first dielectric layer 111a and the second dielectric layer 111b may be appropriately adjusted. For example, tens to hundreds of first dielectric layers 111a and second dielectric layers 111b each having one internal electrode disposed thereon may be stacked. The respective first dielectric layers 111 and the respective second dielectric layers 111b of the body 110 adjacent to each other may be integrated to the extent that the boundary between the first dielectric layers 111a and the second dielectric layers 111b is difficult to recognize. Further, the body 110 may have a hexahedral shape, but the shape of the body 110 is not limited thereto.

When the body 110 has a hexahedral shape, the body 110 may include first and second surfaces 1 and 2 facing away from each other, third and fourth surfaces 3 and 4 connected to the first and second surfaces 1 and 2 and facing away from each other, and fifth and sixth surfaces 5 and 6 connected to the first, second, third and fourth surfaces 1, 2, 3 and 4 and facing away from each other.

In an exemplary embodiment, the stacking direction may be referred to as a thickness direction or a first direction Z, a direction in which the third and fourth surfaces 3 and 4 are formed may be referred to as a length direction or a second direction X, and a direction in which the fifth and sixth surfaces 5 and 6 are formed may be referred to as a width direction or a third direction Y.

The body 110 may include an upper capping layer 113 formed on an upper surface of the uppermost internal electrode and a lower capping layer 112 formed on a lower surface of the lowermost internal electrode, with a certain thickness. The upper and lower cover layers 113 and 112 may include the same composition as that of the first and second dielectric layers 111a and 111b, and may be formed by stacking at least one dielectric layer having no internal electrode on each of the upper surface of the uppermost internal electrode and the lower surface of the lowermost internal electrode.

The first and second dielectric layers 111a and 111b may comprise a high-k ceramic material, for example, barium titanate (BaTiO)₃) Base ceramic powders, and the like, but the disclosure is not limited thereto. BaTiO 2₃Examples of the base ceramic powder may include calcium (Ca), zirconium (Zr), etc. partially dissolved in BaTiO₃Of (Ba)_1-xCa_x)TiO₃、Ba(Ti_1-yCa_y)O₃、(Ba_1-xCa_x)(Ti_1-yZr_y)O₃Or Ba (Ti)_1-yZr_y)O₃However, the present disclosure is not limited thereto. In addition, the first and second dielectric layers 111a and 111b may further include at least one of a ceramic additive, an organic solvent, a plasticizer, a binder, and a dispersant. Examples of ceramic additives may include transition metal oxides or carbides, rare earth elements or magnesium (Mg) or aluminum (Al).

The first dielectric layer 111a may have a first internal electrode 121 disposed thereon. The first internal electrode 121 may be disposed on the first dielectric layer 111a to be exposed to the third surface 3, the fifth surface 5, and the sixth surface 6 of the body 110. The first internal electrode 121 may not be exposed to the fourth surface 4 of the body 110. The first internal electrode 121 may be separated from the fourth surface 4 by a certain distance. A space separating each of the first internal electrodes 121 from the fourth surface 4 may be defined as a first space 121'.

The second dielectric layer 111b may have a second internal electrode 122 disposed thereon. The second internal electrode 122 may be disposed on the second dielectric layer 111b to be exposed to the fourth surface 4, the fifth surface 5, and the sixth surface 6 of the body 110. The first internal electrode 121 may not be exposed to the third surface 3 of the body 110. The second internal electrode 122 may be separated from the third surface 3 by a certain distance. A space separating each of the second internal electrodes 122 from the third surface 3 may be defined as a second space 122'.

The first and second internal electrodes 121 and 122 may be respectively formed and stacked on ceramic sheets for forming the first and second dielectric layers 111a and 111b, and then may be alternately disposed in the body 110 in a thickness direction by being sintered with at least one of the first and second dielectric layers 111a and 111b interposed between the first and second internal electrodes 121 and 122.

The first and second internal electrodes 121 and 122 having different polarities may face away from each other in a direction in which the first and second dielectric layers 111a and 111b are stacked, and may be electrically insulated from each other by the first or second dielectric layer 111a or 111b disposed between the first and second internal electrodes 121 and 122.

When the internal electrode is exposed to the outside of the body, a short circuit occurs due to the penetration of conductive foreign matter into the body, and thus the reliability of the MLCC may be lowered. As a result, when the internal electrodes in the related art are formed on the dielectric layer, the dielectric layer is formed to have a wider area than that of the internal electrodes, and thus an edge portion is formed in a remaining portion of the dielectric layer except for a portion of the internal electrodes connected to the external electrodes. For example, the edge portion may refer to a region of the dielectric layer where the internal electrode is not formed. When the internal electrodes are formed on the dielectric layer in a process of manufacturing the MLCC, the internal electrodes may have such a shape that the internal electrodes protrude from the edge portions along the stacking direction. This shape may cause a stepped portion, and when several tens to several hundreds of dielectric layers are stacked, each of the dielectric layers may be elongated and bent to fill the stepped portion. When the dielectric layer is elongated, the internal electrodes are also bent together. When the internal electrode is bent or bent, the BDV characteristics of the bent or bent portion of the internal electrode may be deteriorated.

Accordingly, the MLCC according to an exemplary embodiment may prevent a stepped portion in a width direction caused by no formation of the internal electrodes in the edge portion during manufacturing by removing the edge portion to form the fifth and sixth surfaces 5 and 6 of the body 110 to expose the first and second internal electrodes 121 and 122. As a result, the reliability of the MLCC can be increased by preventing the BDV characteristics from being deteriorated by avoiding the bending of the inner electrodes in the width direction.

The first and second internal electrodes 121 and 122 may be exposed to the third and fourth surfaces 3 and 4, respectively, to be drawn therefrom. Thereafter, the first external electrode 151 may be formed on the third surface 3, and the second external electrode 152 may be formed on the fourth surface 4, and thus the first and second internal electrodes 121 and 122 may be protected from being exposed to the outside by the first and second external electrodes 151 and 152, respectively.

However, substantially all of the first and second internal electrodes 121 and 122 may be exposed to the fifth and sixth surfaces 5 and 6, and thus the first and second internal electrodes 121 and 122 may be protected by disposing additional side insulating layers 140 on the fifth and sixth surfaces 5 and 6.

The body 110 may be dipped into a slurry including ceramic to form the side insulating layer 140. The slurry may include ceramic powder, an organic binder, or an organic solvent. The ceramic powder may include a high-k material, and when the side insulating layer 140 is formed, a material having excellent heat resistance and durability may be used as the ceramic powder.

The type of the ceramic powder is not limited thereto. Examples of the ceramic powder may include a barium titanate-based material, a lead composite perovskite material, or a strontium titanate-based material, preferably barium titanate powder.

The organic binder may be used to ensure dispersibility of the ceramic powder inside the slurry, but the purpose of the organic binder is not limited thereto. Examples of organic binders may include ethyl cellulose, polyvinyl butyral, or mixtures thereof.

When the main body 110 is immersed in the paste manufactured as described above, the surface of the main body 110 contacting the paste may be coated with the paste to form the side insulating layer 140. Repeating the dipping and drying of the body 110 may coat the body 110 with a desired amount of slurry to form the body 110 having a desired thickness.

When the body 110 is dipped into the paste, the third and fourth surfaces 3 and 4 of the body 110 may be prevented from being coated with the paste to form the first and second external electrodes 151 and 152 on the third and fourth surfaces 3 and 4. Therefore, the third surface 3 and the fourth surface 4 may have a film attached thereto and then may be dipped into the slurry so as not to be contaminated by the slurry, but the protection manner of the third surface 3 and the fourth surface 4 at the time of dipping is not limited thereto. For example, the ceramic rod may be dipped into the slurry before cutting the ceramic rod (the ceramic rod may be divided into the plurality of bodies 110 by cutting to form the respective third and fourth surfaces 3 and 4) of the plurality of bodies to form the respective third and fourth surfaces 3 and 4 of the plurality of bodies, so that the side surfaces of the ceramic rod corresponding to the respective fifth and sixth surfaces 5 and 6 of the plurality of bodies 110 are coated with the slurry. After the side surfaces of the ceramic rod corresponding to the respective fifth surfaces 5 and the respective sixth surfaces 6 of the plurality of bodies 110 are coated with the slurry, a cutting process may be performed to divide the ceramic rod into the plurality of bodies 110.

By disposing the side insulating layers 140 on the fifth surface 5 and the sixth surface 6, it is possible to prevent conductive foreign substances from flowing into the first and second internal electrodes 121 and 122 exposed to the fifth surface 5 and the sixth surface 6.

In addition, the side insulating layer 140 may be formed using a polymer. For example, the side insulating layer 140 may be formed by coating the side surface of the body 110 with epoxy resin.

In particular, the MLCC 100 according to an exemplary embodiment may ensure a significantly increased effective capacitance area by removing edge portions in the width direction to form the fifth and sixth surfaces 5 and 6 to which the first and second internal electrodes 121 and 122 may be exposed, thus further increasing the capacitance of the MLCC. For example, the MLCC 100 according to an exemplary embodiment may increase the volume of capacitance that it can achieve by disposing the side insulating layers 140 on the fifth and sixth surfaces 6 of the main body 110 instead of the edge portion, wherein the side insulating layers 140 can prevent conductive foreign substances from penetrating into the main body while having a relatively reduced thickness compared to the thickness of the edge portion.

However, similarly to the step portion formed by the edge portion in the width direction, the step portion may be formed in the length direction in which the inner electrode is connected to the outer electrode. For example, even when a step portion in the width direction is prevented from being formed in the edge portion by, for example, removing the edge portion, the step portion formed in the length direction may cause the BDV characteristic of the MLCC to fail to reach a target value.

The first and second internal electrodes 121 and 122 may be alternately exposed to the third and fourth surfaces 3 and 4 (both end surfaces of the body 110 in the length direction) to be connected to the first and second external electrodes 151 and 152, respectively.

For example, the first internal electrode 121 may be connected to only the first external electrode 151, and the second internal electrode 122 may be connected to only the second external electrode 152. Accordingly, the first internal electrode 121 may be separated from the fourth surface 4 by a predetermined distance, and the second internal electrode 122 may be separated from the third surface 3 by a predetermined distance.

When the dielectric layers on which the internal electrodes having the above-described shapes are formed are stacked, the first and second internal electrodes 121 and 122 alternately exposed to the third and fourth surfaces 3 and 4, respectively, may result in the formation of a stepped portion in the stacking direction Z in each portion of the body 110 where only the first or second internal electrodes 121 or 122 are formed.

When several tens to several hundreds of dielectric layers 111 are stacked, the step in the stacking direction Z may cause the dielectric layers 111 to be elongated in each portion of the body 110 where only the first or second internal electrodes 121 or 122 are formed. The elongation of the dielectric layers in the stacking direction may cause the first or second internal electrodes in each portion of the body where only the first or second internal electrodes are formed to be bent together, as shown in fig. 5A and 5B. In the bent portion of the first or second internal electrode shown in fig. 5B, the BDV characteristic may be fundamentally reduced.

However, when the space between the first internal electrode 121 and the fourth surface 4 is defined as the first space 121 ', the first dielectric pattern 131 may be disposed in the first space 121', and when the space between the second internal electrode 122 and the third surface 3 is defined as the second space 122 ', the second dielectric pattern 132 may be disposed in the second space 122'. Accordingly, the MLCC 100 according to an exemplary embodiment may prevent a step portion from being formed in only a portion of the body 110 where the first or second internal electrode 121 or 122 is formed. According to an exemplary embodiment, the first and second dielectric patterns 131 and 132 may be exposed to the fifth and sixth surfaces 5 and 6 and may contact the side insulating layer 140.

For example, the MLCC 100 according to an exemplary embodiment may include the first and second dielectric patterns 131 and 132 to prevent step portions from being formed in only the portion of the body 100 where the first or second internal electrodes 121 or 122 are formed, thereby solving a problem that a reduction in BDV characteristics may occur in the bent portion of the first or second internal electrodes 121 or 122.

Therefore, the MLCC 100 according to an exemplary embodiment may prevent a reduction in BDV characteristics caused by a stepped portion formed in a width direction by removing an edge portion to form the fifth and sixth surfaces 5 and 6 and disposing the side insulating layers 140 on the fifth and sixth surfaces 5 and 6, while solving a problem of a reduction in BDV characteristics caused by a stepped portion formed in a length direction by preventing a stepped portion from being formed in only a portion of the body 110 where the first or second internal electrodes 121 or 122 are formed by using the first and second dielectric patterns 131 and 132, thereby greatly increasing the overall BDV characteristics of the MLCC 100.

Fig. 5A shows a schematic cross-sectional view of an MLCC according to a comparative example, and fig. 5B shows an enlarged view of a cross-section of an end portion in a length direction of the MLCC according to the comparative example, and depicts a measured deformation angle of an inner electrode.

Fig. 6A shows a schematic cross-sectional view of an MLCC according to an exemplary embodiment, and fig. 6B shows an enlarged view of a cross-section of an end portion in a length direction of the MLCC according to an exemplary embodiment, and depicts a measured deformation angle of an inner electrode.

The deformation angle of the inner electrode shown in fig. 5B and 6B may refer to a bending angle of an end portion in the length direction X of the inner electrode. Referring to fig. 5B, the deformation angle θ of the inner electrode of the MLCC according to the comparative example, in which the first and second dielectric patterns 131 and 132 are not formed, may be in the range of 25 ° to 50 °. However, referring to fig. 6B, the MLCC 100 according to an exemplary embodiment, in which the first and second dielectric patterns 131 and 132 are formed in the first and second spaces 121 'and 122', respectively (regions where the first and second internal electrodes 121 and 122 are not formed), may have a deformation angle of 0 ° to 15 °. Here, the deformation angle refers to the maximum deformation angle among all deformation angles of all the inner electrodes with respect to the length direction X.

Such a deformation angle of the internal electrode may be determined by the content of solids contained in the ceramic paste forming the first and second dielectric patterns 131 and 132 and by the printing thickness of the first and second dielectric patterns 131 and 132. For example, the MLCC 100 according to an exemplary embodiment may have first and second dielectric patterns 131 and 132 formed in first and second spaces 121 'and 122', respectively (spaces where the first and second internal electrodes 121 and 122 are not formed), to significantly reduce the deformation angle of the internal electrodes by reducing the stepped portions formed by the internal electrodes, thereby increasing the BDV characteristics of the MLCC 100, as compared to the MLCC in the related art.

The first and second dielectric patterns 131 and 132 may each include a material that may be at a temperature higher than that used to sinter the first and second dielectric layers 111a and 111bLow temperature sintered dielectrics. As shown in fig. 7, the BDV characteristic defect position P may indicate that defects are concentrated at an edge portion of the sheet. This means that the BDV characteristic defect sites P are concentrated on the capping layer or the edge portion of the sheet, which is most affected by the step portion except the upper surface, having a relatively low level of firing density. Accordingly, the first and second dielectric patterns 131 and 132 may be formed of a paste including a dielectric that may be sintered at a low temperature to improve sinterability of otherwise deteriorated locations of the MLCC, thereby increasing reliability of the MLCC. The dielectric that can be sintered at a low temperature may refer to BaTiO including a low temperature sintered material₃A base composition. The low-temperature sintered material may refer to a glass component including an alkali metal such as Na or Li. The first and second dielectric patterns 131 and 132 may be made of a material different from that used to make the first and second dielectric layers 111a and 111 b.

Fig. 8A and 8B illustrate gaps between internal electrodes and dielectric patterns provided on ceramic sheets prior to a process of stacking to form a body during the manufacture of the MLCC. Fig. 9A and 9B illustrate the shapes of the internal electrodes 20 and the dielectric patterns 30 printed on the ceramic sheet 11 prior to the process of stacking to form the body during the manufacture of the MLCC.

Referring to fig. 8A to 9B, in a process of manufacturing the MLCC, the steps of forming the internal electrodes and the dielectric patterns may generally include forming the ceramic sheet 11 on the jig 10, printing the internal electrodes 20 on the surface of the ceramic sheet 11, and printing the dielectric patterns 30 between the printed internal electrodes 20 in the length direction X.

In an exemplary embodiment, precisely forming the dielectric pattern 30 in a desired position may be an important factor in reducing the failure rate. Therefore, as shown in fig. 8A, it may be necessary to precisely form the dielectric pattern 30 between the inner electrodes 20, and when the dielectric pattern 30 is not accurately printed in a target position due to a manufacturing error, the dielectric pattern 30 may be shifted toward a side of one of the inner electrodes 20, as shown in fig. 8B. As shown in fig. 8B, when the dielectric pattern 30 is offset toward one side of one internal electrode 20 between the internal electrodes 20, the dielectric pattern 30 may not contact the other internal electrode 20. Therefore, the problem of the stepped portion caused by the inner electrode may not be solved.

The dielectric pattern 30 may have an overlapping portion O covering an end of one of the inner electrodes 20 to prevent the dielectric pattern 30 from being shifted toward one side of one of the inner electrodes 20 between the inner electrodes 20 due to such a manufacturing error. Referring to fig. 9A and 9B, even when the dielectric pattern 30 is precisely formed in a desired position as shown in fig. 9A and even when the dielectric pattern 30 is shifted toward one side of one of the inner electrodes 20 between the inner electrodes 20 due to such a manufacturing error as shown in fig. 9B, the dielectric pattern 30 may cover the end of the inner electrode 20, thereby solving the problem of a stepped portion caused by the inner electrodes 20. In addition, the dielectric patterns 30 may have a thickness further increased than that of the internal electrodes 20, thereby preventing the internal electrodes 20 from being short-circuited in the stacking direction due to slippage of the internal electrodes 20 and the dielectric patterns 30 when being pressed. The present disclosure is not limited thereto. Although not shown in the drawings, the dielectric pattern may precisely fill the gap between the internal electrodes and physically contact the internal electrodes without overlapping the internal electrodes, or the dielectric pattern may partially fill the gap between the internal electrodes and be separated from the internal electrodes. Such a configuration can still suppress the problem caused by the stepped portion, as compared with an example in which the dielectric pattern is not provided in the gap between the internal electrodes.

Although not shown in the drawings, after stacking the plurality of structures shown in fig. 8A to 9B, the body 110 may be formed by cutting the stacked structures along a path passing through the central portion of the dielectric pattern 30, thereby forming the third surface 3 or the fourth surface 4 of the body 110.

Thus, referring back to fig. 3, the MLCC 100 according to an exemplary embodiment may have: a first dielectric pattern 131 covering an end portion of the first internal electrode 121 and filling the first space 121'; and a second dielectric pattern 132 covering an end portion of the second internal electrode 122 and filling the second space 122'. The first dielectric pattern 131 may cover an end portion of the first internal electrode 121 and fill the first space 121 ', and the second dielectric pattern 132 may cover an end portion of the second internal electrode 122 and fill the second space 122', to solve a problem that the stepped portions may not be properly removed due to slippage when the first and second dielectric patterns 131 and 132 are pressed.

As a result, the MLCC according to an exemplary embodiment may have the first and second internal electrodes 121 and 122 exposed to the fifth and sixth surfaces 5 and 6 to solve the stepped portion problem caused by the edge portion, and may have the first and second dielectric patterns 131 and 132 disposed at the first and second spaces 121 'and 122', respectively (that is, positions corresponding to portions of the body 110 where only the first or second internal electrodes 121 or 122 are formed) to solve the stepped portion problem caused by the portion of the body 110.

Therefore, the MLCC according to the exemplary embodiment may significantly increase the BDV characteristic compared to the MLCC according to the related art.

Fig. 10A and 10B illustrate schematic plan views of a first internal electrode 221 and a second internal electrode 222 of a MLCC according to another exemplary embodiment.

Description of the same configuration according to the exemplary embodiment will be omitted.

The first inner electrode 221 of the MLCC according to another exemplary embodiment may include a first capacitor part 221a and a first lead part 221b, and the second inner electrode 222 of the MLCC according to another exemplary embodiment may include a second capacitor part 222a and a second lead part 222 b.

The first lead out portion 221b may refer to a portion of the first internal electrode 221, may have a width narrower than that of the first capacitor portion 221a, and may be connected to the first external electrode, and the second lead out portion 222b may refer to a portion of the second internal electrode 222, may have a width narrower than that of the second capacitor portion 222a, and may be connected to the second external electrode.

As described above, when the first and second internal electrodes 221 and 222 are exposed to the fifth and sixth surfaces 5 and 6, respectively, a short circuit caused by conductive foreign matter or delamination of a capping layer may occur.

In the case of the fifth surface 5 and the sixth surface 6, a side insulating layer may be provided thereon to prevent a short circuit caused by conductive foreign matter. However, in the case of the third surface 3 or the fourth surface 4, only a portion of the external electrode may be disposed thereon, resulting in a decrease in reliability due to penetration of conductive foreign substances such as moisture into the body.

To solve such a problem, the width W of the first capacitor portion 221a may be set to be equal to each other_tAnd the width W of the first lead-out part 221b_aDifference W of_t-W_aAnd the width W of the second capacitor portion 222a_tAnd the width W of the second lead-out portion 222b_bDifference W of_t-W_bThe width W of the first and second capacitor parts 221a and 222a is controlled_t10% to 50%.

Table 1 below shows the high temperature and high humidity reliability evaluation and the measurement of Equivalent Series Resistance (ESR).

[ Table 1]

For the high temperature and high humidity reliability evaluation, the width W according to the first capacitance part 221a is measured by measuring the resistance value of 100 pieces over time under the high temperature and high humidity condition and calculating the number of pieces whose resistance value sharply decreases_tAnd the width W of the first lead-out part 221b_aDifference W of_t-W_aAnd the width W of the second capacitor portion 222a_tAnd the width W of the second lead-out portion 222b_bDifference W of_t-W_bWidth W corresponding to the first capacitor part 221a and the second capacitor part 222a_tRatio W of_t-W_a/W_tAnd W_t-W_b/W_tThe moisture absorption reliability of (2).

Referring to table 1, when the width W of the first capacitor portion 221a_tAnd the width W of the first lead-out part 221b_aDifference W of_t-W_aAnd the width W of the second capacitor portion 222a_tAnd the width W of the second lead-out portion 222b_bDifference W of_t-W_bIs smaller than the width W of the first and second capacitor parts 221a and 222a_tAt 10%, the effect of increasing the reliability of high temperature and high humidity is low. In contrast, when the width W of the first capacitor portion 221a_tAnd the width W of the first lead-out part 221b_aDifference W of_t-W_aAnd the width W of the second capacitor portion 222a_tAnd the width W of the second lead-out portion 222b_bDifference W of_t-W_bIs greater than the width W of the first and second capacitor parts 221a and 222a_tAt 50%, a decrease in the contact area between the outer electrode and the first and second inner electrodes 221 and 222 may cause an increase in ESR.

Therefore, the MLCC according to another exemplary embodiment may have a width W of the first capacitance part 221a_tAnd the width W of the first lead-out part 221b_aDifference W of_t-W_aAnd the width W of the second capacitor portion 222a_tAnd the width W of the second lead-out portion 222b_bDifference W of_t-W_bIs controlled to the width W of the first and second capacitor parts 221a and 222a_t10% to 50% to prevent short circuit caused by conductive foreign matter. Alternatively, the MLCC according to another exemplary embodiment may have a width W of the first capacitance part 221a_tAnd the width W of the first lead-out part 221b_aDifference W of_t-W_aAnd the width W of the second capacitor portion 222a_tAnd the width W of the second lead-out portion 222b_bDifference W of_t-W_bIs controlled to be greater than the width W of the first and second capacitor parts 221a and 222a_tIs equal to or less than the width W of the first and second capacitor parts 221a and 222a_t50% to significantly increase high temperature and high humidity reliability.

When the first and second lead-out portions 221b and 222b have a width W_aAnd W_bNarrower than the widths of the first and second capacitor portions 221a and 222a, regions where the first and second internal electrodes 221 and 222 are not formed may be generated in the first and second dielectric layers 211a and 211b, respectively. For example, the step portion may be formed due to a difference in thickness of the first and second internal electrodes 221 and 222 at a point where the first and second lead out portions 221b and 222b intersect the first and second capacitor portions 221a and 222a, respectively. For example, step portions formed at points where the first and second lead out portions 221b and 222b intersect the first and second capacitor portions 221a and 222a, respectively, may cause the dielectric layers and the first and second internal electrodes 221 and 222 to be elongated when the dielectric layers are stacked and pressed. Therefore, in the first internal electrode 221And the bent portion of the second inner electrode 222, the BDV characteristic may be deteriorated.

Accordingly, the third dielectric pattern 233 may be disposed at a point where the first capacitor part 221a and the first lead-out part 221b intersect, and the fourth dielectric pattern 234 may be disposed at a point where the second capacitor part 222a and the second lead-out part 222b intersect, solving the step part problem. For example, the third dielectric pattern 233 may be exposed to the third surface 3 and may be disposed at a point where the first capacitor portion 221a and the first lead out portion 221b of the first dielectric layer 211a may contact each other. In addition, the fourth dielectric pattern 234 may be exposed to the fourth surface 4, and may be disposed at a point where the second capacitor portion 222a and the second lead out portion 222b of the second dielectric layer 211b may contact each other. The third and fourth dielectric patterns 233 and 234 may have the above-described dielectric patterns that may be sintered at a low temperature, thereby increasing sinterability of portions of the MLCC corresponding to the third and fourth dielectric patterns 233 and 234.

In addition, the MLCC according to another exemplary embodiment may include the first dielectric pattern 231 and the second dielectric pattern 232 as in the exemplary embodiment. The first to fourth dielectric patterns 231 to 234 may be made of the same material as that used to form the dielectric patterns 131 and 132, and may be different from that used to manufacture the dielectric layers in the MLCC according to another exemplary embodiment.

Board with multilayer ceramic capacitor

Fig. 11 shows a schematic perspective view of a plate 1000 with MLCCs according to another exemplary embodiment.

Referring to fig. 11, a board 1000 having an MLCC according to another exemplary embodiment may include a substrate 1100, first and second pads 1201 and 1202, and the MLCC 100.

The substrate 1100 may be a Printed Circuit Board (PCB), but the present disclosure is not limited thereto. The first pad 1201 and the second pad 1202 may be disposed on a surface of the substrate 1100. The first pad 1201 may be connected to the first external electrode 151 and the second pad 1202 may be connected to the second external electrode 152.

The MLCC 100 mounted on the board 1000 according to another exemplary embodiment may include the MLCC 100 according to various exemplary embodiments described in the present disclosure.

For example, a MLCC 100 mounted on a board 1000 according to another exemplary embodiment may include: as shown in fig. 1 to 4, a body 110 including a first dielectric layer 111a and a second dielectric layer 111b, the body including first and second surfaces 1 and 2 facing away from each other in a stacking direction, third and fourth surfaces 3 and 4 connected to the first and second surfaces 1 and 2 and facing away from each other, and fifth and sixth surfaces 5 and 6 connected to the first to fourth surfaces 1 to 4 and facing away from each other; a first internal electrode 121 disposed on the first dielectric layer 111a, exposed to the third surface 3, the fifth surface 5, and the sixth surface 6, and separated from the fourth surface 4 by a first space 121'; a second internal electrode 122 disposed on the second dielectric layer 111b to be opposite to the first internal electrode 121 through the first dielectric layer 111a or the second dielectric layer 111b interposed between the first internal electrode 121 and the second internal electrode 122, exposed to the fourth surface 4, the fifth surface 5, and the sixth surface 6, and separated from the third surface 3 by a second space 122'; a first dielectric pattern 131 and a second dielectric pattern 132, the first dielectric pattern 131 being disposed in at least a portion of the first space 121 ', the second dielectric pattern 132 being disposed in at least a portion of the second space 122'; and a side insulating layer 140 disposed on the fifth and sixth surfaces 5 and 6 of the body 110. The MLCC 100 may be replaced by the MLCC according to another exemplary embodiment described with reference to fig. 10A and 10B.

As described above, according to exemplary embodiments, a multilayer ceramic capacitor (MLCC) may have first and second internal electrodes exposed to fifth and sixth surfaces to prevent stepped portions from being formed by the first and second internal electrodes on both end surfaces in a width direction of a body, and may include first and second dielectric patterns compensating for the stepped portions formed on both end portions in a length direction of the first and second internal electrodes to prevent stepped portions from being formed by the first and second internal electrodes on both end surfaces in the length direction of the body, thereby increasing reliability of the MLCC.

While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations can be made thereto without departing from the scope of the disclosure defined by the appended claims.