阅读说明：本技术 使用可在不同温度下移除的材料形成电子装置的方法 (Method of forming an electronic device using materials removable at different temperatures ) 是由 C·S·蒂瓦里 K·舍罗特瑞 于 2021-05-27 设计创作，主要内容包括：本申请案涉及使用可在不同温度下移除的材料形成电子装置的方法。一种方法包括形成包括交替的第一材料和第二材料的堆叠前体,所述第一材料与所述第二材料展现不同熔点。移除所述交替的第一材料和第二材料的一部分以形成穿过所述交替的第一材料和第二材料的柱状开口。在所述柱状开口中形成牺牲材料。移除所述第一材料以在所述第二材料之间形成第一空间,所述第一材料经调配以在第一移除温度下呈液相或气相。在所述第一空间中形成传导性材料。移除所述第二材料以在所述传导性材料之间形成第二空间,所述第二材料经调配以在第二移除温度下呈液相或气相。在所述第二空间中形成介电材料。从所述柱状开口移除所述牺牲材料,且在所述柱状开口中形成单元材料。(The present application relates to methods of forming electronic devices using materials that can be removed at different temperatures. A method includes forming a stacked precursor including alternating first and second materials, the first and second materials exhibiting different melting points. Removing a portion of the alternating first and second materials to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. Removing the first material to form a first space between the second material, the first material formulated to be in a liquid or vapor phase at a first removal temperature. A conductive material is formed in the first space. Removing the second material to form second spaces between the conductive materials, the second material being formulated to be in a liquid or vapor phase at a second removal temperature. Forming a dielectric material in the second space. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.)

1. A method of forming an electronic device, comprising:

forming a stacked precursor comprising alternating first and second materials on a base material, the first and second materials exhibiting different melting points;

removing a portion of the alternating first and second materials to form a columnar opening through the alternating first and second materials;

forming a sacrificial material in the columnar opening;

removing the first material to form a first space between the second material, the first material formulated to be in a liquid or vapor phase at a first removal temperature;

forming a conductive material in the first space;

removing the second material to form second spaces between the conductive materials, the second material being formulated to be in a liquid or vapor phase at a second removal temperature;

forming a dielectric material in the second space;

removing the sacrificial material from the pillar openings; and

forming a cell material in the columnar opening.

2. The method of claim 1, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the alternating first and second materials formulated to be removable at different temperatures.

3. The method of claim 1, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the first material exhibiting a melting point lower than a melting point of the second material.

4. The method of claim 1, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the alternating first and second materials exhibiting a melting point difference between about 5 ℃ and about 100 ℃.

5. The method of claim 1, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the alternating first and second materials in a substantially solid phase.

6. The method of any one of claims 1-5, wherein removing a portion of the alternating first and second materials to form a pillar opening comprises removing the portion of the alternating first and second materials using a thermal etching process to form the pillar opening.

7. The method of any one of claims 1-5, wherein removing a portion of the alternating first and second materials to form a pillar opening comprises forming the pillar opening at a temperature below the melting points of the first and second materials.

8. The method of any one of claims 1-5, wherein removing the first material to form first spaces between the second material comprises exposing the first material to a temperature above the melting point of the first material and below a melting point of the second material.

9. The method of claim 8, wherein exposing the first material to a temperature above the melting point of the first material and below the melting point of the second material comprises converting the first material to a liquid phase.

10. The method of claim 8, wherein exposing the first material to a temperature above the melting point of the first material and below the melting point of the second material comprises converting the first material to a vapor phase.

11. The method of any of claims 1-5, wherein removing the second material to form second spaces between the conductive materials comprises exposing the second material to a temperature above the melting point of the second material.

12. A method of forming an electronic device, comprising:

forming alternating first and second materials on a base material, the first and second materials being formulated to be removable at different temperatures and exhibit melting points that differ from each other by between about 5 ℃ and about 150 ℃;

exposing a portion of the alternating first and second materials to a thermal treatment to form columnar openings through the alternating first and second materials;

forming a sacrificial material in the columnar opening;

exposing the first material to a temperature above the melting point of the first material and below the melting point of the second material to remove the first material and form a first space;

forming a conductive material in the first space;

exposing the second material to a temperature above a melting point of the second material to remove the second material and form a second space;

forming a dielectric material in the second space;

removing the sacrificial material from the pillar openings; and

forming a cell material in the columnar opening.

13. The method of claim 12, wherein forming alternating first and second materials on a substrate material comprises forming alternating first materials selected from the group consisting of acetic acid, lactic acid, and formic acid and second materials comprising water.

14. The method of claim 12, wherein forming alternating first and second materials on a substrate material comprises forming alternating first materials comprising acetic acid and second materials comprising water.

15. The method of claim 12, wherein forming alternating first and second materials on a base material comprises forming alternating first materials selected from the group consisting of carbon dioxide, nitrogen, and nitrous oxide and second materials comprising water.

16. The method of claim 12, wherein forming alternating first and second materials on a base material comprises forming alternating photoresist and thermal resist materials on the base material.

17. The method of claim 12, wherein forming alternating first and second materials on a base material comprises forming the first material to exhibit a lower melting point than the second material.

18. The method of claim 12, wherein forming alternating first and second materials on a base material comprises forming one of the first and second materials at room temperature.

19. The method of any one of claims 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to a non-reactive and directional thermal etching process.

20. The method of any one of claims 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to ultraviolet radiation.

21. The method of any one of claims 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to a laser.

22. The method of any one of claims 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to a thermal etching treatment performed under vacuum conditions.

23. The method of any of claims 12-18, wherein forming a dielectric material in the second space comprises forming an oxide material in the second space.

24. The method of any of claims 12-18, wherein forming a dielectric material in the second space comprises forming an air gap in the second space.

25. A method of forming an electronic device, comprising:

forming alternating first and second materials on a substrate material, the first and second materials being formed in a solid phase and the first and second materials being formulated to be removable at different temperatures;

exposing a portion of the alternating first and second materials to a thermal etching process to form columnar openings through the alternating first and second materials;

forming a sacrificial material in the columnar opening;

removing the first material to form first spaces between the second material;

forming a conductive material in the first space;

removing the second material to form second spaces between the conductive materials;

forming a dielectric material in the second space;

removing the sacrificial material from the pillar openings; and

forming a cell material in the columnar opening.

26. The method of claim 25, wherein forming alternating first and second materials on a substrate material comprises forming the first and second materials by spin coating, blanket coating, chemical vapor deposition, or physical vapor deposition.

27. The method of claim 25, wherein forming alternating first and second materials on a substrate material comprises forming the alternating first and second materials at a temperature below a melting point of the first and second materials.

28. The method of claim 25, wherein forming conductive material in the first space comprises forming the conductive material to a gate length substantially corresponding to a length of the first space.

Technical Field

Embodiments disclosed herein relate to electronic devices and electronic device manufacturing. More particularly, embodiments of the present disclosure relate to methods of forming electronic devices using materials that are formulated to be removable at different temperatures.

Background

Electronic device (e.g., semiconductor device, memory device) designers often desire to increase the integration level or density of features (e.g., components) within an electronic device by reducing the size of individual features and by reducing the separation distance between adjacent features. Electronic device designers need to design compact architectures using simplified designs. Reducing the size and pitch of features has increased the need for methods for forming electronic devices. One solution is to form a three-dimensional (3D) electronic device in which features are arranged vertically rather than horizontally. To form a 3D electronic device, a plurality of materials are positioned over one another and etched to form a stack of materials separated from one another by openings. Features are formed in the openings. The stack of materials initially comprises alternating dielectric materials and nitride materials. The nitride material is then removed and replaced with a conductive material by a so-called "replacement gate" process. The nitride material is selectively removed relative to the dielectric material based on the difference in etch selectivity. After the replacement gate process, layers comprising alternating dielectric and conductive materials are stacked. As the spacing between adjacent stacks continues to decrease as memory density increases, conventional replacement gate processes create limitations and have issues of scalability and defectivity. Etching the stack of alternating dielectric and nitride materials utilizes multiple masks, which is expensive. Furthermore, the openings in the stack are formed by Plasma Enhanced (PE) Chemical Vapor Deposition (CVD), which induces local stresses on the etched material.

To further increase the memory density of the features, an increased number of layers (e.g., the number of alternating dielectric and conductive materials) are formed. However, as the number of layers increases, the stack and/or features exhibit bending, deformation, and localized stress. To achieve an increased number of layers, a plurality of stacks, each containing a smaller number of layers, are formed and positioned vertically adjacent to each other. However, alignment of the stack is problematic and misalignment of the features and stack occurs. The increased number of layers also results in higher costs for forming the 3D electronic device because forming openings and features in the stack accounts for a large proportion of the total cost.

Disclosure of Invention

A method of forming an electronic device is disclosed. The method includes forming a stacked precursor including alternating first and second materials on a base material. The first material and the second material exhibit different melting points. Removing a portion of the alternating first and second materials to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. Removing the first material to form a first space between the second material, the first material formulated to be in a liquid or vapor phase at a first removal temperature. A conductive material is formed in the first space. Removing the second material to form second spaces between the conductive materials, the second material being formulated to be in a liquid or vapor phase at a second removal temperature. Forming a dielectric material in the second space. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.

Another method of forming an electronic device is disclosed. The method includes forming alternating first and second materials on a base material. The first material and the second material are formulated to be removable at different temperatures and exhibit melting points that differ from each other by between about 5 ℃ and about 150 ℃. Exposing a portion of the alternating first and second materials to a thermal treatment to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. The first material is exposed to a temperature above the melting point of the first material and below the melting point of the second material to remove the first material and form a first space. A conductive material is formed in the first space. Exposing the second material to a temperature above a melting point of the second material to remove the second material and form a second space. Forming a dielectric material in the second space. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.

Yet another method of forming an electronic device is disclosed. The method includes forming alternating first and second materials on a base material. The first and second materials are formed in a solid phase and are formulated to be removable at different temperatures. A portion of the alternating first and second materials is exposed to a thermal etching process to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. The first material is removed to form first spaces between the second material and a conductive material is formed in the first spaces. The second material is removed to form second spaces between the conductive materials, and a dielectric material is formed in the second spaces. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.

Drawings

FIG. 1 is a flow diagram of processing acts performed to form an electronic device according to an embodiment of the disclosure; and

fig. 2 through 12 are cross-sectional views of an electronic structure including a stack of alternating materials at various stages of forming the stack, according to an embodiment of the present disclosure.

Detailed Description

A method of forming an electronic device including a stack of materials is disclosed. The material stack is formed using materials of stacked precursors that are selectively removable relative to one another based on differences between melting points of the stacked precursor materials. The stacked precursor materials exhibit sufficient difference between their respective melting points such that one of the stacked precursor materials can be selectively removed by increasing the temperature above the melting point of the respective stacked precursor material. Another of the stacked precursor materials may be selectively removed by increasing the temperature above the melting point of the other stacked precursor material. Thus, thermal selectivity is used to remove stacked precursor materials at different times during the manufacturing process to form electronic devices. The method includes forming a stacked precursor material at a temperature below a respective melting point of the stacked precursor material, and removing the respective stacked precursor material using phase transformation of the stacked precursor material. Each of the materials of the stacked precursors is separately removed by increasing the temperature of the stacked precursors above the melting point of the stacked precursor materials. One of the materials of the stack precursor is selectively removed and replaced with a stack material, and another of the materials of the stack precursor is selectively removed and replaced with another stack material. The stack precursor material is replaced with a stack material to form a stack, the stack being present in an electronic device (e.g., an apparatus, a semiconductor device, a memory device).

The stacked precursor materials are formulated to be in a solid phase when formed and are formulated to be in a liquid or vapor phase when removed. The stacked precursor materials are converted (e.g., phase-transformed) from a solid phase to a liquid or vapor phase to selectively remove each of the stacked precursor materials. One of the materials of the stacked precursors is removed by increasing the temperature of the stacked precursors above the melting point of the stacked precursor material and below the melting point of the other stacked precursor material. The stacked precursor is subjected to a material removal temperature (e.g., a first removal temperature) to convert the solid phase material to a liquid or vapor phase. After removal, a conductive material (e.g., electrically conductive) is formed in place of the stacked precursor material. Another stack precursor material is then removed by increasing the temperature of the stack precursor above the melting point of the other stack precursor material. The stacked precursor is subjected to a removal temperature (e.g., a second removal temperature) of another stacked precursor material, thereby converting the solid phase material to a liquid phase or a vapor phase. Alternatively, one or more of the stacked precursor materials may be at the removal temperature T_rAnd (4) decomposing. The other stack precursor material is replaced with a dielectric material, forming a stack comprising alternating conductive and dielectric materials. Alternatively, the other material is replaced with air, thereby forming a stack comprising alternating conductive materials and air gaps.

Stacks containing alternating conductive materials and dielectric materials or alternating conductive materials and air gaps are formed by a so-called "replacement" process in that the material of the stack precursor is removed and replaced with additional material. The alternating conductive and dielectric materials or the alternating conductive materials and air gaps form a portion (e.g., an assembly) of the stacked structure. One or more of the stacked structures form a portion (e.g., a component) of an electronic device (e.g., an apparatus, a semiconductor device, a memory device). Additional features are present in or adjacent to the stacked structure depending on the electronic device to be formed.

The following description provides specific details such as material types, material thicknesses, and processing conditions in order to provide a thorough description of the embodiments described herein. However, it will be understood by those skilled in the art that the embodiments disclosed herein may be practiced without these specific details. Indeed, embodiments may be practiced in conjunction with conventional fabrication techniques employed in the semiconductor industry. In addition, the descriptions provided herein do not form a complete description of an electronic device or a complete process flow for manufacturing an electronic device, and the structures described below do not form a complete electronic device. Only those process actions and structures necessary to understand the embodiments described herein are described in detail below. Additional acts to form a complete electronic device may be performed by conventional techniques.

Unless otherwise indicated, the materials described herein may be formed by conventional techniques including, but not limited to: spin coating, blanket coating, Chemical Vapor Deposition (CVD), Atomic Layer Deposition (ALD), plasma enhanced ALD, Physical Vapor Deposition (PVD), including sputtering, evaporation, ionized PVD, and/or plasma enhanced CVD, or epitaxial growth. Alternatively, the material may be grown in situ. The techniques for depositing or growing the materials may be selected by one skilled in the art depending on the particular materials to be formed. Unless the context indicates otherwise, material removal may be achieved by any suitable technique including, but not limited to, etching (e.g., dry etching, wet etching, vapor phase etching), ion milling, abrasive planarization (e.g., chemical-mechanical planarization), or other known methods.

The drawings presented herein are for illustrative purposes only and are not intended to be actual views of any particular material, component, structure, electronic device, or electronic system. It is contemplated that the shapes depicted in the drawings will vary, due to, for example, manufacturing techniques and/or tolerances. Thus, embodiments described herein should not be construed as limited to the particular shapes or regions as illustrated, but are to include deviations in shapes that result, for example, from manufacturing. For example, an area illustrated or described as box-shaped may have rough and/or non-linear features, and an area illustrated or described as circular may include some rough and/or linear features. Further, the illustrated acute angles may be rounded, and vice versa. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims. The drawings are not necessarily to scale. Furthermore, common elements between the drawings may retain the same numerical designation.

As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

As used herein, "and/or" includes any and all combinations of one or more of the associated listed items.

As used herein, reference to "about" or "approximately" a value of a particular parameter includes the value, and a person of ordinary skill in the art will appreciate that the degree of deviation from the value is within an acceptable tolerance of the particular parameter. For example, "about" or "approximately" with respect to a value may include additional values that are within a range of 90.0 percent to 110.0 percent of the value, such as within a range of 95.0 percent to 105.0 percent of the value, within a range of 97.5 percent to 102.5 percent of the value, within a range of 99.0 percent to 101.0 percent of the value, within a range of 99.5 percent to 100.5 percent of the value, or within a range of 99.9 percent to 100.1 percent of the value.

As used herein, spatially relative terms, such as "below," "lower," "bottom," "above," "upper," "top," "front," "rear," "left," "right," and the like, may be used for convenience in describing the relationship of one element or feature to another element or feature, as illustrated in the figures. Unless otherwise specified, the spatially relative terms are intended to encompass different orientations of the material in addition to the orientation depicted in the figures. For example, if the materials in the figures are reversed, elements described as "below," "beneath," "under," or "on the bottom" other elements or features would then be oriented "above," or "on the top" of the other elements or features. Thus, the term "below" can encompass both an orientation of above and below, depending on the context in which the term is used, as will be apparent to one of ordinary skill in the art. The materials may be otherwise oriented (e.g., rotated 90 degrees, inverted, or flipped) and the spatially relative descriptors used herein interpreted accordingly.

As used herein, the term "configured to" refers to the size, shape, material composition, and arrangement of one or more of at least one structure and at least one device that facilitates the operation of one or more of the structure and device in a predetermined manner.

As used herein, the term "electronic device" includes, but is not limited to, memory devices, as well as other semiconductor devices, such as logic devices, processor devices, or Radio Frequency (RF) devices, that may or may not incorporate memory. Furthermore, the electronic device may incorporate memory as well as other functions, such as a so-called "system on chip" (SoC) that includes a processor and memory, or an electronic device that includes logic and memory. The electronic device may be a 3D electronic device that includes stacked materials, such as a stack of alternating conductive materials and dielectric materials or a stack of alternating conductive materials and air gaps.

As used herein, reference to an element being "on" or "over" another element means and includes the element being directly on top of, adjacent (e.g., laterally adjacent, vertically adjacent) to, under, or in direct contact with the other element. This also includes the element being indirectly on top of, adjacent to (e.g., laterally adjacent, vertically adjacent to), under, or near another element with other elements present therebetween. In contrast, when an element is referred to as being "directly on" or "directly adjacent" another element, there are no intervening elements present.

As used herein, the term "selectively removable" means and includes a material that exhibits a greater removal rate in response to the same processing conditions, such as exposure to radiation (e.g., heat), relative to another material exposed to the processing conditions. A material that is selectively removable relative to another material may be substantially completely removed without removing any of the other material.

As used herein, the term "selectively etchable" means and includes a material that exhibits a greater etch rate in response to exposure to a given etch chemistry and/or processing conditions relative to another material exposed to the same etch chemistry and/or processing conditions. For example, the material may exhibit an etch rate that is at least about five times greater than that of another material, such as an etch rate that is about ten times, about twenty times, or about forty times greater than that of another material. Those of ordinary skill in the art can select etch chemistries and etch conditions for selectively etching the desired material.

As used herein, the term "stacked precursor" means and includes structures that include alternating stacks of precursor materials that are positioned vertically adjacent to one another and that are selectively removable and replaceable with additional materials. One or more of the stack precursor materials are sacrificial in that the materials are subsequently replaced with different materials (e.g., sacrificial stack materials).

As used herein, the term "stacked precursor material" means and includes a material that is a solid phase under formation conditions and a liquid or vapor phase under removal conditions for the stacked precursor.

As used herein, the term "stack" means and includes structures having alternating stacks of materials positioned vertically adjacent to one another.

As used herein, the term "stack material" means and includes materials formed in place of the stack precursor materials and present in the stack. The materials of the stack include one or more conductive (e.g., electrically conductive) materials and one or more insulative (e.g., electrically insulative) materials.

As used herein, the term "stacked structure" means and includes a structure that includes alternating stacked materials and cell materials adjacent to the stacked materials.

As used herein, the term "substantially" with respect to a given parameter, property, or condition means and includes the extent to which the given parameter, property, or condition satisfies a variance (e.g., within an acceptable manufacturing tolerance) as would be understood by one of ordinary skill in the art. As an example, depending on the particular parameter, property, or condition being substantially met, the parameter, property, or condition may be at least 90.0% met, at least 95.0% met, at least 99.0% met, or even at least 99.9% met.

As used herein, the term "thermally removable" means and includes a material that exhibits a greater rate of removal in response to exposure to heat relative to another material exposed to the same heat.

As used herein, the term "substrate" means and includes a material (e.g., a base material) or construction on which an additional material is formed. The substrate can be an electronic substrate, a semiconductor substrate, a base semiconductor layer on a support structure, an electrode, an electronic substrate having one or more materials, layers, structures or regions formed thereon, a semiconductor substrate having one or more materials, layers, structures or regions formed thereon. Materials on the electronic or semiconductor substrate may include, but are not limited to, semi-conductive materials, insulating materials, conductive materials, and the like. The substrate may be a conventional silicon substrate, or other bulk substrate comprising a layer of semi-conductive material. As used herein, the term "bulk substrate" means and includes not only silicon wafers, but also silicon-on-insulator ("SOI") substrates, such as silicon-on-sapphire ("SOS") substrates and silicon-on-glass ("SOG") substrates, epitaxial layers of silicon on a base semiconductor basis, and other semiconductor or optoelectronic materials, such as silicon germanium, gallium arsenide, gallium nitride, and indium phosphide. The substrate may be doped or undoped.

As used herein, the terms "vertical," "longitudinal," "horizontal," and "lateral" are with reference to the major plane of a structure and are not necessarily defined by the earth's gravitational field. A "horizontal" or "lateral" direction is a direction substantially parallel to the major plane of the structure, while a "vertical" or "longitudinal" direction is a direction substantially perpendicular to the major plane of the structure. The main plane of the structure is defined by the surface of the structure having a relatively large area compared to the other surfaces of the structure.

As shown in the flow chart of fig. 1, at a temperature less than the melting point T of the first material₁Formation temperature T of_f1A first material (e.g., a first stacked precursor material) is formed over a substrate (e.g., a base material). The second material (e.g., the second stack precursor material) has a melting point T less than the second material₂And less than the melting point T of the first material₁Formation temperature T of_f2The lower is formed on the first material. Melting point T of the first material₁Less than the melting point T of the second material₂. The first and second materials may be below the melting point T₁、T₂Single forming temperature T of_fOr each of the first and second materials may be below the respective melting point T₁、T₂Different formation temperature T of_f1、T_f2The following is formed. The formation of alternating first and second materials is repeated sequentially until a stacked precursor comprising alternating first and second materials is formed to a desired height. Because the first and second materials are formed at temperatures below their respective melting points, the first and second materials are formed on the base material in solid form (e.g., in a substantially solid phase).

A hard mask material is formed adjacent (e.g., above) the stacked precursor of alternating first and second materials, and the hard mask material is patterned. The hard mask material is at a temperature below the melting point T of the first and second materials₁、T₂Is formed at a temperature of (1). The pattern in the hard mask material is formed by removing (e.g., etching) portions of the first and second materials exposed through the patterned hard mask material to form openings (e.g., pillar openings, trenches, and trenches,Memory holes) to the stacked precursor materials. The first material and the second material are at a temperature below the melting point T₁、T₂Is patterned at the temperature of (1). After removing the patterned hard mask material, a sacrificial material is formed in the pillar openings. The sacrificial material is below the melting point T₁、T₂Is formed at a temperature of (1).

The first material and the second material are at a removal temperature T_rAnd may be a liquid (e.g., substantially in the liquid phase) or a gas (e.g., substantially in the gas phase). The first material of the stacked precursor is formed by increasing the temperature of the stacked precursor above the melting point T of the first material₁And is lower than the melting point T of the second material₂Removal temperature T of_r1And removed. The first material is liquid or gaseous at the removal temperature, thereby enabling removal of the first material and forming a first space between vertically adjacent portions of the second material. A conductive material is formed in the first space. The first material is substantially completely removed and the conductive material substantially completely fills the first space such that the conductive material has substantially the same dimensions as the dimensions forming the first material. The temperature of the stacked precursor may be increased above the melting point T of the second material₂Removal temperature T of_r2Thereby enabling removal of the second material and formation of second spaces between vertically adjacent conductive materials. The second material is a liquid or a gas at the removal temperature. Forming a dielectric material in the second space. The second material is substantially completely removed and the dielectric material substantially completely fills the second space such that the dielectric material has substantially the same dimensions as the dimensions forming the second material. After removing the sacrificial material, a cell material is formed in the pillar openings to form an electronic device containing the memory cells.

Although embodiments herein describe the materials of the stacked precursors as including two materials, more than two materials (e.g., three or more materials) may be present in the stacked precursors, so long as the stacked precursor materials are selected to exhibit removal selectivity based on different melting points of the stacked precursor materials. Two or more stacked precursor materials may be selected to exhibit thermal selectivity during the fabrication process. Further, stacking precursors can include stacking different arrangements (e.g., configurations) of precursor materials rather than alternating precursor materials.

A stack precursor 5 comprising alternating first 10 (e.g., a first stack precursor material) and second 15 (e.g., a second stack precursor material) materials is shown in fig. 2. The stacked precursor 5 is formed by alternately forming a first material 10 and a second material 15 over a base material 20. The stack precursor 5 may also be referred to as including one or more sacrificial stack materials, such as a first sacrificial stack material and a second sacrificial stack material. The processing acts described herein are performed using conventional semiconductor equipment. The processing temperature (e.g., formation temperature T) described herein_fRemoving temperature T_r) May be achieved using conventional semiconductor processing equipment configured to maintain the temperature of the chuck on which the stack precursor 5 is placed at ± 5 ℃ or less. The first material 10 is at a temperature less than the melting point T of the first material 10₁Formation temperature T of_f1Is formed on the base material 20, and the second material 15 is at a melting point T less than the second material 15₂And less than the melting point T of the first material 10₁Formation temperature T of_f2Is formed on the first material 10. Alternatively, the first material 10 and the second material 15 are at a temperature less than the melting point T of the first material 10 and the second material 15₁、T₂Single forming temperature T of_fThe following is formed. The first material 10 and the second material 15 are at a forming temperature T_f、T_f1、T_f2And is formed in a substantially solid phase. The first material 10 and the second material 15 may also be thermally removed (e.g., thermally etchable) relative to each other.

The first material 10 may exhibit a melting point T that is greater than the melting point T of the second material 15₂Low melting point T₁. The difference in melting points between the first material 10 and the second material 15 may be in a range between a difference of about 5 ℃ and about 150 ℃. Merely by way of example, the melting point T of the first material 10₁Melting point T of the comparable second material 15₂About 5 ℃ lower, the melting point T of the first material 10₁Melting point T of the comparable second material 15₂Less than about 15 deg.C, melting point T of first material 10₁Melting point T of the comparable second material 15₂Less than about 50 deg.C, or the melting point T of the first material 10₁Can be comparedMelting point T of the second material 15₂About 100 deg.c less. By selecting the materials of the first material 10 and the second material 15 to exhibit a melting point T₁、T₂The difference between, the first material 10 of the stacked precursor 5 is selectively thermally removable relative to the second material 15 and relative to other exposed materials of the stacked precursor 5. Melting point T of the first material 10 and the second material 15₁、T₂The greater the difference between, the easier and more complete the thermal removal of the first material 10 may be compared to the second material 15 and the exposed material of the stack precursor 5. By appropriately selecting the first material 10 and the second material 15, thermal selectivity may be used to selectively remove the first material 10 and the second material 15.

In addition to being compatible with the base material 20, the first and second materials 10, 15 are also compatible with deposition conditions for forming the first and second materials 10, 15, removal process conditions for removing portions of the first and second materials 10, 15, deposition process conditions for forming a hard mask material, and removal process conditions for forming a patterned hard mask material 25 (see fig. 3). First material 10 and second material 15 may form distinct layers that do not diffuse (e.g., do not interdiffuse) with each other. By forming the first material 10 and the second material 15 at a temperature below their melting points, interdiffusion of the first material 10 and the second material 15 is minimized, and formation of discrete layers is maximized. In the case where adhesion occurs between the first material 10 and the second material 15, substantially no intermixing occurs between the first material 10 and the second material 15.

The first material 10 and the second material 15 may be organic compounds (e.g., organic acids, alcohols, polymers), inorganic compounds, ionic liquids, or combinations thereof, as long as the materials of the first material 10 and the second material 15 can be selectively removed with respect to each other based on the difference between their melting points. By way of example only, the organic acid may be acetic acid (mp 16.6 deg.C), lactic acid (mp 16.8 deg.C) or formic acid (mp 8.4 deg.C). By way of example only, the alcohol may be methanol (melting point-97.6 deg.C) or ethanol (melting point-114.1 deg.C). Other organic compounds, such as naphthalene (melting point 80.3 deg.C) may also be used. Merely by way of example, the inorganic compound may be carbon dioxide (CO)₂) (melting point-56.6 ℃ C.), water (H)₂O) (melting point 0 ℃ C.), nitrogen (N)₂) (melting point-210 ℃ C.) or nitrous oxide (N)₂O) (melting point-90.86 ℃ C.). By way of example only, the ionic liquid may comprise, but is not limited to, 1-ethyl-3-methylimidazolium sulfate ethyl ester (melting point less than-20 ℃).

Merely by way of example, the polymer may be a photosensitive polymer or a heat-sensitive polymer, such as a photoresist or a heat-sensitive resist. The photopolymer or thermosensitive polymer may alternatively be at the removal temperature T_rAnd (4) decomposing. Since resist materials are typically in a liquid phase at temperatures used for semiconductor processing, the resist material may be formed by conventional techniques, and the solvent removed to form the resist material as a solid on the base material 20. The polymer may include one or more functional groups to tailor the melting point of the polymer and one or more functional groups selected for coupling with radiation used to pattern the first material 10 and the second material 15.

In some embodiments, the first material 10 is water and the second material 15 is acetic acid. In such embodiments, water and acetic acid may be alternately formed on the base material 20 at a temperature of less than about-10 ℃. In other embodiments, the first material 10 is a resist having a melting point of about 50 ℃ and the second material is a resist having a melting point of about 75 ℃. In other embodiments, the first material 10 is a photoresist and the second material 15 is a thermal resist, and the difference in melting points of the two resists is greater than about 5 ℃.

First material 10 and second material 15 may be formed on base material 20 by conventional techniques including, but not limited to, spin coating, blanket coating, CVD, or PVD. If the first material 10 and the second material 15 are resist materials, each of the first material 10 and the second material 15 may be initially formed on the base material 20 in a liquid phase including a solvent. The solvent can then be removed (e.g., evaporated) to form the first material 10 and the second material 15 as solids.

Each of the alternating first and second materials 10, 15 may be formed to a thickness that depends on the desired electrical characteristics of the electronic device that is ultimately to be formed. The thickness of first material 10 and second material 15 may depend on, for example, the desired thickness of the dielectric material and conductive material that is ultimately to be formed in place of first material 10 and second material 15. The thickness of the first material 10 formed may correspond to a desired gate length of an electronic device if the first material 10 is replaced with a conductive material configured as a gate of the electronic device. If the second material 15 is replaced with a dielectric material, the second material 15 may be formed to a thickness sufficient to isolate (e.g., electrically isolate) the conductive components of the electronic device from the dielectric material. The first material 10 and the second material 15 may be formed with the same thickness or different thicknesses with respect to each other. The alternating formation of first material 10 and second material 15 may be repeated until the stacked precursor 5 is formed to a desired height. The stacked precursor 5 comprises a plurality of layers, wherein each layer comprises a first material 10 and a second material adjacent (e.g., vertically adjacent) to the first material 10.

As shown in fig. 3, a hard mask material is formed adjacent to (e.g., above) the stacked precursor 5 and patterned to form a patterned hard mask material 25. The hard mask material is at a temperature below the melting point T of the first material 10 and the second material 15₁、T₂Is formed at a temperature of (1). The hard mask material may be formed by conventional techniques including, but not limited to, spin coating, blanket coating, CVD, or PVD. The hard mask material of the stack precursor 5 may be an insulating material, a semi-conductive material, or a metallic material that is selectively removable (e.g., selectively etchable) relative to the first material 10 and the second material. The hard mask material may also be compatible with the processing conditions (e.g., processing temperature) used to form and pattern the hard mask material and the processing conditions (e.g., processing temperature) used to pattern the first material 10 and the second material 15. The hard mask material may include, but is not limited to, silicon oxide, silicon nitride, tungsten, tantalum, titanium, or photoresist. The hard mask material may be formed to a thickness sufficient to protect the material of the stack precursor 5 during subsequent processing actions.

Portions of the hard mask material are removed (e.g., etched) to form a patterned hard mask material 25 comprising openings. The hard mask material may be at a temperature below the melting point T of the first material 10 and the second material 15₁、T₂Is patterned at the temperature of (1). Although for simplicity atA single opening in the patterned hard mask material 25 is shown in fig. 3, but multiple openings are present in the patterned hard mask material 25.

The hard mask material may be patterned by conventional techniques and the patterned hard mask material 25 used as a mask to remove underlying portions of the first material 10 and the second material 15. As shown in fig. 4 and 5, portions of the first material 10 and the second material 15 underlying the openings in the patterned hard mask material 25 are removed (e.g., etched) to form columnar openings 30 in the stack precursor 5. Thus, the pattern of the patterned hard mask material 25 is transferred into the first material 10 and the second material 15. The columnar openings 30 may exhibit a Critical Dimension (CD) of less than about 150nm, such as between about 50nm and about 150nm, between about 80nm and about 120nm, between about 70nm and about 110nm, or between about 60nm and about 100 nm. The pillar openings 30 may exhibit a high aspect ratio, e.g., have an aspect ratio (i.e., ratio of width to depth) of greater than or equal to about 5:1, e.g., from about 5:1 to about 100:1, from about 5:1 to about 50:1, from about 10:1 to about 40:1, from about 10:1 to about 30:1, from about 10:1 to about 20:1, from about 20:1 to about 50:1, from about 20:1 to about 40:1, or from about 20:1 to about 30: 1. The columnar openings 30 are below the melting point T of the first material 10 and the second material 15₁、T₂Is formed at a temperature of (1). For simplicity, fig. 4 and 5 show a single cylindrical opening 30. However, depending on the number of openings present in the patterned hard mask material 25, there may be multiple columnar openings 30 in the stack precursor 5.

The material of the stack precursor 5 is removed by exposing the first material 10 and the second material 15 to a thermal treatment (e.g., a non-reactive and directional thermal etch process). The thermal etching process generates localized radiation (e.g., light, heat) at wavelengths less than or equal to wavelengths in the Ultraviolet (UV), x-ray, or gamma-ray regions of the electromagnetic spectrum. Substantially no reactive species are generated by the thermal etching process and the high temperature ions generated by the thermal etching process are used to locally remove the first material 10 and the second material 15. The light and/or heat generated by the thermal etch process acts as an etch front to locally remove portions of the first material 10 and the second material 15 using the patterned hard mask material 25 as a mask. The portions of the first material 10 and the second material 15 below the openings in the patterned hard mask material 25 are removed, starting from the top surface of the stack precursor 5, extending to the bottom surface of the stack precursor 5, and exposing the bottommost first material 10. The localized radiation provides for consistent removal (e.g., consistent etching) of the first material 10 and the second material 15 to form a pillar opening 30 exhibiting substantially vertical sidewalls. By way of example only, the thermal etch process may be a plasma dry etch process comprising an inert gas, such as argon. The high temperature ions of the thermal process impart thermal energy to the portions of the first and second materials 10, 15 exposed through the patterned hard mask material 25 but substantially free of reactive species. Alternatively, a laser may be used to remove the first material 10 and the second material 15 as long as the spot size of the laser is smaller than the size of the columnar opening 30 to be formed. The dimensions of the pillar openings 30 may be sufficient to form features, such as high aspect ratio features, in the pillar openings 30.

Without being bound by any theory, it is believed that radiation from the thermal etching process couples to the bond between the first material 10 and the second material 15. The radiation is absorbed by the bond such that the exposed portions of the first and second materials 10, 15 are removed (e.g., volatilized, evaporated, vaporized, sublimated). To increase the degree of coupling between the radiation and the first and second materials 10, 15, the functional groups of the first and second materials 10, 15 may be selected for coupling with the radiation. Merely by way of example, the functional group may be a hydroxyl (OH) functional group. The thermal etch process generates a small amount of radiation (e.g., heat, light) that is localized under the openings in the patterned hard mask material 25 and does not substantially increase the temperature of the bulk volume of the other portions of the first and second materials 10, 15. Thus, only portions of the first material 10 and the second material 15 proximate to the openings in the patterned hard mask material 25 are removed. The high directionality of the thermal etch process forms the columnar openings 30 in the desired locations of the stacked precursors 5 without removing other portions of the first and second materials 10, 15. Thus, the columnar opening 30 is formed at a desired size without undesirably increasing the CD of the columnar opening 30. The thermal etching process may be performed under vacuum conditions to maximize the directionality of the thermal etching process and thermodynamically drive the etching process by removing volatile species from the tool containing the stacked precursors 5. The patterned hard mask material 25 is then removed by conventional techniques.

Although fig. 3 and 4 illustrate the patterned hard mask material 25 and use of the patterned hard mask material 25 to etch the stack precursor 5, the columnar openings 30 in the stack precursor 5 may alternatively be formed using a reticle (not shown) having the desired pattern. The reticle may be positioned over the stack precursor 5 and the columnar openings 30 formed through the first material 10 and the second material 15 by conventional techniques. Thus, the pillar openings 30 may be formed directly without using the patterned hard mask material 25 as a mask. In this case, the columnar openings 30 are formed directly by removing portions of the first material 10 and the second material 15, as shown between the stacked precursor 5 of fig. 2 and the stacked precursor 5 of fig. 5. As discussed below, slits 40 are also formed in the stack precursor 5.

Sacrificial material 35 is formed in the pillar openings 30 as shown in fig. 6. The sacrificial material 35 is at a temperature below the melting point T of the first material 10 and the second material 15₁、T₂Is formed at a temperature of (1). Sacrificial material 35 may be selectively removed relative to the exposed material of stack 65 (see fig. 10 and 11). Sacrificial material 35 may be an electrically insulating material, such as a dielectric material, or other selectively removable material. The sacrificial material 35 may include, but is not limited to, silicon dioxide, silicon nitride, silicon oxynitride, silicon oxycarbide, spin-on dielectric material (SOD), BPSG, BSG, air gap, another dielectric material, or a resist material. The sacrificial material 35 may provide mechanical support and integrity to the stack precursor 5 and the stack 65 during a replacement process that removes and replaces the material of the stack precursor 5. The sacrificial material 35 may substantially completely fill the pillar openings 30, and any excess sacrificial material 35 may be removed from the uppermost surface of the stack precursor 5.

In addition to the columnar openings 30, slits 40 are formed in the stacked precursor 5 before, after, or simultaneously with the formation of the columnar openings 30. The slits 40 are formed by conventional techniques and may extend through the stacked precursors 5 and into the base material 20. The slits 40 are formed by removing portions of the first material 10 and the second material 15 in desired locations. Slit 40 is below the melting point T of the first material 10 and the second material 15₁、T₂Is formed at a temperature of (1). As described in more detail below, the slits 40 are used during subsequent processes to remove and replace the first material 10 and the second material 15 with additional materials (e.g., conductive materials and dielectric materials), respectively. Although the slits 40 and their formation are shown in fig. 4-11, the slits 40 may be formed before the patterned hard mask material 25 is formed, after the patterned hard mask material 25 is formed and before the pillar openings 30 are formed, after the pillar openings 30 are formed, or after the sacrificial material 35 is formed in the pillar openings 30. By way of example only, the slits 40 and the pillar openings 30 may be formed substantially simultaneously, the sacrificial material 35 formed in the slits 40 and the pillar openings 30, and the sacrificial material 35 removed from the slits 40 without substantially removing the sacrificial material 35 from the pillar openings 30.

During the processing acts described above with respect to fig. 1-6, the temperature of the chuck in which the stacked precursor 5 is located is maintained below the melting point T of the first and second materials 10, 15₁、T₂. Thus, the first material 10 and the second material 15 are maintained in their respective solid phases during the processing acts described above. Different temperatures may be used for the individual processes as long as the temperature of the chuck in which the stacked precursor 5 is located remains below the melting point T of the first material 10 and the second material 15₁、T₂And (4) finishing.

As shown in fig. 7, the first material 10 is selectively removed by increasing the temperature of the environment to which the stacked precursor 5 is exposed (e.g., processing environment, environment surrounding the chuck in which the stacked precursor 5 is placed, chamber), thereby forming a stacked precursor 5'. The chamber of a conventional semiconductor apparatus in which the chuck is contained may be used to increase the temperature of the chuck. Conventional semiconductor apparatus are configured to achieve a temperature difference of ± 5 ℃ over a temperature range between about-250 ℃ and about 1075 ℃. Conventional semiconductor equipment for performing the processing acts described herein is configured to achieve temperatures below about 0 ℃, temperatures between about 0 ℃ and about 100 ℃, and temperatures greater than about 100 ℃. Other processing conditions (e.g., pressure within the chamber) may be adjusted to increase or decrease the rate at which the first material 10 and the second material 15 are removed. By way of example only, the pressure within the chamber may be increased to decrease the removal rate, or the pressure within the chamber may be decreased to increase the removal rate.

Due to the melting point T of the first material 10₁Less than the melting point T of the second material 15₂It is thus possible to increase the temperature of the environment surrounding the stacked precursor 5 to the removal temperature T_r1While the first material 10 is selectively removed with respect to the second material 15, said removal temperature being greater than the melting point T of the first material 10₁And less than the melting point T of the second material 15₂. The first material 10 is also selectively removed relative to the base material 20 and the sacrificial material 35. At a removal temperature T_r1Next, the first material 10 is transformed into a liquid state or a gaseous state and removed through the slit 40, thereby forming a first space 45 between the vertically adjacent second materials 15. If the first material 10 is at the removal temperature T_r1Next a liquid, the liquid first material 10 may be removed by a conventional liquid removal process (e.g., pumping, spinning, or otherwise removing the liquid). If the first material 10 is at the removal temperature T_r1Next, a gas, the gaseous first material 10 may be removed by a conventional gas removal process, such as volatilization, evaporation, gasification, sublimation, or otherwise removing the gas. The first spaces 45 exhibit dimensions that are substantially similar to the dimensions of the first material 10 in that substantially all of the first material 10 is removed after the temperature increase.

Conductive material 50 is formed in first space 45 via slit 40, as shown in fig. 8. The conductive material 50 is at a temperature below the melting point T of the second material 15₂Is formed at a temperature of (1). Other processing conditions for forming conductive material 50 are compatible with second material 15 and do not substantially affect the properties of second material 15. Conductive material 50 may substantially completely fill first space 45 defined by the remaining portions of second material 15. Thus, conductive material 50 is formed in the location where first material 10 was previously located and replaces first material 10. Conductive material 50 exhibits substantially the same dimensions as those forming first material 10. Conductive material 50 may be formed in first spaces 45 by conventional techniques. Conductive material 50 may comprise a conductive material including, but not limited to, tungsten, aluminum, copperTitanium, tantalum, platinum, alloys thereof, heavily doped semiconductor materials, polysilicon, conductive silicides, conductive nitrides, conductive carbon, conductive carbides, or combinations thereof. In some embodiments, the conductive material 50 is tungsten. The conductive material 50 may be configured, for example, as access lines, word lines, contacts, digit lines, bit lines, etc. of the electronic device containing the stack 65. The conductive material 50 may alternatively be configured as an electrode. A portion of the conductive material 50 may be removed, thereby recessing the conductive material 50 to prevent short circuits between adjacent conductive materials. By way of example only, conductive material 50 may be recessed laterally adjacent to slits 40 to form discrete conductive structures, such as word lines.

As shown in fig. 9, the temperature of the environment to which the stacked precursor 5' may be exposed may be increased above the melting point T of the second material 15₂While the second material 15 is selectively removed. By increasing the temperature of the chuck to above the melting point T₂Removal temperature T of_r2To remove the second material 15. The second material 15 is selectively removed relative to the conductive material 50, the base material 20, and the sacrificial material 35. At a removal temperature T_r2Next, the second material 15 is transformed into a liquid or gaseous state and removed through the slit 40, thereby forming second spaces 55 between vertically adjacent conductive materials 50. As discussed above for the removal of the first material 10, the second material 15 may be removed by a conventional liquid or gas removal process. The second spaces 55 exhibit dimensions that are substantially similar to the dimensions of the second material 15 in that substantially all of the second material 15 is removed after it is converted to a liquid or gaseous state.

During the removal of one or more of the first material 10 and the second material 15, an in situ polymer may optionally be formed on the sidewalls of the slit 40. The in situ polymer may be formed substantially simultaneously with the removal of one or more of first material 10 and second material 15. The in-situ polymer may be formed by introducing a polymeric species into the chamber during a thermal etching process for removing the first material 10 and the second material 15. The in-situ polymer formed on the sidewalls of the slit 40 may prevent scattering of radiation during the thermal etching process.

A dielectric material 60 is formed in the second cavityIn the compartment 55, as shown in fig. 10. The dielectric material 60 may substantially completely fill the second space 55 defined by the surface of the conductive material 50 to form a stack 65. Thus, dielectric material 60 is formed in the location where second material 15 was previously located and replaces second material 15. Dielectric material 60 exhibits substantially the same dimensions as those forming second material 15. The dielectric material 60 may be formed in the second space 55 by conventional techniques. Dielectric material 60 may comprise an electrically insulating material including, but not limited to, silicon oxide (e.g., silicon dioxide (SiO)₂) Silicon nitride, phosphosilicate glass, borosilicate glass, borophosphosilicate glass, fluorosilicate glass, or combinations thereof. In some embodiments, the dielectric material 60 is silicon oxide. The dielectric material 60 may, for example, be configured to electrically isolate the conductive material 50 of the electronic device containing the stack 65. The dielectric material 60 may be substantially coplanar with the top surface of the sacrificial material 35. Stack 65 includes multiple layers, where each layer includes conductive material 50 and adjacent (e.g., vertically adjacent) dielectric material 60.

Alternatively, the second spaces 55 may include remaining empty (e.g., unfilled), forming air gaps (not shown) between vertically adjacent conductive materials 50. Although embodiments herein describe the gap as including air, other inert gases having insulating properties may be present in the gap. The air gap may be present depending on desired performance characteristics (e.g., capacitance) of the electronic device containing the stack 65. After the second material 15 is removed, the second space 55 may be sealed by conventional techniques to form an air gap. Air or other gas may provide improved insulating properties to the stack 65.

The sacrificial material 35 is removed from the pillar openings 30 as shown in fig. 11. The sacrificial material 35 is selectively removed without substantially affecting the conductive material 50, the dielectric material 60, or the air gaps. The sacrificial material 35 is removed by conventional techniques. As shown in fig. 12, cell material 70 is formed in the pillar openings 30 to form memory cells in the stacked structure 75. Stack structure 75 includes alternating dielectric material 60 and conductive material 50 and cell material 70, while stack 65 includes alternating dielectric material 60 and conductive material 50 and sacrificial material 35. The cell material 70 can, for example, include a dielectric barrier material (e.g., aluminum oxide, hafnium oxide, zirconium oxide) adjacent the conductive material 50, a charge blocking material (e.g., silicon dioxide, aluminum oxide, hafnium oxide, zirconium oxide) adjacent the dielectric barrier material, a charge storage material (e.g., silicon nitride, silicon oxynitride, conductive nanodots) adjacent the charge blocking material, a tunneling material (e.g., silicon dioxide, aluminum oxide, hafnium oxide, zirconium oxide) adjacent the charge storage material, and a channel material adjacent the tunneling material. In fig. 12, the cell material 70 is shown as a single material for simplicity, but it should be understood that multiple materials exist. Depending on the materials selected, the cell material 70 may be formed at an elevated temperature, e.g., greater than about 400 ℃.

The features in the columnar openings 30 may be High Aspect Ratio (HAR) features having an aspect ratio (i.e., width to depth) of greater than or equal to about 5:1, such as from about 5:1 to about 100:1, from about 5:1 to about 50:1, from about 10:1 to about 40:1, from about 10:1 to about 30:1, from about 10:1 to about 20:1, from about 20:1 to about 50:1, from about 20:1 to about 40:1, or from about 20:1 to about 30: 1.

Although the thermal budget is high for forming cell material 70 after the replacement process is performed, cell material 70 may alternatively be formed after forming pillar openings 30 and before the replacement process of first material 10 and second material 15 is performed (e.g., at the processing stage shown in fig. 5). Cell material 70 and first and second materials 10 and 15 may be selected to be compatible with the processing conditions of such embodiments. For example, first material 10 and second material 15 are selected to exhibit a melting point T that is higher than the formation temperature of cell material 70₁、T₂. Below the melting point T₁、T₂The cell material 70 is formed in the columnar openings 30 at a formation temperature to prevent premature phase transformation of the first material 10 and the second material 15. Cell material 70 is formed in the pillar openings 30 rather than sacrificial material 35, followed by removal and replacement processes for first material 10 and second material 15 as described above.

The slot 40 may be filled with another conductive material (not shown) to electrically connect the conductive material 50 of the stacked structure 75 to other conductive components (not shown) of the electronic device. The alternating dielectric material 60 and conductive material 50 and cell material 70 form a stacked structure 75 exhibiting desired dimensions. Stacked structure 75 may be further processed to form an electronic device containing stacked structure 75. Additional processing acts for forming an electronic device including stacked structure 75 and memory cells are conventional.

By way of example only, an electronic device including one or more stack structures 75 formed in accordance with embodiments of the present disclosure may be any 3D electronic device, such as a 3D NAND device, a flash memory device, a cross-point device, or other memory device requiring a stack structure 75.

To reduce the complexity of forming the stack structure 75 according to embodiments of the present disclosure, the materials selected as the first material 10 and the second material 15 may exhibit process conditions (e.g., formation temperature (T) of_f) And removal temperature (T)_r) A melting point that can range from about 0 ℃ to about 150 ℃, such as about room temperature (between about 20 ℃ to about 25 ℃). Thus, methods according to embodiments of the present disclosure may be performed without applying significant additional cooling or heating. Since the processing conditions depend on the materials selected to be the first material 10 and the second material 15, selecting the first material 10 and the second material 15 to exhibit melting points in the range of about 5 ℃ to about 100 ℃ enables the stacked structure 75 to be formed without significant, additional cooling or heating of the stacked structure 75. By way of example only, the first material 10 and the second material 15 may exhibit melting points between about 5 ℃ and about 25 ℃, such as between about 5 ℃ and about 20 ℃, between about 5 ℃ and about 15 ℃, between about 5 ℃ and about 10 ℃, or between about 10 ℃ and about 15 ℃. For example, if the melting points of the first material 10 and the second material 15 are about 10 ℃ and about 15 ℃, respectively, the formation temperatures T of the first material 10 and the second material 15 are_fMay be about 0 ℃, and the removal temperature T_rAbout 20 c and about 25 c, respectively. Similarly, for example, if the melting points of the first material 10 and the second material 15 are about 20 ℃ and about 25 ℃, respectively, the formation temperature T of the first material 10 and the second material 15 is_fMay be about 15 deg.C, and the removal temperature T_rAbout 30 c and about 35 c, respectively. Stacks that can be utilized without substantial cooling or heatingThe first material 10 and the second material 15 are formed and removed in the case of the stack structure 75.

If a higher melting point material is utilized, the formation temperature T of the first material 10 and the second material 15_fMay be about room temperature and may not utilize additional cooling of stacked structure 75. For example, if the melting points of the first material 10 and the second material 15 are about 80 ℃ and about 130 ℃, respectively, the formation temperatures T of the first material 10 and the second material 15 are_fMay be about room temperature, and the removal temperature T_rRespectively, about 85 c and about 135 c. First material 10 and second material 15 may be formed and removed without substantially cooling the utilized stack structure 75.

Forming the stack structure 75 according to embodiments of the present disclosure may reduce the complexity and associated cost of forming the pillar openings 30 in the precursor stack material and forming features, such as cell material, in the pillar openings 30, as compared to conventional replacement gate processes. Temperature (T) of removal due to stacking of precursor materials_r) Is selected to be readily removed above the melting point of the stacked precursor materials, stacked structures 75 having the desired dimensions can thus be readily formed by initially forming the stacked precursor materials at the desired dimensions. Since the columnar openings 30 of the stack precursor 5 are formed by a thermal etching process by applying local thermal evaporation (e.g., vaporization) of the stack precursor material, the columnar openings 30 are easily formed through the stack precursor 5 including a large number of layers. Thus, rather than forming multiple stacks with fewer layers per stack, the columnar openings 30 may be formed through a single stack with a large number of layers. Forming the pillar shaped opening 30 using a thermal etching process also reduces the complexity of the overall process, since only ions are generated, and the ions have high directionality with respect to reactive species generated in a conventional replacement gate process. Forming the columnar openings 30 through a single stack also reduces the number of processing actions performed, thereby reducing the complexity and amount of time of the overall process. Forming a single stack with a large number of layers is advantageous because alignment problems associated with aligning multiple stacks are eliminated. Thus, methods according to embodiments of the present disclosure form high aspect ratio pillar openings 30 and form high aspect ratio features in the pillar openings 30 while comparing to conventional replacementsThe gate process is cheaper, faster and has reduced alignment problems.

Although the embodiments described and illustrated herein replace both the first material 10 and the second material 15, the stack precursor 5 may include alternating first materials 10 and dielectric materials 60 or alternating second materials 15 and conductive materials 50. The first material 10 may exhibit a lower melting point than the dielectric material 60, or the second material 15 may exhibit a lower melting point than the conductive material 50. As described above, the first material 10 or the second material 15 may be removed by increasing the processing temperature above the melting point of the respective material. A respective conductive material 50 or dielectric material 60 is formed in the resulting space, forming a stacked structure 75. Embodiments containing air gaps can be similarly formed starting with alternating second material 15 and conductive material 50, except that second material 15 will not be replaced by dielectric material 60. Specifically, the second space 55 will contain air or another gas having insulating properties.

Accordingly, a method of forming an electronic device is disclosed. The method includes forming a stacked precursor including alternating first and second materials on a base material. The first material and the second material exhibit different melting points. Removing a portion of the alternating first and second materials to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. Removing the first material to form a first space between the second material, the first material formulated to be in a liquid or vapor phase at a first removal temperature. A conductive material is formed in the first space. Removing the second material to form second spaces between the conductive materials, the second material being formulated to be in a liquid or vapor phase at a second removal temperature. Forming a dielectric material in the second space. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.

Accordingly, another method of forming an electronic device is disclosed. The method includes forming alternating first and second materials on a base material. The first material and the second material are formulated to be removable at different temperatures and exhibit melting points that differ from each other by between about 5 ℃ and about 150 ℃. Exposing a portion of the alternating first and second materials to a thermal treatment to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. The first material is exposed to a temperature above the melting point of the first material and below the melting point of the second material to remove the first material and form a first space. A conductive material is formed in the first space. Exposing the second material to a temperature above a melting point of the second material to remove the second material and form a second space. Forming a dielectric material in the second space. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.

Accordingly, yet another method of forming an electronic device is disclosed. The method includes forming alternating first and second materials on a base material. The first and second materials are formed in a solid phase and are formulated to be removable at different temperatures. A portion of the alternating first and second materials is exposed to a thermal etching process to form a columnar opening through the alternating first and second materials. A sacrificial material is formed in the columnar opening. The first material is removed to form first spaces between the second material and a conductive material is formed in the first spaces. The second material is removed to form second spaces between the conductive materials, and a dielectric material is formed in the second spaces. The sacrificial material is removed from the pillar openings and cell material is formed in the pillar openings.

Non-limiting example embodiments of the present disclosure may include the following, alone or in combination:

embodiment 1. a method of forming an electronic device, comprising: forming a stacked precursor comprising alternating first and second materials on a base material, the first and second materials exhibiting different melting points; removing a portion of the alternating first and second materials to form a columnar opening through the alternating first and second materials; forming a sacrificial material in the columnar opening; removing the first material to form a first space between the second material, the first material formulated to be in a liquid or vapor phase at a first removal temperature; forming a conductive material in the first space; removing the second material to form second spaces between the conductive materials, the second material being formulated to be in a liquid or vapor phase at a second removal temperature; forming a dielectric material in the second space; removing the sacrificial material from the pillar openings; and forming a cell material in the columnar opening.

Embodiment 2. the method of embodiment 1, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the alternating first and second materials formulated to be removable at different temperatures.

Embodiment 3. the method of embodiment 1 or embodiment 2, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the first material exhibiting a melting point lower than a melting point of the second material.

Embodiment 4. the method of any of embodiments 1-3, wherein forming a stacked precursor comprising alternating first and second materials comprises forming the alternating first and second materials exhibiting a melting point difference between about 5 ℃ and about 100 ℃.

Embodiment 5. the method of any of embodiments 1-4, wherein forming a stacked precursor including alternating first and second materials includes forming the alternating first and second materials in a substantially solid phase.

Embodiment 6. the method of any of embodiments 1-5, wherein removing a portion of the alternating first and second materials to form a columnar opening comprises removing the portion of the alternating first and second materials using a thermal etching process to form the columnar opening.

Embodiment 7 the method of any of embodiments 1-6, wherein removing a portion of the alternating first and second materials to form a columnar opening comprises forming the columnar opening at a temperature below the melting point of the first and second materials.

Embodiment 8 the method of any of embodiments 1-7, wherein removing the first material to form first spaces between the second material comprises exposing the first material to a temperature above the melting point of the first material and below a melting point of the second material.

Embodiment 9 the method of any of embodiments 1-8, wherein exposing the first material to a temperature above the melting point of the first material and below the melting point of the second material comprises converting the first material to a liquid phase.

Embodiment 10 the method of any of embodiments 1-8, wherein exposing the first material to a temperature above the melting point of the first material and below the melting point of the second material comprises converting the first material to a vapor phase.

Embodiment 11 the method of any of embodiments 1-10, wherein removing the second material to form second spaces between the conductive materials comprises exposing the second material to a temperature above the melting point of the second material.

Embodiment 12. a method of forming an electronic device, comprising: forming alternating first and second materials on a base material, the first and second materials being formulated to be removable at different temperatures and exhibit melting points that differ from each other by between about 5 ℃ and about 150 ℃; exposing a portion of the alternating first and second materials to a thermal treatment to form columnar openings through the alternating first and second materials; forming a sacrificial material in the columnar opening; exposing the first material to a temperature above the melting point of the first material and below the melting point of the second material to remove the first material and form a first space; forming a conductive material in the first space; exposing the second material to a temperature above a melting point of the second material to remove the second material and form a second space; forming a dielectric material in the second space; removing the sacrificial material from the pillar openings; and forming a cell material in the columnar opening.

Embodiment 13 the method of embodiment 12, wherein forming alternating first and second materials on a substrate material comprises forming alternating first materials selected from the group consisting of acetic acid, lactic acid, and formic acid and second materials comprising water.

Embodiment 14 the method of embodiment 12, wherein forming alternating first and second materials on a substrate material comprises forming alternating first materials comprising acetic acid and second materials comprising water.

Embodiment 15 the method of embodiment 12, wherein forming alternating first and second materials on a base material comprises forming alternating first materials selected from the group consisting of carbon dioxide, nitrogen, and nitrous oxide and second materials comprising water.

Embodiment 16 the method of any of embodiments 12-15, wherein forming alternating first and second materials on a base material comprises forming alternating photoresist and thermal resist materials on the base material.

Embodiment 17 the method of any of embodiments 12-16, wherein forming alternating first and second materials on a base material comprises forming the first material exhibiting a lower melting point than the second material.

Embodiment 18 the method of any of embodiments 12-17, wherein forming alternating first and second materials on a base material comprises forming one of the first and second materials at room temperature.

Embodiment 19 the method of any of embodiments 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to a non-reactive and directional thermal etching process.

Embodiment 20 the method of any of embodiments 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to ultraviolet radiation.

Embodiment 21 the method of any of embodiments 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to a laser.

Embodiment 22 the method of any of embodiments 12-18, wherein exposing a portion of the alternating first and second materials to a thermal treatment comprises exposing the portion of the alternating first and second materials to a thermal etching treatment performed under vacuum conditions.

Embodiment 23 the method of any of embodiments 12-22, wherein forming a dielectric material in the second space comprises forming an oxide material in the second space.

Embodiment 24 the method of any of embodiments 12-22, wherein forming a dielectric material in the second space includes forming an air gap in the second space.

Embodiment 25. a method of forming an electronic device, comprising: forming alternating first and second materials on a substrate material, the first and second materials being formed in a solid phase and the first and second materials being formulated to be removable at different temperatures; exposing a portion of the alternating first and second materials to a thermal etching process to form columnar openings through the alternating first and second materials; forming a sacrificial material in the columnar opening; removing the first material to form first spaces between the second material; forming a conductive material in the first space; removing the second material to form second spaces between the conductive materials; forming a dielectric material in the second space; removing the sacrificial material from the pillar openings; and forming a cell material in the columnar opening.

Embodiment 26 the method of embodiment 25, wherein forming alternating first and second materials on a substrate material comprises forming the first and second materials by spin coating, blanket coating, chemical vapor deposition, or physical vapor deposition.

While certain illustrative embodiments have been described in connection with the figures, those of ordinary skill in the art will recognize and appreciate that the embodiments encompassed by the present disclosure are not limited to those explicitly shown and described herein. In particular, various additions, deletions, and modifications may be made to the embodiments described herein without departing from the scope of the embodiments encompassed by the present disclosure (including those claimed herein, including legal equivalents). In addition, features of one disclosed embodiment may be combined with features of another disclosed embodiment while still being encompassed within the scope of the disclosure.