阅读说明：本技术 原子层沉积设备及3d存储器件 (Atomic layer deposition apparatus and 3D memory device ) 是由 李远博 宋锐 李�远 孙祥烈 于 2020-04-24 设计创作，主要内容包括：公开了一种原子层沉积设备及3D存储器件,原子层沉积设备包括：进气管路,用于接收至少两种反应气体以及惰性气体；反应腔室,与所述进气管路连接；基座,位于所述反应腔室内,用于承载硅片以及对所述硅片进行加热；排气通道,与所述反应腔室连接,其中,所述原子层沉积设备还包括可调节控制板,位于所述反应腔室内,用于阻挡所述反应气体到达硅片表面。本申请的原子层沉积设备,通过可调节控制板控制参与硅片表面反应的反应气体,使得粘附膜可以分层生长,得到晶向一致、晶界表面积减少的粘附膜,提高了粘附膜的阻挡能力。(Disclosed are an atomic layer deposition apparatus and a 3D memory device, the atomic layer deposition apparatus including: the gas inlet pipeline is used for receiving at least two reaction gases and inert gases; the reaction chamber is connected with the air inlet pipeline; the base is positioned in the reaction chamber and used for bearing a silicon wafer and heating the silicon wafer; and the exhaust channel is connected with the reaction chamber, and the atomic layer deposition equipment further comprises an adjustable control plate which is positioned in the reaction chamber and used for blocking the reaction gas from reaching the surface of the silicon wafer. According to the atomic layer deposition equipment, the reaction gas participating in the surface reaction of the silicon wafer is controlled through the adjustable control panel, so that the adhesive film can grow in a layered mode, the adhesive film with the consistent crystal orientation and the reduced crystal boundary surface area is obtained, and the blocking capacity of the adhesive film is improved.)

1. An atomic layer deposition apparatus comprising:

the gas inlet pipeline is used for receiving at least two reaction gases and inert gases;

the reaction chamber is connected with the air inlet pipeline;

the base is positioned in the reaction chamber and used for bearing a silicon wafer and heating the silicon wafer;

an exhaust passage connected to the reaction chamber,

the atomic layer deposition equipment further comprises an adjustable control plate, wherein the adjustable control plate is positioned in the reaction chamber and used for preventing the reaction gas from reaching the surface of the silicon wafer.

2. The atomic layer deposition apparatus according to claim 1, wherein the adjustable control plate comprises a first plate, a second plate and/or a third plate, wherein the first plate is positioned above the susceptor and has a plurality of through holes, and the second plate and/or the third plate are positioned at both ends of the first plate, respectively, and are rotatable in a vertical plane with respect to the first plate.

3. The atomic layer deposition apparatus according to claim 2, wherein the second plate and/or the third plate comprises two operating states, raised and lowered.

4. The atomic layer deposition apparatus according to claim 3, wherein the reaction gas reaches the surface of the silicon wafer through the plurality of through holes of the first plate when the second plate and/or the third plate are raised, and reacts on the surface of the silicon wafer to form a thin film layer and grow the thin film layer.

5. The atomic layer deposition device according to claim 3, wherein the second plate and/or the third plate is parallel to the first plate when the second plate and/or the third plate is in a lowered state, the plurality of through holes of the first plate are blocked, the reaction gas is stopped from participating in the surface reaction of the silicon wafer, and the thin film layer performs grain nucleation.

6. The atomic layer deposition apparatus according to claim 3, wherein the second plate and/or the third plate performs switching between the two operating states of raising and lowering according to a flow rate of the reaction gas.

7. The atomic layer deposition apparatus according to claim 4 or 5, wherein the thin film layer comprises an adhesive film.

8. A 3D memory device comprising:

a substrate;

the stacked structure comprises an interlayer insulating layer and a plurality of grid conductors which are separated from each other by the interlayer insulating layer, and the grid conductors are respectively divided into a plurality of grid lines by grid line gaps;

a plurality of channel pillars penetrating the stacked structure; and

a conductive channel and an insulating layer in the gate line gap, the conductive channel being spaced apart from the plurality of gate lines by the insulating layer,

wherein the 3D memory device further includes a titanium nitride film grown in layers as an adhesion film, the adhesion film being located between the gate conductor and the interlayer insulating layer and being in contact with the gate conductor.

9. The 3D memory device of claim 8, wherein the layered-grown titanium nitride film is formed using an atomic layer deposition process.

Technical Field

The invention relates to the technical field of semiconductor manufacturing, in particular to atomic layer deposition equipment and a 3D (three-dimensional) storage device.

Background

The increase in memory density of memory devices is closely related to the progress of semiconductor manufacturing processes. As the feature size of semiconductor manufacturing processes becomes smaller, the storage density of memory devices becomes higher. In order to further increase the memory density, a memory device of a three-dimensional structure (i.e., a 3D memory device) has been developed. The 3D memory device includes a plurality of memory cells stacked in a vertical direction, can increase integration in multiples on a unit area of a wafer, and can reduce cost.

In a manufacturing process of the 3D memory device, a cavity is formed in the interlayer insulating layer, for example, using an etching method, and then the cavity is filled with a metal material (e.g., W) to form gate conductors of a plurality of levels, thereby forming a gate stack structure. As the integration of the 3D memory device increases, the thickness of the cavity for forming the gate conductor is also getting smaller. Before the metal material is filled, an adhesive film may be formed on the inner wall of the cavity to improve the filling property of the metal material in the cavity and to improve the mechanical strength. In the step of filling the metal material, the metal material is generated by, for example, reduction of metal fluoride, and the generated fluorine may diffuse into the interlayer insulating layer via the adhesion film, so that the gate conductor at a different level is interconnected, or interconnected with the channel column, and still may cause device failure.

It is desirable to further improve the barrier performance of the adhesive film of the 3D memory device to improve the yield and reliability of the 3D memory device.

Disclosure of Invention

In view of the above problems, an object of the present invention is to provide an improved atomic layer deposition apparatus and a 3D memory device, in which an adjustable control board is added to a reaction chamber of the atomic layer deposition apparatus for forming an adhesion film to control a formation process of the adhesion film, so that the adhesion film grows in a layered manner, thereby improving a barrier property in the adhesion film, preventing diffusion of fluorine, and improving yield and reliability of the device.

According to an aspect of the present invention, there is provided an atomic layer deposition apparatus including: the gas inlet pipeline is used for receiving at least two reaction gases and inert gases; the reaction chamber is connected with the air inlet pipeline; the base is positioned in the reaction chamber and used for bearing a silicon wafer and heating the silicon wafer; and the exhaust channel is connected with the reaction chamber, and the atomic layer deposition equipment further comprises an adjustable control plate which is positioned in the reaction chamber and used for blocking the reaction gas from reaching the surface of the silicon wafer.

Preferably, the adjustable control board comprises a first board, a second board and/or a third board, wherein the first board is located above the base and has a plurality of through holes, and the second board and/or the third board are respectively located at two ends of the first board and can rotate on a vertical plane relative to the first board.

Preferably, the second plate and/or the third plate comprise two working states of lifting and lowering.

Preferably, when the second plate and/or the third plate are in a raised state, the reaction gas reaches the surface of the silicon wafer through the plurality of through holes of the first plate, and reacts on the surface of the silicon wafer to form a thin film layer and grow the thin film layer.

Preferably, when the second plate and/or the third plate are in a laid-down state, the second plate and/or the third plate are parallel to the first plate, the plurality of through holes of the first plate are blocked, the reaction gas is stopped from participating in the surface reaction of the silicon wafer, and the thin film layer performs grain nucleation.

Preferably, the second plate and/or the third plate perform switching between the two working states of lifting and lowering according to the flow rate of the reaction gas.

Preferably, the film layer comprises an adhesive film.

According to another aspect of the present invention, there is provided a 3D memory device including: a substrate; the stacked structure comprises an interlayer insulating layer and a plurality of grid conductors which are separated from each other by the interlayer insulating layer, and the grid conductors are respectively divided into a plurality of grid lines by grid line gaps; a plurality of channel pillars penetrating the stacked structure; and a conductive channel and an insulating layer in the gate line gap, the conductive channel being spaced apart from the plurality of gate lines by the insulating layer, wherein the 3D memory device further includes a titanium nitride film grown in layers as an adhesive film, the adhesive film being located between the gate conductor and the interlayer insulating layer and contacting the gate conductor.

Preferably, the layered titanium nitride film is formed by an atomic layer deposition process.

According to the atomic layer deposition equipment provided by the invention, the adjustable control plate is additionally arranged in the reaction chamber of the deposition equipment, so that reactants can be stopped or restarted to continuously participate in the surface reaction of the silicon wafer while the gas atmosphere is kept in the process of depositing the titanium nitride film, and the titanium nitride film grows in a layered mode. The titanium nitride film grown in a layered mode has high blocking rate to fluorine atoms, so that the content of fluorine in the titanium nitride film is low, the problems of conductive channels, such as current leakage of word lines and high resistivity of the titanium nitride film, caused by the fact that the fluorine atoms attack an oxide layer are solved, and the yield and the reliability of the device are further improved.

According to the atomic layer deposition equipment provided by the invention, the adjustable control plate is used for controlling the participation of reactants, and in the process of stopping the participation of the reactants, the residual energy in the reaction chamber is fully used for nucleation of small grains rather than growth, so that the crystal orientation of the formed titanium nitride film is consistent, and the effective surface area of a crystal boundary is reduced.

According to the 3D memory device provided by the embodiment of the invention, the titanium nitride film grown in a layered manner is formed on the exposed surface of the gate line gap as the adhesive film, and compared with the titanium nitride film formed in one step by adopting an atomic layer deposition method in the prior art, the barrier property of the titanium nitride film grown in a layered manner on fluorine diffusion is obviously improved.

According to the 3D memory device of the embodiment of the present invention, the adhesive film is positioned between the conductive path and the isolation layer for improving the adhesion of the conductive path. Further, the diffusion of fluorine occurring through the adhesion film easily causes electrical leakage of the Word Line (WL), which is one of important causes of failure of the 3D memory device. The invention utilizes the barrier property of the titanium nitride film which grows in a layered mode to the diffusion of fluorine and also serves as a barrier layer to prevent the problem caused by the diffusion of the fluorine, thereby improving the yield and the reliability of the 3D memory device. In addition, the titanium nitride film formed by the atomic layer deposition method and grown in a layered mode can obtain good coverage, and therefore complete coverage can be achieved on the surface of the cavity in the interlayer insulating layer. Further improving the barrier properties against fluorine diffusion.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

FIG. 1 shows a schematic diagram of an adhesive film in a 3D memory device of the prior art;

FIG. 2 shows a schematic structural diagram of a prior art atomic layer deposition apparatus for adhering a film;

FIG. 3 is a graph showing fluorine content in a one-step grown and step-grown adhesion film;

FIG. 4 shows a schematic structural diagram of an atomic layer deposition apparatus for adhering a film according to an embodiment of the invention;

fig. 5a to 5D show cross-sectional views of a method of manufacturing a 3D memory device according to an embodiment of the present invention at different stages.

Detailed Description

Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.

The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.

It will be understood that when a layer or region is referred to as being "on" or "over" another layer or region in describing the structure of the device, it can be directly on the other layer or region or intervening layers or regions may also be present. And, if the device is turned over, that layer, region, or regions would be "under" or "beneath" another layer, region, or regions.

If for the purpose of describing the situation directly above another layer, another area, the expression "directly above … …" or "above and adjacent to … …" will be used herein.

In the present application, the term "semiconductor structure" refers to the general term for the entire semiconductor structure formed in the various steps of manufacturing a memory device, including all layers or regions that have been formed. In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.

The present invention may be embodied in various forms, some examples of which are described below.

Fig. 1 shows a schematic diagram of an adhesive film in a 3D memory device of the related art. Fig. 2 shows a schematic structural view of a related art atomic layer deposition apparatus for adhering a film.

Referring to fig. 1, in a 3D memory device, a gate stack structure 120 and memory cell strings, each including a respective channel pillar 110, and a common gate conductor, are formed on a substrate 101. The gate conductors are in accordance with the stacking order of the transistors in the memory cell string, and adjacent gate conductors are spaced apart from each other by an interlayer insulating layer, thereby forming a gate stack structure 120.

In the 3D memory device, a gate line slit penetrating the gate stack structure is further included, a conductive via 170 is formed in the gate line slit, an oxide layer 140 and an adhesive film 150 are further formed between a sidewall of the conductive via 170 and the gate stack structure 120, wherein the oxide layer 140 is used to separate the gate conductor from the conductive via 170, and a contact layer 160 is formed at a portion of the adhesive film 150 contacting the substrate 101, thereby reducing contact resistance between the substrate 101 and the adhesive film 150.

The adhesive film 150 shown in fig. 1 is formed by the atomic layer deposition apparatus shown in fig. 2.

Referring to fig. 2, the atomic layer deposition apparatus 100 may be used to form a thin film layer, such as an adhesive film. In the atomic layer deposition apparatus 100, the reaction gas reaches the gas inlet chamber 25 through the reaction gas pipes 51 to 54, and further reaches the reaction chamber 21 to react, an adhesion layer is formed at a corresponding position of the wafer 35, and the reacted gas reaches the exhaust device 41 through the exhaust passage 22.

The adhesion film 150 formed by deposition using the atomic layer deposition apparatus 100 is formed in one step, and has a low blocking rate for fluorine atoms, so that the fluorine atoms are likely to damage the oxide layer 140, and electrical leakage between the conductive channel 170 and the gate conductor is caused, thereby reducing the yield and reliability of the 3D memory device.

FIG. 3 is a graph showing fluorine content in the adhesive film in one-step growth and step-growth.

In fig. 3, it can be seen that fluorine atoms have different contents in different materials, and different forming methods also result in different contents of fluorine atoms in the same material. Further, in the TiN material, fluorine content in TiN formed in one step is higher than that in TiN formed in steps.

The inventors of the present application have noticed that the fluorine content in the TiN film formed in steps is lower than that in the TiN formed in one step, and thus have proposed an improved atomic layer deposition apparatus for an adhesion film and a method for manufacturing a 3D memory device.

Fig. 4 shows a schematic structural diagram of an atomic layer deposition apparatus for adhering a film according to an embodiment of the present invention.

Referring to fig. 4, in the atomic layer deposition apparatus 200 for forming an adhesion film, the reaction chamber 21 and the exhaust passage 22 communicate with each other, and an upper open end of the reaction chamber 21 is sealed by the cover plate 23 to form an inner space. The side wall of the reaction chamber 21 is opened to form an access passage for a wafer, and the access passage is opened or closed by a shutter 24. A flange 24 is provided above the cover plate 23 to fix the gas inlet chamber 25 to the flange 24 and to introduce the reaction gas into the inner space of the reaction chamber 21.

The exhaust passage 22 is located at the other side wall of the reaction chamber 21, one end of which communicates with the reaction chamber 21 and the other end of which is connected to the exhaust device 41. The exhaust device 41 is used to evacuate the internal space of the reaction chamber 21, and is, for example, a vacuum pump. Preferably, a recovery device 42 is further connected to the side wall of the exhaust channel 22 for recovering at least one reaction gas, such as ammonia. The recovery unit 42 is connected to, for example, the upstream end of the exhaust unit 41, and recovers at least one of the reaction gases, thereby not only reducing environmental pollution but also protecting the exhaust unit 41 from the etching gas.

A susceptor 33 is disposed in the inner space of the reaction chamber 21. The support 31 has one end fixed to the bottom end of the reaction chamber 21 and the other end connected to the lower surface of the susceptor 33, thereby fixing the susceptor 33. A guide ring 34 is provided at the periphery of the upper surface of the susceptor 33 for guiding the wafer 35 to be placed above the upper surface of the susceptor 33. The supporting device 32 of the wafer 35 includes a plurality of supporting rods penetrating the susceptor 33 and contacting the lower surface of the wafer 35. The supporting device 32 is driven by a driving device (not shown) to move up and down, thereby moving or deflecting the wafer 35, and adjusting the height position and the horizontal state of the wafer 35 in the inner space of the reaction chamber 21. A heater power source (not shown) is provided inside the susceptor 33 to heat the heater 36 to raise the temperature of the wafer to a predetermined temperature.

The gas supply means of the atomic layer deposition apparatus 200 comprises reaction gas lines 51 to 54 commonly connected to the gas inlet chamber 25, the reaction gas lines 51 to 54 being connected to the gas inlet chamber 25 by the fixing means 26. The reaction gas lines 51 to 54 are used to supply TiCl4, N2, NH3 and H2, respectively. A valve 61 for on-off control, a mass flow controller 62 for flow control, and a reservoir 63 for storing a reaction gas are provided in this order on each of the reaction gas lines 51 to 54.

An adjustable control plate 37 is further included in the inner space of the reaction chamber 21 for controlling the progress of the reaction. The adjustable control panel 37 includes a first plate 371, a second plate 372 and a third plate 373.

The first plate 371 is located above the base 33, and the second plate 372 and the third plate 373 are respectively located at two ends of the first plate 371, are movably connected to the first plate 371, and can rotate in a vertical plane relative to the first plate 371. The first plate 371 has a plurality of through holes, when the second plate 372 and/or the third plate 373 is lifted, the reaction gas reaches the surface of the silicon wafer through the plurality of through holes of the first plate 371, a reaction is performed on the surface of the silicon wafer to form an adhesive film and grow, when the second plate 372 and/or the third plate 373 is lowered, the second plate 372 and/or the third plate 373 is parallel to the first plate 371 for example, the plurality of through holes of the first plate 371 are blocked by the second plate 372 and/or the third plate 373, the reaction gas is stopped from participating in the reaction on the surface of the silicon wafer, and the adhesive film performs grain nucleation.

Specifically, after the reaction gas reacts on the surface of the silicon wafer in the reaction chamber 21 for a certain time, the second plate 372 and/or the third plate 373 in the adjustable control plate 37 are controlled to be put down, the reaction gas is blocked by the adjustable control plate 37 and cannot participate in the reaction on the surface of the silicon wafer, but because the reaction gas and the inert gas in the reaction chamber 21 continuously enter and the reaction chamber 21 is not divided into two spaces by the adjustable control plate 37, the pressure in the reaction chamber 21 cannot be changed, and only the reaction gas participating in the reaction on the surface of the silicon wafer disappears or the amount of the reaction gas is reduced. At this time, the adhesion film formed on the surface of the silicon wafer fully performs small grain nucleation rather than growth by using the residual energy, so the crystal orientation of the formed adhesion film is biased to be uniform, and the effective surface area of the grain boundary is reduced.

In this embodiment, when the second plate 372 and/or the third plate 373 of the controllable adjustment plate 37 are lifted, the other end of the second plate 372 and/or the third plate 373 reaches the sidewall of the reaction chamber 21, the inlets of the reaction gas and the inert gas are not blocked, and the reaction gas reaches the surface of the silicon wafer through the plurality of through holes of the first plate 371, which does not affect the reaction process. When the second plate 372 and/or the third plate 373 of the controllable adjustment plate 37 are lowered, since there are no through holes in the second plate 372 and/or the third plate 373, and the plurality of through holes of the first plate 371 are blocked by the second plate 372 and/or the third plate 373, the reaction gas cannot directly reach the surface of the silicon wafer.

In this embodiment, the shape of the first plate 371, the second plate 372 and the third plate 373 of the controllable adjustment plate 37 may be circular, square, or any other shape that can prevent part of the reaction gas from reaching the surface of the silicon wafer. In the ald apparatus 200, the timing of switching between the raised state and the lowered state of the adjustable plate 37 is controlled according to the flow rate of the reaction gas, and in other embodiments, the timing may be switched according to the reaction time. In the switching process, manual switching or automatic switching and other modes can be selected.

In other embodiments, the diameter of the through holes of the first plate 371 of the controllable adjustment plate 37 can be changed, in which case the controllable adjustment plate 37 includes two states, a large through hole corresponding to the raised state and a small through hole corresponding to the lowered state. The amount of the reaction gas reaching the surface of the silicon wafer is controlled by controlling the diameter of the through hole of the controllable regulating plate 37.

In the process of forming the adhesive film by adopting the atomic layer deposition equipment 200, the adhesive film can grow in a layered manner due to the existence of the controllable adjusting plate 37, and the finally formed adhesive film has the advantages of strong fluorine resistance, consistent crystal orientation, small crystal boundary surface area and the like.

In other embodiments, the atomic layer deposition apparatus 200 may also be used to form other thin film layers that may or may not require layered growth, and the present invention is only illustrative of embodiments in which the adhesion film is formed by the atomic layer deposition apparatus 200.

Fig. 5a to 5D show cross-sectional views of a method of manufacturing a 3D memory device according to an embodiment of the present invention at different stages.

The method begins with a semiconductor structure having formed a gate stack structure 120 and a channel pillar 110 on a substrate 101, as shown in figure 5 a.

The gate stack structure 120 includes an interlayer insulating layer 124 and gate conductor layers 121, 122, 123 alternately stacked on the substrate 101. In this embodiment, the substrate 101 is, for example, a single crystal silicon substrate, the interlayer insulating layer 124 is, for example, made of silicon oxide, and the gate conductor layers 121, 122, and 123 are, for example, made of metal tungsten. For clarity, the internal structure of the channel pillar 110 is not shown in fig. 5 a.

In this step, a photoresist mask is formed, for example, on the surface of the semiconductor structure, and then an anisotropic etch is performed to form deposition channel 102 through gate stack structure 120. The anisotropic etching may be dry etching such as ion milling etching, plasma etching, reactive ion etching, laser ablation. For example, by controlling the etching time so that the etching stops near the surface of the substrate 101. The photoresist mask is removed by dissolving or ashing in a solvent after etching.

In this embodiment, the deposition channel 102 is used not only to divide the gate conductor into a plurality of gate lines, but also to form a conductive channel for source connection. To this end, deposition channel 102 extends through gate stack structure 120 to substrate 101.

Further, an oxide layer 140 is formed on the sidewalls of the deposition channel 102, as shown in fig. 5 b. The oxide layer 140 is made of, for example, silicon oxide, and is used to separate the gate conductor layer from the conductive channel formed in the subsequent step.

Further, an adhesive film 150 is formed on the inner surface of the deposition passage 102, as shown in fig. 5 c.

In this embodiment, the adhesion film 150 is, for example, a TiN film formed in steps using the atomic layer deposition apparatus shown in fig. 4. Preferably, a portion of the substrate 101 in contact with the TiN film forms the contact layer 160, thereby reducing the contact resistance of the substrate 101 with the TiN film.

Further, the deposition channel 102 is filled with a conductive material to form a conductive channel 170, as shown in fig. 5 d.

In this embodiment, the conductive material is composed of, for example, tungsten, and the conductive via 170 is formed as a metal conductive structure. The adhesive film 150 is positioned between the oxide layer 140 and the conductive via 170 such that the conductive via 170 is secured within the deposition via.

According to the atomic layer deposition equipment provided by the invention, the adjustable control plate is additionally arranged in the reaction chamber of the deposition equipment, so that reactants can be stopped or restarted to continuously participate in the surface reaction of the silicon wafer while the gas atmosphere is kept in the process of depositing the titanium nitride film, and the titanium nitride film grows in a layered mode. The titanium nitride film grown in a layered mode has high blocking rate to fluorine atoms, so that the content of fluorine in the titanium nitride film is low, the problems of conductive channels, such as current leakage of word lines and high resistivity of the titanium nitride film, caused by the fact that the fluorine atoms attack an oxide layer are solved, and the yield and the reliability of the device are further improved.

According to the atomic layer deposition equipment provided by the invention, the adjustable control plate is used for controlling the participation of reactants, and in the process of stopping the participation of the reactants, the residual energy in the reaction chamber is fully used for nucleation of small grains rather than growth, so that the crystal orientation of the formed titanium nitride film is consistent, and the effective surface area of a crystal boundary is reduced.

According to the 3D memory device provided by the embodiment of the invention, the titanium nitride film grown in a layered manner is formed on the exposed surface of the gate line gap as the adhesive film, and compared with the titanium nitride film formed in one step by adopting an atomic layer deposition method in the prior art, the barrier property of the titanium nitride film grown in a layered manner on fluorine diffusion is obviously improved.

According to the 3D memory device of the embodiment of the present invention, the adhesive film is positioned between the conductive path and the isolation layer for improving the adhesion of the conductive path. Further, the diffusion of fluorine occurring through the adhesion film easily causes electrical leakage of the Word Line (WL), which is one of important causes of failure of the 3D memory device. The invention utilizes the barrier property of the titanium nitride film which grows in a layered mode to the diffusion of fluorine and also serves as a barrier layer to prevent the problem caused by the diffusion of the fluorine, thereby improving the yield and the reliability of the 3D memory device. In addition, the titanium nitride film formed by the atomic layer deposition method and grown in a layered mode can obtain good coverage, and therefore complete coverage can be achieved on the surface of the cavity in the interlayer insulating layer. Further improving the barrier properties against fluorine diffusion.

In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.

The embodiments of the present invention have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the invention, and these alternatives and modifications are intended to fall within the scope of the invention.