阅读说明：本技术 一种声表面滤波器封装方法及封装结构 (Surface acoustic wave filter packaging method and packaging structure ) 是由 袁婷 魏彬 于 2021-11-30 设计创作，主要内容包括：本发明提出了一种声表面滤波器封装方法及封装结构。所述声表面滤波器封装结构包括第一玻璃盖板、第二玻璃盖板、IDT功能区域封装部件、晶圆主体和晶圆主体载体；所述晶圆主体上表面布设绝缘层,在所述绝缘层上正对IDT功能区域位置设置开口,使IDT功能区域外露；所述IDT功能区域上设置所述IDT功能区域,封装部件；在所述晶圆主体四周扣设上第一玻璃盖板；所述第一玻璃盖板上设有与所述晶圆主体位置对应的主体安装位；在所述第一玻璃盖板上布设黏胶层,并在所述IDT功能区域封装部件上方扣设第二玻璃盖板,并通过黏胶层使第一玻璃盖板和第二玻璃盖板粘合；所述第二玻璃盖板上设有与所述IDT功能区域位置对应的凹槽。(The invention provides a packaging method and a packaging structure of a surface acoustic wave filter. The surface acoustic filter packaging structure comprises a first glass cover plate, a second glass cover plate, an IDT functional area packaging component, a wafer main body and a wafer main body carrier; an insulating layer is arranged on the upper surface of the wafer main body, and an opening is arranged on the insulating layer, which is opposite to the IDT functional area, so that the IDT functional area is exposed; the IDT functional area is arranged on the IDT functional area, and the part is packaged; buckling a first glass cover plate on the periphery of the wafer main body; a main body installation position corresponding to the wafer main body position is arranged on the first glass cover plate; laying an adhesive layer on the first glass cover plate, buckling a second glass cover plate above the IDT functional area packaging part, and bonding the first glass cover plate and the second glass cover plate through the adhesive layer; and the second glass cover plate is provided with a groove corresponding to the IDT functional area.)

1. A surface acoustic filter packaging method, comprising:

step 1, respectively arranging a wafer main body and an accessory part taking the wafer main body as a core on a first substrate and a second substrate;

step 2, laying an isolation insulating layer above the wafer main body, and marking the position of an IDT functional area above the isolation insulating layer;

step 3, opening an isolation insulating layer corresponding to the IDT functional area to expose the IDT functional area;

step 4, arranging glass supporting square columns on two sides of the IDT functional area; an isolation gap is reserved between the glass support square column and the IDT functional area; the size range of the isolation gap is 0.25mm-0.45 mm;

step 5, forming an organic isolation film layer on the IDT functional area in a film covering mode, wherein two sides of the organic isolation film layer are lapped on the glass support square columns;

step 6, covering a layer of glass wave plate on the organic isolation film layer, wherein two ends of the glass wave plate are lapped on the glass supporting square column;

step 7, arranging a first glass cover plate on the periphery of the wafer main body, wherein the thickness of the first glass cover plate is consistent with that of the wafer main body, and arranging an adhesive layer on the first glass cover plate;

and 8, buckling a second glass cover plate above the adhesive layer, wherein a groove corresponding to the IDT functional area is formed in the second glass cover plate.

2. The SAW filter packaging method of claim 1, wherein step 1 of disposing the wafer body and the attached component with the wafer body as the core on the first substrate and the second substrate respectively comprises:

step 101, marking a position where a wafer main body needs to be placed on the front surface of a first base body, and arranging a wafer mounting groove at the marked position; arranging a wire layer distribution groove for distributing a first layer of wire layer body and wires for connecting the first layer of wire layer body and a second layer of wire layer body in the first base body;

102, paving an L-shaped insulating layer at the bottom of the wafer mounting groove, wherein the vertical wall of the L-shaped insulating layer is attached to the side wall of the groove body of the wafer mounting groove, and the thickness of a cross arm of the L-shaped insulating layer is kept consistent;

103, arranging a piezoelectric layer on the upper surface of the cross arm of the L-shaped insulating layer; the upper surface of the piezoelectric layer and the upper surface of the vertical wall of the L-shaped insulating layer are on the same horizontal plane;

104, performing slotting treatment on the first substrate and the second substrate to obtain a groove body for distributing metal lead layers, and distributing metal lead layers of each layer level in the groove body for distributing the metal lead layers;

105, after the metal wire layers of each layer are laid, forming an electric connection component mounting groove in the back of the second base body, and arranging an electric connection component in the electric connection component mounting groove;

106, correspondingly forming a first bevel angle and a second bevel angle along the back edge of the first base body and the front edge of the second base body respectively;

and 107, bonding and mounting the first substrate and the second substrate to finish the manufacture of the wafer packaging structure after bonding and mounting.

3. The SAW filter packaging method of claim 2, wherein the step 104 of performing grooving process on the first substrate and the second substrate to obtain a groove for laying metal wire layers, and performing the laying of metal wire layers of each level in the groove for laying metal wire layers comprises:

1041, arranging a first layer of lead layer body in the lead layer distribution groove, and arranging a wafer main body on the first layer of lead layer body;

1042, marking the back of the first base with a bump installation position, removing the base part on the back of the first base and reserving a bump of the first base at the bump installation position while removing the base part on the back of the first base; grooving the surface of the first substrate after the back of the first substrate is removed to obtain a wire arrangement groove for arranging a second layer of wire layer body;

step 1043, bonding a cover plate on the front surface of the first substrate;

step 1044, completing the layout of all the metal wires left in the first substrate in the wire layer distribution groove of the first substrate;

step 1045, after the layout of all the metal wires in the first substrate is completed, marking all the positions where the wires are required to be connected and the protruding positions between the second layer of wire layer body and the third layer of wire layer body, and scanning the back surface of the first substrate after the positions are marked to obtain a position diagram;

step 1046, imprinting the position pattern on the front surface of the second substrate to form a position imprinted pattern on the front surface of the second substrate;

and 1047, arranging a protrusion and a groove and a wire arrangement groove for arranging a third layer of wire layer body and a wire branch on the front surface of the second base body according to the position imprinting drawing, and arranging the third layer of wire layer body and the wire branch in the wire arrangement groove.

4. The surface acoustic filter packaging structure is characterized by comprising a first glass cover plate, a second glass cover plate, an IDT functional area packaging component, a wafer body and a wafer body carrier; an insulating layer is arranged on the upper surface of the wafer main body, and an opening is arranged on the insulating layer, which is opposite to the IDT functional area, so that the IDT functional area is exposed; the IDT functional area is arranged on the IDT functional area, and the part is packaged; buckling a first glass cover plate on the periphery of the wafer main body; a main body installation position corresponding to the wafer main body position is arranged on the first glass cover plate; laying an adhesive layer on the first glass cover plate, buckling a second glass cover plate above the IDT functional area packaging part, and bonding the first glass cover plate and the second glass cover plate through the adhesive layer; and the second glass cover plate is provided with a groove corresponding to the IDT functional area.

5. The SAW filter package structure of claim 4, wherein said IDT functional area package portion comprises two glass support square pillars respectively bonded over the insulating layers on both sides of the IDT functional area; an isolation gap is arranged between the two glass supporting square columns and the IDT functional area; a step carrying structure is arranged on the two glass supporting square columns; an organic isolation film layer is laminated above the IDT functional area; the organic isolation film layer is attached to the IDT functional area, and two ends of the organic isolation film layer are lapped on the stepped carrying structure of the glass support square column; the upper surface of the organic isolation film layer and the upper surface of the glass support square column are in the same horizontal plane.

6. The SAW filter package structure of claim 5, wherein the isolation gap has a size in the range of 0.25mm-0.45 mm.

7. The SAW filter package structure of claim 4, wherein the thickness of the glass support square columns satisfies the following relationship:

0.47D₁≤D≤0.6D₁

wherein D represents the thickness of the glass support square column, D₁Indicating the second glass cover plate thickness.

8. The SAW filter package structure of claim 4, wherein the wafer bulk carrier comprises a first substrate; the front surface of the first base body is provided with a piezoelectric layer; a second substrate is arranged on the back surface of the first substrate; a wafer main body is arranged above the piezoelectric layer; a cover plate is buckled on the wafer main body; the cover plate is bonded with the first base body; an insulating layer is arranged below the piezoelectric layer; the end of the piezoelectric layer is connected with a metal wire layer; the metal wire layer is arranged in the first substrate and the second substrate; a plurality of electric connecting parts are embedded in the back surface of the second base body, and one side of each electric connecting part embedded in the second base body is electrically connected with the metal wire layer; and a side passive film is attached to the outer surface of the electric connection component.

9. The SAW filter package structure of claim 8, wherein said metal conductor layers comprise a first conductor layer, a second conductor layer and a third conductor layer; the first layer of conducting wire layer body is electrically connected with the second layer of conducting wire layer body through a metal conducting wire; the second layer of conducting wire layer body is electrically connected with the third layer of conducting wire layer body through a metal conducting wire, and the first layer of conducting wire layer body and the second layer of conducting wire layer body are arranged in the first substrate; the third layer of conducting wire layer body is arranged in the second substrate.

10. The SAW filter package structure of claim 8, wherein the back side edge of the first substrate is provided with a first bevel; a second bevel angle is arranged at the edge of the front surface of the second substrate; the angle range of the first bevel angle is 47-58 degrees; the angle of the first bevel is in the range of 59-74 degrees, and the depths of the first bevel and the second bevel are the same.

Technical Field

The invention provides a packaging method and a packaging structure of a surface acoustic wave filter, and belongs to the technical field of packaging.

Background

At present, the main packaging techniques of the surface acoustic wave filter include substrate packaging such as metal packaging, plastic packaging, surface mount, flip chip bonding, and the like, or surface film-coated packaging using devices. The existing filter packaging structure has the following defects: the device surface film coating type packaging is sensitive to the size of the cavity, and the film coating is easy to collapse under the large cavity size, so that the functional area of the chip is affected.

Disclosure of Invention

The invention provides a packaging method and a packaging structure of a surface acoustic wave filter, which are used for solving the problem that the coating collapse of the packaging structure of the traditional surface acoustic wave filter affects the functional area of a chip:

a surface acoustic filter packaging method, comprising:

step 1, respectively arranging a wafer main body and an accessory part taking the wafer main body as a core on a first substrate and a second substrate;

step 2, laying an isolation insulating layer above the wafer main body, and marking the position of an IDT functional area above the isolation insulating layer;

step 3, opening an isolation insulating layer corresponding to the IDT functional area to expose the IDT functional area;

step 4, arranging glass supporting square columns on two sides of the IDT functional area; an isolation gap is reserved between the glass support square column and the IDT functional area; the size range of the isolation gap is 0.25mm-0.45 mm;

step 5, forming an organic isolation film layer on the IDT functional area in a film covering mode, wherein two sides of the organic isolation film layer are lapped on the glass support square columns;

step 6, covering a layer of glass wave plate on the organic isolation film layer, wherein two ends of the glass wave plate are lapped on the glass supporting square column;

step 7, arranging a first glass cover plate on the periphery of the wafer main body, wherein the thickness of the first glass cover plate is consistent with that of the wafer main body, and arranging an adhesive layer on the first glass cover plate;

and 8, buckling a second glass cover plate above the adhesive layer, wherein a groove corresponding to the IDT functional area is formed in the second glass cover plate.

Further, the step 1 of respectively arranging the wafer main body and the accessory component taking the wafer main body as a core on the first substrate and the second substrate comprises:

step 101, marking a position where a wafer main body needs to be placed on the front surface of a first base body, and arranging a wafer mounting groove at the marked position; arranging a wire layer distribution groove for distributing a first layer of wire layer body and wires for connecting the first layer of wire layer body and a second layer of wire layer body in the first base body;

102, paving an L-shaped insulating layer at the bottom of the wafer mounting groove, wherein the vertical wall of the L-shaped insulating layer is attached to the side wall of the groove body of the wafer mounting groove, and the thickness of a cross arm of the L-shaped insulating layer is kept consistent;

103, arranging a piezoelectric layer on the upper surface of the cross arm of the L-shaped insulating layer; the upper surface of the piezoelectric layer and the upper surface of the vertical wall of the L-shaped insulating layer are on the same horizontal plane;

104, performing slotting treatment on the first substrate and the second substrate to obtain a groove body for distributing metal lead layers, and distributing metal lead layers of each layer level in the groove body for distributing the metal lead layers;

105, after the metal wire layers of each layer are laid, forming an electric connection component mounting groove in the back of the second base body, and arranging an electric connection component in the electric connection component mounting groove;

106, correspondingly forming a first bevel angle and a second bevel angle along the back edge of the first base body and the front edge of the second base body respectively;

and 107, bonding and mounting the first substrate and the second substrate to finish the manufacture of the wafer packaging structure after bonding and mounting.

Further, the step 104 of performing a slotting process on the first substrate and the second substrate to obtain a groove body for laying the metal wire layer, and performing the laying of each layer of metal wire layer in the groove body for laying the metal wire layer includes:

1041, arranging a first layer of lead layer body in the lead layer distribution groove, and arranging a wafer main body on the first layer of lead layer body;

1042, marking the back of the first base with a bump installation position, removing the base part on the back of the first base and reserving a bump of the first base at the bump installation position while removing the base part on the back of the first base; grooving the surface of the first substrate after the back of the first substrate is removed to obtain a wire arrangement groove for arranging a second layer of wire layer body;

step 1043, bonding a cover plate on the front surface of the first substrate;

step 1044, completing the layout of all the metal wires left in the first substrate in the wire layer distribution groove of the first substrate;

step 1045, after the layout of all the metal wires in the first substrate is completed, marking all the positions where the wires are required to be connected and the protruding positions between the second layer of wire layer body and the third layer of wire layer body, and scanning the back surface of the first substrate after the positions are marked to obtain a position diagram;

step 1046, imprinting the position pattern on the front surface of the second substrate to form a position imprinted pattern on the front surface of the second substrate;

and 1047, arranging a protrusion and a groove and a wire arrangement groove for arranging a third layer of wire layer body and a wire branch on the front surface of the second base body according to the position imprinting drawing, and arranging the third layer of wire layer body and the wire branch in the wire arrangement groove.

A surface acoustic filter package structure includes a first glass cover plate, a second glass cover plate, an IDT functional area package part, a wafer body, and a wafer body carrier; an insulating layer is arranged on the upper surface of the wafer main body, and an opening is arranged on the insulating layer, which is opposite to the IDT functional area, so that the IDT functional area is exposed; the IDT functional area is arranged on the IDT functional area, and the part is packaged; buckling a first glass cover plate on the periphery of the wafer main body; a main body installation position corresponding to the wafer main body position is arranged on the first glass cover plate; laying an adhesive layer on the first glass cover plate, buckling a second glass cover plate above the IDT functional area packaging part, and bonding the first glass cover plate and the second glass cover plate through the adhesive layer; and the second glass cover plate is provided with a groove corresponding to the IDT functional area.

Further, the IDT functional area encapsulating part includes two glass support square columns respectively bonded above the insulating layers on both sides of the IDT functional area; an isolation gap is arranged between the two glass supporting square columns and the IDT functional area; a step carrying structure is arranged on the two glass supporting square columns; an organic isolation film layer is laminated above the IDT functional area; the organic isolation film layer is attached to the IDT functional area, and two ends of the organic isolation film layer are lapped on the stepped carrying structure of the glass support square column; the upper surface of the organic isolation film layer and the upper surface of the glass support square column are in the same horizontal plane.

Further, the size range of the isolation gap is 0.25mm-0.45 mm.

Further, the thickness of the glass support square column satisfies the following relationship:

0.47D₁≤D≤0.6D₁

where D represents the thickness of the glass support square and D1 represents the thickness of the second glass cover plate.

Further, the wafer body carrier includes a first substrate; the front surface of the first base body is provided with a piezoelectric layer; a second substrate is arranged on the back surface of the first substrate; a wafer main body is arranged above the piezoelectric layer; a cover plate is buckled on the wafer main body; the cover plate is bonded with the first base body; an insulating layer is arranged below the piezoelectric layer; the end of the piezoelectric layer is connected with a metal wire layer; the metal wire layer is arranged in the first substrate and the second substrate; the back of the second base body is embedded with a plurality of electric connection parts, one side of the electric connection parts embedded in the second base body is electrically connected with the metal wire layer, and a passivation film on one side is attached to the outer surface of each electric connection part.

Furthermore, the metal wire layer comprises a first layer of wire layer body, a second layer of wire layer body and a third layer of wire layer body; the first layer of conducting wire layer body is electrically connected with the second layer of conducting wire layer body through a metal conducting wire; the second layer of conducting wire layer body is electrically connected with the third layer of conducting wire layer body through a metal conducting wire, and the first layer of conducting wire layer body and the second layer of conducting wire layer body are arranged in the first substrate; the third layer of conducting wire layer body is arranged in the second substrate.

Further, a first bevel angle is arranged on the edge of the back face of the first base body; a second bevel angle is arranged at the edge of the front surface of the second substrate; the angle range of the first bevel angle is 47-58 degrees; the angle of the first bevel is in the range of 59-74 degrees, and the depths of the first bevel and the second bevel are the same.

The invention has the beneficial effects that:

the invention provides a packaging method and a packaging structure of an acoustic surface filter, which can effectively ensure that only a small amount of space is reserved at the left side and the right side of a chip functional area (namely an IDT area) through the structural design of a first glass cover plate, a second glass cover plate, a film covering structure and a glass supporting square column, and the top of the chip functional area is provided with a packaging structure mode that no space is reserved through film covering, so that the functional influence on the IDT area due to the space not reserved above the chip functional area can be ensured, and meanwhile, the performance influence on the IDT area due to the collapse of the film covering can be ensured. Simultaneously, through above-mentioned packaging structure's design, can effectively reduce the thickness of second glass apron, reduce upper glass apron weight and shared space in the very big degree, and then effectively reduce glass apron weight to the regional produced pressure of IDT to the influence that the regional performance of IDT caused.

Drawings

FIG. 1 is a flow chart of the method of the present invention;

FIG. 2 is a schematic view of a package structure according to the present invention;

FIG. 3 is a schematic structural view of a glass cover plate according to the present invention;

(1, first substrate; 2, second substrate; 3, wafer body; 4, piezoelectric layer; 5, insulating layer; 7, solder ball; 8, metal wire layer; 9, glass cover plate; 10, insulating diaphragm; 11, IDT functional region; 12, organic isolation film layer; 13, glass wave plate; 14, glass support square column; 81, first layer of wire layer; 82, second layer of wire layer; 83, third layer of wire layer; 84, wire branch; a, first bevel; b, second bevel; 91, second glass cover plate; 92, first glass cover plate).

Detailed Description

The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.

The embodiment of the invention provides a packaging method of a surface acoustic wave filter, which comprises the following steps of:

step 1, respectively arranging a wafer main body and an accessory part taking the wafer main body as a core on a first substrate and a second substrate;

step 2, laying an isolation insulating layer above the wafer main body, and marking the position of an IDT functional area above the isolation insulating layer;

step 3, opening an isolation insulating layer corresponding to the IDT functional area to expose the IDT functional area;

step 4, arranging glass supporting square columns on two sides of the IDT functional area; an isolation gap is reserved between the glass support square column and the IDT functional area; the size range of the isolation gap is 0.25mm-0.45 mm;

step 5, forming an organic isolation film layer on the IDT functional area in a film covering mode, wherein two sides of the organic isolation film layer are lapped on the glass support square columns;

step 6, covering a layer of glass wave plate on the organic isolation film layer, wherein two ends of the glass wave plate are lapped on the glass supporting square column;

step 7, arranging a first glass cover plate on the periphery of the wafer main body, wherein the thickness of the first glass cover plate is consistent with that of the wafer main body, and arranging an adhesive layer on the first glass cover plate;

and 8, buckling a second glass cover plate above the adhesive layer, wherein a groove corresponding to the IDT functional area is formed in the second glass cover plate.

The working principle of the technical scheme is as follows: firstly, respectively arranging a wafer main body and an accessory part taking the wafer main body as a core on a first substrate and a second substrate; then, an isolation insulating layer is arranged above the wafer main body, and the position of an IDT functional area is marked above the isolation insulating layer; then, opening an isolation insulating layer corresponding to the IDT functional area to expose the IDT functional area; then, glass supporting square columns are arranged on two sides of the IDT functional area; an isolation gap is reserved between the glass support square column and the IDT functional area; the size range of the isolation gap is 0.25mm-0.45 mm; then, forming an organic isolation film layer on the IDT functional area position in a film covering mode, wherein two sides of the organic isolation film layer are lapped on the glass supporting square columns; then, a layer of glass wave plate is coated and pressed on the organic isolation film layer, and two ends of the glass wave plate are lapped on the glass supporting square column; then, arranging a first glass cover plate on the periphery of the wafer main body, wherein the thickness of the first glass cover plate is consistent with that of the wafer main body, and arranging an adhesive layer on the first glass cover plate; and finally, buckling a second glass cover plate above the adhesive layer, wherein a groove corresponding to the IDT functional area is formed in the second glass cover plate.

The effect of the above technical scheme is as follows: the embodiment provides a surface acoustic wave filter packaging method, and a generated packaging structure can effectively ensure that a small amount of space is reserved on the left side and the right side of a chip functional area (namely an IDT area) through the structural design of a first glass cover plate, a second glass cover plate, a film covering structure and a glass supporting square column, and the top of the chip functional area is provided with a packaging structure mode that no space is reserved through a film covering, so that functional influence on the IDT area due to no space reserved above the chip functional area can be ensured, and meanwhile, performance influence on the IDT area due to film covering collapse can be ensured. Simultaneously, through above-mentioned packaging structure's design, can effectively reduce the thickness of second glass apron, reduce upper glass apron weight and shared space in the very big degree, and then effectively reduce glass apron weight to the regional produced pressure of IDT to the influence that the regional performance of IDT caused.

In an embodiment of the present invention, step 1 of disposing the wafer main body and the accessory component using the wafer main body as a core on the first substrate and the second substrate respectively includes:

step 101, marking a position where a wafer main body needs to be placed on the front surface of a first base body, and arranging a wafer mounting groove at the marked position; arranging a wire layer distribution groove for distributing a first layer of wire layer body and wires for connecting the first layer of wire layer body and a second layer of wire layer body in the first base body;

102, paving an L-shaped insulating layer at the bottom of the wafer mounting groove, wherein the vertical wall of the L-shaped insulating layer is attached to the side wall of the groove body of the wafer mounting groove, and the thickness of a cross arm of the L-shaped insulating layer is kept consistent;

103, arranging a piezoelectric layer on the upper surface of the cross arm of the L-shaped insulating layer; the upper surface of the piezoelectric layer and the upper surface of the vertical wall of the L-shaped insulating layer are on the same horizontal plane;

104, performing slotting treatment on the first substrate and the second substrate to obtain a groove body for distributing metal lead layers, and distributing metal lead layers of each layer level in the groove body for distributing the metal lead layers;

105, after the metal wire layers of each layer are laid, forming an electric connection component mounting groove in the back of the second base body, and arranging an electric connection component in the electric connection component mounting groove;

106, correspondingly forming a first bevel angle and a second bevel angle along the back edge of the first base body and the front edge of the second base body respectively; the first bevel angle is in the range of 47-58 degrees, preferably 54 degrees; the first bevel angle is in the range of 59 ° -74 °, preferably 66 °; the depths of the first oblique angle and the second oblique angle are the same; and bonding and mounting the first substrate and the second substrate to finish the manufacture of the wafer packaging structure after bonding and mounting.

And 107, bonding and mounting the first substrate and the second substrate to finish the manufacture of the wafer packaging structure after bonding and mounting.

The step 104 of performing grooving processing on the first substrate and the second substrate to obtain a groove body for laying a metal wire layer, and performing laying of each layer of metal wire layer in the groove body for laying the metal wire layer includes:

1041, arranging a first layer of lead layer body in the lead layer distribution groove, and arranging a wafer main body on the first layer of lead layer body;

1042, marking the back of the first base with a bump installation position, removing the base part on the back of the first base and reserving a bump of the first base at the bump installation position while removing the base part on the back of the first base; grooving the surface of the first substrate after the back of the first substrate is removed to obtain a wire arrangement groove for arranging a second layer of wire layer body;

step 1043, bonding a cover plate on the front surface of the first substrate;

step 1044, completing the layout of all the metal wires left in the first substrate in the wire layer distribution groove of the first substrate;

step 1045, after the layout of all the metal wires in the first substrate is completed, marking all the positions where the wires are required to be connected and the protruding positions between the second layer of wire layer body and the third layer of wire layer body, and scanning the back surface of the first substrate after the positions are marked to obtain a position diagram;

step 1046, imprinting the position pattern on the front surface of the second substrate to form a position imprinted pattern on the front surface of the second substrate;

and 1047, arranging a protrusion and a groove and a wire arrangement groove for arranging a third layer of wire layer body and a wire branch on the front surface of the second base body according to the position imprinting drawing, and arranging the third layer of wire layer body and the wire branch in the wire arrangement groove.

The effect of the above technical scheme is as follows: the manufacturing method can effectively improve the manufacturing efficiency and yield of the wafer packaging structure, meanwhile, the manufactured wafer packaging structure can effectively improve the conductivity of devices through the arrangement of the multiple metal conducting wire layers, especially under the condition that the metal conducting layers are easily adversely affected by production and processing caused by severe production and processing environments, the multiple metal conducting wire layers are added, and the occurrence of poor metal conductivity can be effectively reduced. On the other hand, through the disconnect-type base structure of first base member and second base member, under the condition that multilayer metal conductor layer set up, can be in the course of working, need not the mounting groove that forms multilayer metal conductor layer in a base member in-process, only need openly at first base member and the back to and the cell body is openly seted up to the second base member, effectively reduce the fluting degree of difficulty, and improve wafer packaging structure's machining efficiency. Meanwhile, through the arrangement of the separated base body structures of the first base body and the second base body, when the wafer packaging structure is reused, the packaging structure only needs to be disassembled, and the front part of the second base body is subjected to wear elimination treatment or layer adding treatment according to the recycling size to achieve a new size, so that the recycling rate of the packaging structure and the resource recycling rate are effectively improved, and the cost is reduced. On the other hand, the degree of convenience of first base member and the installation of second base member can effectively be improved through the setting of above-mentioned oblique angle and size angle, and simultaneously, the position and the angle that open angle set up, can be when packaging structure recycles, provide effectual dismantlement impetus, make the dismouting in-process, first base member and second base member can adapt to and are used for carrying on grabbing of first base member and the dismantlement of second base member snatching of work piece, and simultaneously, open angle can effectively improve and recycle in-process dismantlement security, because good impetus sets up can effectively reduce the damage to packaging structure in the dismouting in-process, improve dismantlement yield and packaging structure reuse rate. The wafer packaging structure can effectively improve the conductivity of devices through the arrangement of the multiple metal conducting wire layers, particularly under the condition that the production and processing environment is severe, the metal conducting wire layers are added, and the poor metal conducting condition can be effectively reduced.

An embodiment of the present invention provides a surface acoustic filter package structure, as shown in fig. 2 and 3, the surface acoustic filter package structure includes a first glass cover plate 92, a second glass cover plate 91, an IDT functional area package component, a wafer main body 3, and a wafer main body carrier; an insulating layer 5 is arranged on the upper surface of the wafer main body, and an opening is arranged on the insulating layer 5, which is opposite to the IDT functional area, so that the IDT functional area 11 is exposed; the IDT functional area packaging part is arranged on the IDT functional area; a first glass cover plate 92 is buckled on the periphery of the wafer main body 3; a main body mounting position corresponding to the position of the wafer main body 3 is arranged on the first glass cover plate 92; laying an adhesive layer on the first glass cover plate 92, buckling a second glass cover plate 91 above the IDT functional area packaging part, and bonding the first glass cover plate and the second glass cover plate through the adhesive layer; the second glass cover plate 91 is provided with a groove corresponding to the IDT functional region.

The IDT functional area 11 packaging component comprises two glass supporting square columns 14, wherein the two glass supporting square columns 14 are respectively adhered above the insulating layers on two sides of the IDT functional area 11; an isolation gap is arranged between the two glass supporting square columns 14 and the IDT functional area 11; a step carrying structure is arranged on the two glass supporting square columns 14; an organic isolation film layer 12 is laminated above the IDT functional area 11; the organic isolation film layer 12 is attached to the IDT functional region 11, and both ends of the organic isolation film layer 12 overlap the step-shaped structure of the glass support square column 14; the upper surface of the organic barrier film layer 12 is at the same level as the upper surface of the glass support square column 14.

The working principle and the effect of the technical scheme are as follows: structural design through first glass apron, second glass apron, tectorial membrane structure and glass support square column 14 can effectively guarantee only reserving a small amount of spaces for chip functional area (IDT region promptly) in the left and right sides, and the packaging structure mode that the tectorial membrane did not reserve space is passed through at the top, can enough guarantee can not produce functional influence to the IDT region because the space is not left to the top, can guarantee again simultaneously can not produce the performance influence to the IDT region because the tectorial membrane collapses. Simultaneously, through above-mentioned packaging structure's design, can effectively reduce the thickness of second glass apron, reduce upper glass apron weight and shared space in the very big degree, and then effectively reduce glass apron weight to the regional produced pressure of IDT to the influence that the regional performance of IDT caused.

In one embodiment of the invention, the size of the separation gap is in the range of 0.25mm to 0.45 mm. The thickness of the glass support square column 14 satisfies the following relationship:

0.47D₁≤D≤0.6D₁

where D represents the thickness of the glass support square 14 and D1 represents the thickness of the second glass cover plate.

The working principle and the effect of the technical scheme are as follows: through the design of above-mentioned isolation clearance size scope, can enough guarantee to have certain interval between glass support square column 14 and the IDT region, make the glass square column can not be because of extrudeing to the center and leading to the fact the influence to the IDT region, simultaneously, just can reduce the second glass apron fluting space through above-mentioned isolation clearance size scope at very big degree, can guarantee even the glass square column also can not touch the IDT region because the solidification adhesive force of adhesive produces the displacement. On the other hand, because the second glass apron needs to polish frivolously as far as possible and lighten its weight and shared space, this just leads to its fluting space to be difficult for too big, prevents it to produce the fracture, consequently, through the size range design of the horizontal thickness of above-mentioned glass support square column 14, can effectively reduce glass support square column 14 shared space when first glass apron design is enough frivolous, and then effectively reduce the fluting size of second glass apron, and then reduce the cracked probability of second glass apron, can guarantee simultaneously that glass support square column 14's quality is enough little to guarantee that it can not produce extrusion deformation to the chip because the quality is too big. On the other hand, due to the high brittleness of the glass, the over-thin thickness of the glass can lead to the design of the thickness dimension, so that the thickness of the glass supporting square column 14 can ensure the rigidity of the glass supporting column in the supporting direction, and the glass supporting square column cannot be cracked due to the over-thin thickness.

In one embodiment of the invention, the wafer bulk carrier comprises a first substrate 1; the front surface of the first base body 1 is provided with a piezoelectric layer 4; the back of the first base body 1 is provided with a second base body 2; a wafer main body is arranged above the piezoelectric layer 4; a cover plate is buckled on the wafer main body; the cover plate is bonded with the first base body 1; an insulating layer is arranged below the piezoelectric layer 4; the end of the piezoelectric layer 4 is connected with a metal wire layer 8; the metal wire layer 8 is arranged inside the first substrate 1 and the second substrate 2; the back of the second base body 2 is embedded with a plurality of electric connection parts, one side of the electric connection parts embedded in the second base body 2 is electrically connected with the metal wire layer 8, and the outer surface of each electric connection part is attached with a passivation film on one side.

Wherein, the metal wire layer 8 includes a first wire layer 81, a second wire layer 82 and a third wire layer 83; the first layer of conducting wire layer 81 is electrically connected with the second layer of conducting wire layer 82 through a metal conducting wire; the second layer of conducting wire layer 82 and the third layer of conducting wire layer 83 are electrically connected through a metal conducting wire, and the first layer of conducting wire layer 81 and the second layer of conducting wire layer 82 are arranged in the first substrate 1; the third layer of conducting wire layer 83 is disposed in the second substrate 2. The first layer of conductive wires and the insulating layer are located at the same horizontal level, and the thickness of the insulating layer is consistent with that of the first layer of conductive wires 81; the second layer of conducting wire layer body 82 is arranged at the back position of the first base body 1; the second layer of conducting wire layer 82 is embedded in the first substrate 1, and a side surface of the second layer of conducting wire layer 82 not embedded in the first substrate 1 is at the same level with the back surface of the first substrate 1. A plurality of third layer conducting wire layer bodies 83 are arranged between the second layer conducting wire layer body 82 and the third layer conducting wire layer body 83; the third layer of conductive layers 83 are embedded in the second substrate 2. A plurality of bulges are arranged at the positions of the back surface of the first base body 1 where the first layer of the conducting wire layer body 81 is not arranged; grooves corresponding to the number and positions of the protrusions are formed in the front surface of the second base body 2; the first basal body 1 and the second basal body 2 are bonded and fixed through the bulges and the grooves, and the joint of the first basal body 1 and the second basal body 2 and the joint of the second basal body 2 and the second layer of lead layer body 82 are both provided with insulating diaphragms.

Wherein, the edge of the back surface of the first substrate 1 is provided with a first bevel angle a; the edge of the front surface of the second substrate 2 is provided with a second bevel angle b; the angle of the first oblique angle a ranges from 47 degrees to 58 degrees; the angle of the first bevel angle a ranges from 59 degrees to 74 degrees, and the depths of the first bevel angle a and the second bevel angle b are the same. When grabbing the work piece and inserting in order to improve between first oblique angle a and the second oblique angle b, reduce and grab mutual interference between the work piece, and then reduce the damage to first base member 1 and second base member 2 to guarantee to have strong enough and snatch the impetus, need to guarantee that first oblique angle a is as follows than the difference range between the second oblique angle b: 7 degrees < C < 13 degrees.

The working principle and the effect of the technical scheme are as follows: through the disconnect-type base structure of first base member 1 and second base member 2, under the condition that multilayer metal conductor layer 8 set up, can be in the course of working, need not the mounting groove that forms multilayer metal conductor layer 8 in the processing of a base member, only need openly with the back at first base member to and second base member 2 openly offer the cell body, effectively reduce the fluting degree of difficulty, and improve wafer packaging structure's machining efficiency. Meanwhile, through the arrangement of the separated base body structures of the first base body 1 and the second base body 2, when the wafer packaging structure is reused, the packaging structure only needs to be disassembled, and the front part of the second base body 2 is subjected to wear elimination treatment or layer adding treatment according to the recycling size to achieve a new size, so that the recycling and resource recycling rate of the packaging structure is effectively improved, and the cost is reduced.

Through the setting of above-mentioned oblique angle and size angle can effectively improve the convenience that first base member 1 and second base member 2 installed, and simultaneously, the position and the angle that the open angle set up, can be when packaging structure recycles, provide effectual dismantlement impetus, make the dismouting in-process, first base member 1 and second base member 2 can adapt to the snatching of most conventional snatching work pieces, and simultaneously, the open angle can effectively improve the in-process dismantlement security of recycling, because good impetus sets up can effectively reduce the damage to packaging structure in the dismouting in-process, improve dismantlement yield and packaging structure reuse rate.

The wafer packaging structure can effectively improve the conductivity of the device through the arrangement of the multiple metal conducting wire layers 8, particularly, under the condition that adverse effects are easily generated on the metal conducting layers in production and processing due to the fact that the production and processing environment is severe, the multiple metal conducting wire layers 8 are added, and the occurrence of poor metal conductivity can be effectively reduced. On the other hand, through the disconnect-type base structure of first base member 1 and second base member 2, under the condition that multilayer metal conductor layer 8 set up, can be in the course of working, need not in the base member in-process formation multilayer metal conductor layer 8's mounting groove, only need openly at first base member 1 and the back to and second base member 2 openly set up the cell body, effectively reduce the fluting degree of difficulty, and improve wafer packaging structure's machining efficiency. Meanwhile, through the arrangement of the separated base body structures of the first base body 1 and the second base body 2, when the wafer packaging structure is reused, the packaging structure only needs to be disassembled, and the front part of the second base body 2 is subjected to wear elimination treatment or layer adding treatment according to the recycling size to achieve a new size, so that the recycling and resource recycling rate of the packaging structure is effectively improved, and the cost is reduced.

On the other hand, can effectively improve the convenience that first base member 1 and second base member 2 installed through the setting of above-mentioned oblique angle and size angle, and simultaneously, the position and the angle that the open angle set up, can be when packaging structure recycles, provide effectual dismantlement impetus, make the dismouting in-process, first base member 1 and second base member 2 can adapt to and are used for carrying on grabbing of the work piece that first base member 1 and second base member 2 dismantled snatchs, and simultaneously, the open angle can effectively improve the in-process dismantlement security of recycling, because good impetus sets up can effectively reduce the damage to packaging structure in the dismouting in-process, improve dismantlement yield and packaging structure reuse rate.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.