阅读说明：本技术 具有在层压期间形成的导电迹线的催化层压板 (Catalytic laminate with conductive traces formed during lamination ) 是由 肯尼斯·S·巴尔 康斯坦丁·卡拉瓦克斯 于 2019-03-09 设计创作，主要内容包括：一种电路板由具有富含树脂的表面的催化层压板形成,其中催化颗粒分散在表面排除深度以下。迹线通道和孔隙形成在催化层压板中,该催化层压板用诸如铜的金属进行化学镀,填充有含有金属颗粒的导电糊剂,然后熔化以形成迹线。在一种变型中,多个电路板层具有形成在表面中在排除深度以下的通道,形成孔隙,进行化学镀,并且通道和孔隙填充有金属颗粒。若干个这样的催化层压层被放置在一起并在高温被压在一起,直到催化层压层层压在一起并且金属颗粒形成为用于多层电路板的迹线。(A circuit board is formed from a catalytic laminate having a resin-rich surface with catalytic particles dispersed below the surface exclusion depth. Trace channels and pores are formed in the catalytic laminate that is electroless plated with a metal such as copper, filled with a conductive paste containing metal particles, and then melted to form traces. In one variation, the plurality of circuit board layers have channels formed in the surface below the exclusion depth, pores are formed, electroless plating is performed, and the channels and pores are filled with metal particles. Several such catalytic laminate layers are placed together and pressed together at elevated temperature until the catalytic laminate layers are laminated together and the metal particles form traces for the multilayer circuit board.)