阅读说明：本技术 滤波器元件、多工器和通信设备 (Filter element, multiplexer, and communication device ) 是由 蔡华林 庞慰 于 2020-04-30 设计创作，主要内容包括：本发明涉及滤波器技术领域,特别地涉及一种滤波器元件、多工器和通信设备。在该滤波器元件中,无源器件集成设置在上晶圆的上方,一方面利用集成的无源器件改善滤波器的通带和带外性能,另一方面也能避免或减小无源器件与滤波器元件中的结构及连线之间的耦合,进而避免或降低滤波器性能恶化。(The present invention relates to the field of filter technologies, and in particular, to a filter element, a multiplexer, and a communication device. In the filter element, the passive device is integrated above the upper wafer, so that on one hand, the passband and out-of-band performance of the filter are improved by utilizing the integrated passive device, on the other hand, the coupling between the passive device and the structure and the connecting line in the filter element can be avoided or reduced, and further, the performance deterioration of the filter is avoided or reduced.)

1. A filter element having an upper wafer, a lower wafer, and a substrate stacked from top to bottom and including a plurality of resonators which are piezoelectric acoustic wave resonators,

the filter element has at least 1 passive device integrated over the upper wafer.

2. The filter element of claim 1, wherein the resonator is disposed below the upper wafer and connected to the passive device above the upper wafer via a via.

3. The filter element according to claim 1 or 2, wherein the resonators are provided above a lower wafer.

4. The filter element of claim 1, wherein the passive devices integrated on top of the upper wafer are inductors or capacitors, or a combination of inductors and capacitors.

5. The filter element of claim 4, wherein passive devices integrated over the upper wafer are connected in parallel or in series with the resonators in the filter.

6. The filter element of claim 4, wherein the passive device integrated over the upper wafer is connected across two designated nodes of the resonator in the filter.

7. The filter element according to claim 4, wherein the inductances and/or capacitances are distributed in different layers of the upper wafer.

8. The filter element of claim 1, wherein the passive devices integrated over the upper wafer have an isolation layer between the upper surface of the upper wafer.

9. The filter element of any of claims 1 or 2, or 4 to 8, wherein for the filter element:

all the series resonators are arranged on the upper wafer, and all the parallel resonators are arranged on the lower wafer;

or all the parallel resonators are arranged on the upper wafer, and all the series resonators are arranged on the lower wafer;

alternatively, all resonators are disposed on the lower wafer.

10. The filter element of any of claims 1 or 2, or 4 to 8,

the resonators of the small power density group are arranged on the upper wafer, the resonators of the large power density group are arranged on the lower wafer, the power density of the resonators in the small power density group is smaller than a preset value, and the power density of the resonators in the large power density group is larger than or equal to the preset value.

11. The filter element according to any of claims 1 or 2, or 4 to 8, wherein the lower wafer is provided with through holes and pins.

12. A multiplexer comprising the filter element of any one of claims 1 to 11.

13. A communication device comprising a filter element according to any one of claims 1 to 11.

Technical Field

The present invention relates to the field of filter technologies, and in particular, to a filter element, a multiplexer, and a communication device.

Background

The recent trend toward miniaturization and high performance of communication devices has been increasing, posing even greater challenges to rf front-ends. In the radio frequency communication front end, miniaturization is realized by reducing the sizes of a chip scale and a packaging substrate on one hand, and better performance is realized by reducing loss sources and better resonator matching design on the other hand. In the existing filter structure, there are more passive devices for matching, and meanwhile, various structures such as more inductors, capacitors, couplings and the like are additionally introduced for improving specific performances such as roll-off insertion loss and the like.

A typical structure of a general filter is shown in fig. 1, and fig. 1 is a schematic view of a structure of an acoustic wave filter according to the related art. In this filter 100, inductors 121 and 122 and a plurality of resonators (generally referred to as series resonators) 101 to 104 are provided between an input terminal 131 and an output terminal 132, and resonators 111 to 113 (generally referred to as parallel resonators) and inductors 123 to 125 are provided in a plurality of arms (generally referred to as parallel arms) between a connection point of each series resonator and a ground terminal. A mass loading layer is added to each parallel resonator, and the frequency of the parallel resonator and the frequency of the series resonator are different to form the passband of the filter. Herein, a lower wafer is defined as having pins PAD, an upper wafer is defined as having no pins PAD, and the upper wafer is located above the lower wafer in each drawing.

Fig. 2 is a cross-sectional view of a package structure of a conventional filter, as shown in fig. 2, which includes an upper wafer and a lower wafer stacked one on another, wherein a series resonator and a parallel resonator are formed under the upper wafer, and a docking pin PAD is formed at the same time, and the docking pin PAD of the upper wafer is used for bonding with the docking pin PAD of the lower wafer. The lower wafer is provided with a VIA hole VIA, a resonator and a butt joint pin PAD which are manufactured by the upper wafer are connected to the pin PAD below the lower wafer through the VIA hole VIA, and the pin PAD below the lower wafer can be connected to a packaging substrate or a PCB through a metal solder ball or a bonding wire, so that different product forms are formed.

The performance of the filter can be improved by adding the passive device into the filter, wherein the passive device can be arranged separately or integrally, for example, the area of a chip can be increased by the separate arrangement, and the pins of the filter can be increased and are difficult to correspond to the positions of the pins of the existing product, so that the passive device is generally arranged in the filter in an integrated mode. As shown in fig. 3a and 3b, the passive devices are all integrated below the lower wafer (and may also be integrated in the package substrate), the resonators are all fabricated on the upper wafer in fig. 3a, some of the resonators are fabricated on the upper wafer, and some of the resonators are fabricated on the lower wafer in fig. 3 b. For the bulk acoustic wave filter, the input/output and ground connection lines of the bulk acoustic wave filter are connected to corresponding PINs through VIA holes VIA of a lower wafer, and then connected to a substrate or a PCB through different packaging forms, so as to finally form PIN PINs of the filter.

In the structure, the passive device and the input/output and ground pins of the filter are all positioned below the filter, and are close to each other and then directly coupled, so that the performance of the filter is obviously deteriorated.

Disclosure of Invention

In view of the above, the present invention provides a filter element, a multiplexer and a communication device, in which a passive device is disposed above an upper wafer, so that the integrated passive device is utilized to improve the passband and out-of-band performance of the filter, and the coupling between the passive device and the structure and the connection lines in the filter element can be avoided or reduced, thereby avoiding or reducing the performance degradation of the filter.

To achieve the above object, according to one aspect of the present invention, there is provided a filter element.

The filter element comprises an upper wafer, a lower wafer and a substrate which are stacked from top to bottom, and comprises a plurality of resonators, wherein the resonators are piezoelectric acoustic wave resonators, and at least 1 passive device is integrated above the upper wafer.

Optionally, the resonator is disposed below the upper wafer, and the resonator is connected to the passive device above the upper wafer through a through hole.

Optionally, the resonator is disposed above the lower wafer.

Optionally, the passive device integrated above the upper wafer is an inductor or a capacitor, or a combination of an inductor and a capacitor.

Optionally, passive devices integrated above the upper wafer are in parallel or in series with the resonators in the filter.

Optionally, a passive device integrated over the upper wafer is connected across two designated nodes of the resonator in the filter.

Optionally, the inductances and/or capacitances are distributed in different layers of the upper wafer.

Optionally, the passive devices integrated above the upper wafer have an isolation layer between them and the upper wafer surface.

Optionally, for the filter element: all the series resonators are arranged on the upper wafer, and all the parallel resonators are arranged on the lower wafer; or all the parallel resonators are arranged on the upper wafer, and all the series resonators are arranged on the lower wafer; alternatively, all resonators are disposed on the lower wafer.

Optionally, the resonators of the small power density group are arranged on the upper wafer, and the resonators of the large power density group are arranged on the lower wafer, wherein the power densities of the resonators of the small power density group are smaller than a preset value, and the power densities of the resonators of the large power density group are larger than or equal to the preset value.

Optionally, the lower wafer is provided with through holes and pins.

According to another aspect of the present invention, there is provided a multiplexer (where the multiplexer includes a duplexer) comprising the filter element of the present invention.

According to a further aspect of the invention, there is provided a communication device comprising a filter element according to the invention.

Drawings

For purposes of illustration and not limitation, the present invention will now be described in accordance with its preferred embodiments, particularly with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram of a prior art filter topology;

fig. 2 is a cross-sectional view of a package structure of a conventional filter;

fig. 3a is a schematic structural diagram of a conventional filter integrated with passive devices;

fig. 3b is another schematic diagram of a conventional passive device integrated filter;

FIG. 4 is a schematic diagram of the structure of the connecting inductor in the filter;

FIG. 5 is a graph comparing filter performance;

FIG. 6 is a schematic diagram of a filter access inductor structure;

FIG. 7 is a schematic diagram of another structure of the filter access inductor;

FIG. 8 is a schematic diagram of one configuration of filter access capacitors;

FIG. 9 is a schematic diagram of another configuration of the filter access capacitor;

FIG. 10 is a graph comparing filter performance;

FIG. 11 is a graph comparing the performance of filters;

FIG. 12 is a schematic diagram of an arrangement of filter access capacitors;

FIG. 13 is a schematic diagram of another configuration of the filter access capacitor;

FIG. 14 is a graph of the roll-off comparison on the right side of the filter;

FIG. 15 is a graph of the left roll-off comparison of a filter;

FIG. 16 is a schematic diagram of the structure of the coupling capacitor connected to the filter;

FIG. 17 is a graph comparing filter rejection performance;

fig. 18a and 18b are cross-sectional views of a filter package structure according to an embodiment of the present invention;

fig. 19a and 19b are cross-sectional views of alternative package structures of filters according to embodiments of the present invention;

fig. 20 is a schematic structural diagram of an integrated inductor;

FIG. 21 is a schematic diagram of an integrated capacitor;

FIG. 22 is a schematic diagram of another structure of an integrated capacitor;

FIG. 23 is a graph comparing filter performance;

fig. 24 is a graph comparing filter performance.

Detailed Description

FIG. 4 is a schematic diagram of the structure of the connecting inductor in the filter; as shown in fig. 4, an inductor is connected in parallel to the series resonator of the filter near the output end, where the arrangement of the inductor is not limited to the arrangement in fig. 4, and an inductor may be connected in parallel to any one or more of the series resonators or the parallel resonators, and the inductor may be replaced by an inductor-capacitor series or parallel connection. Fig. 5 is a graph comparing filter performance, where the solid line is the performance curve of the switched-in inductor and the dashed line is the performance curve of the non-switched-in inductor. After the filter is connected with the inductor, a transmission zero point is generated near out-of-band 1GHz, the suppression performance of the position is obviously improved, and the transmission zero point can be moved to a required frequency point by adjusting the size of the inductor or adjusting the inductance value and capacitance value in an inductor-capacitor connection mode, so that the suppression of the corresponding frequency point is improved. Therefore, the inductor connected into the filter forms a transmission zero outside the band, and the suppression of specific frequency is improved.

The filter is connected with an inductor or a capacitor, and the bandwidth and the return loss of the filter can be adjusted. FIG. 6 is a schematic diagram of a filter access inductor structure; FIG. 7 is a schematic diagram of another structure of the filter access inductor; FIG. 8 is a schematic diagram of one configuration of filter access capacitors; FIG. 9 is a schematic diagram of another configuration of the filter access capacitor; the position of the inductor or the capacitor is not limited to the situation in the figure, and may be connected to any series resonator or parallel resonator, or a plurality of inductors or a plurality of capacitors may be connected to a plurality of positions, and the inductor or the capacitor may be replaced by a series or parallel inductor-capacitor form. Fig. 10 is a graph comparing the performance of the filter, in which the solid line is the performance curve of the accessed inductor and the dotted line is the performance curve of the unaccessed inductor, and it can be known from the comparison graph that the accessed inductor in the filter increases the equivalent electromechanical coupling coefficient of the resonator, thereby increasing the bandwidth; the equivalent electromechanical coupling coefficient of the resonator can be reduced by the access capacitor, so that the bandwidth can be reduced, and the filter can be applied to narrow-band filters; fig. 11 is a performance comparison graph of the filter, in which a solid line is a performance curve of the connected inductor and a dotted line is a performance curve of the unconnected inductor, and it can be seen from the comparison graph that the impedance of the filter can be adjusted by the connected inductor, so that the filter can be better matched with the input/output port, and the return loss can be improved.

The roll-off performance of the filter can be improved by connecting a capacitor into the filter. FIG. 12 is a schematic diagram of an arrangement of filter access capacitors; fig. 13 is another structure diagram of the filter access capacitor. In fig. 12 and 13, capacitors are connected in parallel to one series resonator and one parallel resonator, respectively, wherein the positions of the capacitors are not limited to those in fig. 12 and 13, the capacitors may be connected to any series resonator or parallel resonator, or a plurality of capacitors may be connected to a plurality of positions, and the capacitors may be replaced by using a series or parallel form of inductive capacitors. The access capacitance reduces the transition band of the impedance match to the mismatch so that the transition from pass band to stop band can be accomplished more quickly. FIG. 14 is a graph of the roll-off comparison on the right side of the filter; FIG. 15 is a graph of the left roll-off comparison of a filter; in the figure, the solid line is the roll-off curve of the accessed capacitor, and the dotted line is the roll-off curve of the unaccessed capacitor. As can be seen from fig. 14 and 15, the access capacitor can effectively improve the roll-off of the filter.

The filter is connected with a coupling capacitor, and the suppression performance of the filter can be improved. FIG. 16 is a schematic diagram of the structure of the coupling capacitor connected to the filter; the coupling capacitor is used for adjusting the position of the out-of-band transmission zero point, and the required transmission zero point can be placed in a frequency band needing higher suppression by adding the coupling capacitor; here, the position of the coupling capacitance is not limited to the arrangement case in fig. 16, and it may be connected between arbitrary nodes, and may be connected at a plurality of positions. Fig. 17 is a graph comparing the suppression performance of the filter, in which the solid line is a performance curve with the coupling capacitor added and the dotted line is a performance curve without the coupling capacitor added, and it can be seen from fig. 17 that the coupling capacitor is added to the filter to effectively improve the suppression.

In the embodiment of the invention, passive devices such as capacitors, inductors and the like are integrated and arranged above the upper wafer. Fig. 18a and 18b are cross-sectional views of a filter package structure according to an embodiment of the present invention. In the figure, a passive device is integrally arranged on the upper surface of the upper wafer by utilizing an integrated passive device process, wherein the passive device in fig. 18a is an inductor, and the passive device in fig. 18b is a capacitor. With the arrangement of fig. 18a and 18b, where there is a PAD connected to the resonator around the resonator of the lower wafer, the PAD is connected to the underlying pin PAD through a via, which is a metal line (for the wafer material, a section of this material is missing at the location of the via, so for this material, a via is formed, where metal is deposited), and thus forms an inductor. PADs connected with the resonator are also arranged around the resonator of the upper wafer, wherein a part of PADs are used for being connected with PADs on the lower wafer to form electric connection, and a part of PADs are connected with passive devices above the upper wafer through holes of the upper wafer. The passive device is integrated above the upper wafer, so that a certain distance exists among the passive device, each input/output of the filter, the through holes of the lower wafer and the ground pins in space, and the upper wafer and the lower wafer also have the effect of physical isolation, so that the coupling between the passive device and each input/output of the filter and the ground pins can be reduced or avoided, and the performance deterioration of the filter is reduced or avoided. Preferably, in the embodiment of the present invention, an isolation layer may be further disposed below the passive device, that is, an isolation layer is disposed between the passive device and the upper surface of the upper wafer, so as to further improve an isolation effect between the passive device and each input/output of the filter and the ground pin.

Fig. 19a and 19b are cross-sectional views of alternative package structures of filters according to embodiments of the present invention; wherein the passive device in fig. 19a is an inductor, and the passive device in fig. 19b is a capacitor; as shown in fig. 19a and 19b, in the filter structure in which resonators are fabricated on both the lower surface of the upper wafer and the upper surface of the lower wafer, series resonators and parallel resonators may be separately provided, that is, series resonators are fabricated on the upper wafer/lower wafer, and parallel resonators are correspondingly fabricated on the lower wafer/upper wafer. The specific connection form is as follows: PAD connected with the resonator is arranged around the resonator of the lower wafer and is connected with the PAD of the lower pin through a through hole, and the through hole is a section of metal wire, so that an inductor is formed. PADs connected with the resonator are also arranged around the resonator of the upper wafer, wherein a part of PADs are used for being connected with PADs on the lower wafer to form electric connection, and a part of PADs are connected with passive devices above the upper wafer through holes of the upper wafer.

Part of the series resonators and the parallel resonators may be manufactured on the upper wafer, and the other part of the series resonators and the parallel resonators may be manufactured on the lower wafer. The purpose of adopting the separation setting is to make part of sensitive nodes in the filter far away from the passive device, namely, the sensitive nodes are manufactured on a lower wafer, and the resonators on the wafer and the nodes between the resonators are far away from the passive device on the surface of the wafer, so that the influence of coupling can be avoided, and the performance of the filter is improved. Because the heat dissipation performance of the lower wafer is better, all the resonators can be grouped according to the power density, wherein the power density of the resonators in the small power density group is smaller than a preset value, and the power density of the resonators in the large power density group is larger than or equal to the preset value. The resonators of the low power density group are then placed on the upper wafer and the resonators of the high power density group are placed on the lower wafer. This is advantageous for better heat dissipation from resonators with higher power density. If the manufacturing cost is considered, all resonators can be manufactured on the lower wafer, so that the upper wafer does not need to manufacture the resonators, and the cost is reduced. All resonators in the case of the lower wafer, additional vias may be made in the upper wafer to make the passive devices separately.

In the embodiment of the invention, the passive device integrated on the upper wafer is not only a single capacitor and inductor, but also can form a plurality of discrete inductors and capacitors, and the serial or parallel combination of the inductors and the capacitors, and can form a plurality of impedance transformation forms to adjust the impedance characteristic of the filter, thereby achieving different effects.

Fig. 20 is a schematic structural diagram of an integrated inductor, where the inductor structure shown in fig. 20 is one of the structures of inductors, and the structure of the inductor in the embodiment of the present invention is not limited thereto, and the number of turns, the radius, the line width, the line pitch, the metal thickness, and the like of the inductor are not limited. The inductor provided by the embodiment of the invention can be distributed in multiple layers, all the layers are connected through the holes, meanwhile, the metal material for forming the inductor and the dielectric material used between the layers are not limited, the metal material can be copper, aluminum, gold, silver, platinum, molybdenum, chromium and other conductive metals, and the dielectric material for interlayer isolation can be silicon dioxide, silicon nitride and other insulating materials.

Fig. 21 is a schematic structural diagram of an integrated capacitor, as shown in fig. 21, the left and right sides are respectively connected to the upper and lower flat metal surfaces through two leads, and the capacitor is formed by the upper and lower flat metals and the middle insulating layer. The structure of the capacitor in the embodiment of the invention is not limited to the structure, parameters such as the number of layers of the capacitor, the area of the flat plate, the length of the lead, the distance between the flat plates of the capacitor, the staggered area of the flat plates, the metal thickness and the like are not limited, meanwhile, the capacitor can be distributed in multiple layers, and all the layers are connected through the holes. The metal material forming the capacitor and the dielectric material used between layers are not limited, the metal material can be various conductive metals such as copper, aluminum, gold, silver, platinum, molybdenum, chromium and the like, and the dielectric material for interlayer isolation can be various insulating materials such as silicon dioxide, silicon nitride and the like.

FIG. 22 is a schematic diagram of another structure of an integrated capacitor; as shown in fig. 22, in the structure in which the left and right sides are connected to the left and right insertion fingers through two lead wires, the left insertion finger and the right insertion finger form a capacitor through coupling between planar metals, and the size of the capacitor is related to parameters such as the number and length of the insertion fingers. The structure of the capacitor in the embodiment of the invention is not limited to this, the number of layers, the number of fingers, the length of lead wires, the distance between fingers, the width of metal, the length of fingers, the thickness of metal and the like of the finger capacitor are not limited, meanwhile, the capacitor can be distributed in multiple layers, and the layers are connected through holes. The metal material forming the capacitor and the dielectric material for interlayer isolation are not limited, the metal material can be various conductive metals such as copper, aluminum, gold, silver, platinum, molybdenum, chromium and the like, and the dielectric material for interlayer isolation can be various insulating materials such as silicon dioxide, silicon nitride and the like.

Fig. 23 is a graph comparing the performance of a filter in which the solid line is the out-of-band rejection curve of the filter shown in fig. 19b in which the series resonators and the parallel resonators are separately arranged, i.e., all the series resonators are manufactured on the upper wafer and all the parallel resonators are manufactured on the lower wafer, and the dotted line is the out-of-band rejection curve of the filter shown in fig. 18 b. By providing the resonators separately, the passive device and the ground node of the parallel resonator are spaced further apart and the series resonator is interposed as an isolation layer, and therefore, the coupling between the passive device and the ground node of the parallel resonator is weakened and the out-of-band rejection of the filter can be improved.

Fig. 24 is a graph comparing filter performance, in which a solid line is an out-of-band rejection curve of a passive device integrated in an upper wafer and a dotted line is an out-of-band rejection curve of a passive device integrated in a lower wafer, in which all series resonators are fabricated in the upper wafer and all parallel resonators are fabricated in the lower wafer, and since an inductor (passive device) is integrated in the upper wafer, mutual inductance between the inductor and a connection line to the resonator and ground is reduced, coupling is reduced, and thus out-of-band rejection of the filter can be improved.

The above-described embodiments should not be construed as limiting the scope of the invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions can occur, depending on design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.