阅读说明：本技术 逻辑器件及其逻辑控制方法 (Logic device and logic control method thereof ) 是由 申见昕 孙阳 于 2019-11-20 设计创作，主要内容包括：本发明提供一种逻辑器件,其包括：至少一个忆耦器,所述至少一个忆耦器的每一个包括中间层和位于所述中间层两侧的平行电极层,所述中间层由具有蝴蝶形非线性回滞曲线的磁电耦合介质材料构成；读取线圈,用于给所述至少一个忆耦器提供交流磁场；直流电源,用于给所述至少一个忆耦器施加电压；以及锁相放大器,用于读取所述至少一个忆耦器的磁电耦合电压。本发明的逻辑器件结构简单、存储密度高、写入和读取速度快、能耗低。(The present invention provides a logic device, comprising: each of the at least one memory coupler comprises an intermediate layer and parallel electrode layers positioned on two sides of the intermediate layer, and the intermediate layer is made of a magnetoelectric coupling dielectric material with a butterfly-shaped nonlinear hysteresis curve; a read coil for providing an alternating magnetic field to the at least one memristor; a direct current power supply for applying a voltage to the at least one memristor; and the phase-locked amplifier is used for reading the magnetoelectric coupling voltage of the at least one memory coupler. The logic device has the advantages of simple structure, high storage density, high writing and reading speed and low energy consumption.)

1. A logic device, comprising:

each of the at least one memory coupler comprises an intermediate layer and parallel electrode layers positioned on two sides of the intermediate layer, and the intermediate layer is made of a magnetoelectric coupling dielectric material with a butterfly-shaped nonlinear hysteresis curve;

a read coil for providing an alternating magnetic field to the at least one memristor;

a direct current power supply for applying a voltage to the at least one memristor;

and the phase-locked amplifier is used for reading the magnetoelectric coupling voltage of the at least one memory coupler.

2. The logic device of claim 1, wherein the at least one memcoupler is formed as a memcoupler array.

3. A logic device according to claim 1 or 2, wherein the intermediate layer is a single phase magnetoelectric coupling material or a ferromagnetic/ferroelectric composite material.

4. The logic device of claim 3, wherein the single-phase magnetoelectric coupling material is CaBaCo₄O₇、Ba_0.5Sr_1.5Co₂Fe₁₁AlO₂₂、Ba_0.5Sr_1.5Zn₂(Fe_0.92Al_0.08)₁₂O₂₂、BaFe_10.4Sc_1.6O₁₉、GaFeO₃Or Tb₂(MoO₄)₃。

5. According toThe logic device of claim 3, wherein the ferromagnetic layer of the ferromagnetic/ferroelectric composite is Tb_(1-x)Dy_xFe_2-y(0≤x≤1,y≤0.06)、SmFe₂、Tb(CoFe)₂、Tb(NiFe)₂、TbFe₃、Pr₂Co₁₇、Ni_1-xCo_x(0≤x≤1)、Ni_1-xFe_x(0≤x≤1)、Fe_1-xCo_x(0≤x≤1)、FeAl、FeCoV、FeGa、FeGaB、CoFeB、Fe₈₀B₁₅Si₅、Fe₆₆Co₁₂B₁₄Si₈、Fe₃O₄、CoFe₂O₄Or NiFe₂O₄And the ferroelectric layer of the ferromagnetic/ferroelectric composite material is (1-x) Pb (Mg)_1/3Nb_2/3)O₃–xPbTiO₃(0≤x≤1)、(1-x)Pb(Zn_1/3Nb_2/3)O₃–xPbTiO₃(0≤x≤1)、Pb(Zr_1-xTi_x)O₃(0≤x≤1)、(Ba_1-xSr_x)TiO₃(0≤x≤1)、BiFeO₃、LiNbO₃、SrBi₂Ta₂O₉、Ba_xSr_1-xNb₁₀O₃₀(0≤x≤1)、Ba₂NaNb₅O₁₅Potassium dihydrogen phosphate (KDP), polyvinylidene fluoride (PVDF), PMN-PT, polytrifluoroethylene (PTrFE), polyvinylidene fluoride, copolymers of polytrifluoroethylene, polyurethane or odd-numbered nylons.

6. The logic device of claim 5, wherein the memristor is a FeGa/PMN-PT/FeGa tri-layer heterojunction.

7. A logic control method of a logic device according to any one of claims 1-6, comprising:

adjusting an electric polarization direction and a magnetic moment direction of the at least one memristor to a determined direction;

taking the electric polarization direction as a variable W, wherein the electric polarization direction comprises a first electric polarization direction and a second electric polarization direction which are opposite, a first state of the variable W represents the first electric polarization direction, and a second state of the variable W represents the second electric polarization direction;

taking the respective potentials at two ends of the at least one memory coupler as variables A and B respectively, wherein the first state of the variable A or the variable B represents a potential V_thA/2, wherein the second state of the variable A or the variable B represents a potential-V_th/2，V_thThe voltage required for the electric polarization direction of the at least one memristor is reversed;

taking the phase relation between the intersection α of the alternating magnetic field and a phase angle β locked by the phase-locked amplifier as a variable C, wherein the first state of the variable C represents α - β, and the second state of the variable C represents α - β + pi;

the variable W, the variable A, the variable B and the variable C are used as input quantities of logic operation to carry out logic control.

8. The logic control method according to claim 7, wherein the first electrical polarization direction is upward and the second electrical polarization direction is downward.

9. The logic control method according to claim 7 or 8, wherein changing the state of any two or more of the variable W, the variable a, the variable B, and the variable C performs logic control.

10. The logic control method according to claim 7 or 8, wherein the first and second states of the variable W, the variable a, the variable B, or the variable C are 0 and 1, respectively.

Technical Field

The invention belongs to the technical field of information, and particularly relates to a logic device based on a magnetoelectric coupling effect and a logic control method thereof.

Background

With the development of information technology, there are higher requirements on the information storage and processing capabilities of computers, and with the approach of semiconductor processes to physical limits, moore's law has gradually failed. Under such circumstances, there is an urgent need to develop new devices having information storage and computation capabilities. Modern computers generally adopt a von Neumann architecture with separated arithmetic units and memories, and the computer with the architecture needs to transmit information between the arithmetic units and the memories when performing calculation, which becomes a bottleneck limiting the system performance (called the von Neumann bottleneck); meanwhile, an arithmetic unit and a main memory (such as a DRAM) adopted by a modern computer are volatile devices, so that information cannot be stored after power failure, and higher energy consumption is realized. Therefore, to break through the development bottleneck of the existing computer, a non-von neumann architecture combining an arithmetic unit and a memory (logic in memory) is proposed, wherein the development of a non-volatile logic device with memory performance becomes a key issue. Various nonvolatile memories including a resistance change memory, a magnetic tunnel junction, a phase change memory, etc. have been used to try to develop a nonvolatile logic function.

Recently, a non-volatile memory based on magnetoelectric coupling effect, namely a memristor, is proposed, and non-volatile two-state and multi-state storage can be realized in a single memristor. Compared with other nonvolatile memories, the memory coupler has the advantages of simple structure, high storage density, high writing and reading speeds, low energy consumption and the like. The development of the non-volatile logic device based on the memristor has a very great application prospect.

Disclosure of Invention

It is therefore an object of the present invention to overcome the above-mentioned drawbacks of the prior art, and to provide a logic device comprising:

each of the at least one memory coupler comprises an intermediate layer and parallel electrode layers positioned on two sides of the intermediate layer, and the intermediate layer is made of a magnetoelectric coupling dielectric material with a butterfly-shaped nonlinear hysteresis curve;

a read coil for providing an alternating magnetic field to the at least one memristor;

a direct current power supply for applying a voltage to the at least one memristor; and

and the phase-locked amplifier is used for reading the magnetoelectric coupling voltage of the at least one memory coupler.

According to the logic device of the present invention, preferably, the at least one memristor is formed as a memristor array.

According to the logic device of the present invention, preferably, the intermediate layer is a single-phase magnetoelectric coupling material or a ferromagnetic/ferroelectric composite material.

According to the logic device of the present invention, preferably, the single-phase magnetoelectric coupling material is CaBaCo₄O₇、Ba_0.5Sr_1.5Co₂Fe₁₁AlO₂₂、Ba_0.5Sr_1.5Zn₂(Fe_0.92Al_0.08)₁₂O₂₂、BaFe_10.4Sc_1.6O₁₉、GaFeO₃Or Tb₂(MoO₄)₃。

According to the logic device of the present invention, preferably, the ferromagnetic layer of the ferromagnetic/ferroelectric composite material is Tb_(1-x)Dy_xFe_2-y(0≤x≤1,y≤0.06)、SmFe₂、Tb(CoFe)₂、Tb(NiFe)₂、TbFe₃、Pr₂Co₁₇、Ni_1-xCo_x(0≤x≤1)、Ni_1-xFe_x(0≤x≤1)、Fe_1-xCo_x(0≤x≤1)、FeAl、FeCoV、FeGa、FeGaB、CoFeB、Fe₈₀B₁₅Si₅、Fe₆₆Co₁₂B₁₄Si₈、Fe₃O₄、CoFe₂O₄Or NiFe₂O₄And the ferroelectric layer of the ferromagnetic/ferroelectric composite material is (1-x) Pb (Mg)_1/3Nb_2/3)O₃–xPbTiO₃(0≤x≤1)、(1-x)Pb(Zn_1/3Nb_2/3)O₃–xPbTiO₃(0≤x≤1)、Pb(Zr_1-xTi_x)O₃(0≤x≤1)、(Ba_1-xSr_x)TiO₃(0≤x≤1)、BiFeO₃、LiNbO₃、SrBi₂Ta₂O₉、Ba_xSr_1-xNb₁₀O₃₀(0≤x≤1)、Ba₂NaNb₅O₁₅Potassium dihydrogen phosphate (KDP), polyvinylidene fluoride (PVDF), PMN-PT, polytrifluoroethylene (PTrFE), polyvinylidene fluoride, copolymers of polytrifluoroethylene, polyurethane or odd-numbered nylons.

According to the logic device, preferably, the memristor is a FeGa/PMN-PT/FeGa three-layer heterojunction.

In another aspect, the present invention also provides a logic control method of a logic device according to the present invention, which includes:

adjusting an electric polarization direction and a magnetic moment direction of the at least one memristor to a determined direction;

taking the electric polarization direction as a variable W, wherein the electric polarization direction comprises a first electric polarization direction and a second electric polarization direction which are opposite, a first state of the variable W represents the first electric polarization direction, and a second state of the variable W represents the second electric polarization direction;

taking the respective potentials at two ends of the at least one memory coupler as variables A and B respectively, wherein the first state of the variable A or the variable B represents a potential V_thA/2, wherein the second state of the variable A or the variable B represents a potential-V_th/2，V_thThe voltage required for the electric polarization direction of the at least one memristor is reversed;

taking the phase relation between the phase angle α of the alternating-current magnetic field and the phase angle β of the phase-locked amplifier as a variable C, wherein the first state of the variable C represents α - β, and the second state of the variable C represents α - β + pi;

the variable W, the variable A, the variable B and the variable C are used as input quantities of logic operation to carry out logic control.

According to the logic control method of the present invention, preferably, the first electric polarization direction is upward, and the second electric polarization direction is downward.

According to the logic control method of the present invention, it is preferable that the logic control is performed by changing the state of any two or more of the variable W, the variable a, the variable B, and the variable C.

According to the logic control method of the present invention, preferably, the first state and the second state of the variable W, the variable a, the variable B, or the variable C are 0 and 1, respectively.

Compared with the prior art, the logic device has the advantages of simple structure, high storage density, high writing and reading speed and low energy consumption.

Drawings

Embodiments of the invention are further described below with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram of a structure of a memristor;

FIG. 2 illustrates electrical polarization and magnetization directions of a memristor according to an embodiment of the present disclosure;

fig. 3 (a) shows a schematic structure of a logic device and information writing and reading manners according to an embodiment of the present invention;

fig. 3(b) and (c) show the variation of the magnetoelectric coupling voltage with the applied magnetic field when the external dc magnetic field is fixed (i.e., the magnetic moment M is fixed), α and β are in phase and in reverse phase, respectively;

fig. 4 (a) illustrates an operation method of a logic state;

fig. 4 (b) lists the physical meanings represented by the four variables (W, A, B and C) in the example shown in fig. 4 (a);

fig. 4 (c) lists variables selected as input values by the logical operation in 16;

FIG. 5 illustrates an implementation method of NOR operation;

FIG. 6 illustrates an implementation of an Identity operation;

FIG. 7 illustrates an implementation of the transfer (p) operation; and

FIG. 8 shows completion

An implementation method of the operation.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail by embodiments with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The nonlinear memcoupler (abbreviated as a memcoupler) is a device for realizing direct conversion of charges and magnetic flux by utilizing a magnetoelectric coupling effect, and can be used as a fourth basic circuit element. Referring to the structural schematic diagram of the memristor shown in fig. 1, the memristor comprises an intermediate layer and parallel electrode layers positioned on two sides of the intermediate layer, and the intermediate layer is made of a magnetoelectric coupling dielectric material with a butterfly-shaped nonlinear hysteresis curve.

The intermediate layer of the memory coupler can be a single-phase magnetoelectric coupling material or a ferromagnetic/ferroelectric composite material. Single-phase magnetoelectric coupling materials such as CaBaCo₄O₇、Ba_0.5Sr_1.5Co₂Fe₁₁AlO₂₂、Ba_0.5Sr_1.5Zn₂(Fe_0.92Al_0.08)₁₂O₂₂、BaFe_10.4Sc_1.6O₁₉、GaFeO₃Or Tb₂(MoO₄)₃. Ferromagnetic layers of ferromagnetic/ferroelectric composite material, e.g. Tb_(1-x)Dy_xFe_2-y(0≤x≤1,y≤0.06)、SmFe₂、Tb(CoFe)₂、Tb(NiFe)₂、TbFe₃、Pr₂Co₁₇、Ni_1-xCo_x(0≤x≤1)、Ni_1-xFe_x(0≤x≤1)、Fe_1-xCo_x(0≤x≤1)、FeAl、FeCoV、FeGaB、CoFeB、Fe₈₀B₁₅Si₅、Fe₆₆Co₁₂B₁₄Si₈、Fe₃O₄、CoFe₂O₄Or NiFe₂O₄Ferroelectric layers such as (1-x) Pb (Mg)_1/3Nb_2/3)O₃–xPbTiO₃(0≤x≤1)、(1-x)Pb(Zn_{1/ 3}Nb_2/3)O₃–xPbTiO₃(0≤x≤1)、Pb(Zr_1-xTi_x)O₃(0≤x≤1)、(Ba_1-xSr_x)TiO₃(0≤x≤1)、BiFeO₃、LiNbO₃、SrBi₂Ta₂O₉、Ba_xSr_1-xNb₁₀O₃₀(0≤x≤1)、Ba₂NaNb₅O₁₅Potassium dihydrogen phosphate (KDP), polyvinylidene fluoride (PVDF), polytrifluoroethylene (PTrFE), polyvinylidene fluoride, copolymers of polytrifluoroethylene, polyurethane, or odd-numbered nylon.

Nonlinear response behavior (charge-flux) of a memcoupler

Relation) shows a butterfly-shaped nonlinear hysteresis behavior, and the change of the magnetic moment M along with the applied electric field E (or the voltage V) corresponds to the butterfly-shaped nonlinear hysteresis curve. In this case, the magnetoelectric coupling coefficient γ ═ dM/dE, that is, the slope of the M-E curve, may be positive or negative, and switches between positive and negative with a change in voltage. Therefore, positive γ can be defined as data 0, and negative γ can be defined as data 1. At a low voltage, γ is positive (data 0), and when the applied voltage is sufficiently large, the magnetocoupling coefficient changes from positive to negative (data 1), and thereafter, γ remains negative (data 1) even if the applied voltage is removed, i.e., it has non-volatility. To rewrite data 0, only a high voltage in the reverse direction needs to be applied so that γ transitions from negative to positive (data 0), and γ remains positive (data 0) even after the voltage is removed. Thus, the memcoupler may be used as an information store and implement non-volatile storage.

The invention sets corresponding parts on the basis of the memory coupler, and realizes a novel logic device. The logic device of the present invention is described below by way of specific examples.

According to one embodiment of the invention, a FeGa/PMN-PT/FeGa three-layer heterojunction is adopted, wherein a PMN-PT single crystal substrate is used as a ferroelectric layer of the device and has the size of 5 x 1 x 0.2mm³And respectively sputtering FeGa films with the thickness of 500nm on the upper surface and the lower surface of the PMN-PT by adopting a magnetron sputtering method, wherein the two FeGa films are used as ferromagnetic layers of the device. Since FeGa has good conductivity, it also serves as an electrode of a logic device.

The PMN-PT ferroelectric is pre-polarized for 45 minutes under an electric field of 4kV/cm, a direct-current magnetic field of 3000Oe is applied to the whole memory coupler in the in-plane direction, then the direct-current magnetic field is reduced to zero, and the subsequent operations are all carried out in a zero-external direct-current magnetic field. The electric polarization and magnetization direction of this memristor are shown in FIG. 2. The purpose of this step is to adjust the direction of electric polarization P and the direction of magnetic moment M of the memory coupler to definite direction, because the signal of memory coupler is positive or negative and electric polarization P and magnetic moment M are concerned, this step fixes the direction of magnetic moment M in a certain direction through the method of applying 3000Oe direct current magnetic field, and the operation that follows only changes the direction of electric polarization P, and magnetic moment M no longer changes. Only on the basis of such an initialization can subsequent logic control take place.

The schematic structure of the logic device of the present embodiment and the manner of writing and reading information are shown in FIG. 3 (a), the logic device includes a memristor array, a read coil for providing an alternating magnetic field to the memristor array, a direct current power supply for applying a voltage to the memristor array, and a lock-in amplifier for reading a magnetoelectrically coupled voltage, it is well known to those skilled in the art that the difference between the potentials is referred to as the voltage, and the voltage applied to the sample divided by the thickness of the sample is the electric field, thus the terms "potential", "voltage", and "electric field" appearing in the present invention are all applied by the direct current power supply, a small alternating magnetic field is generated by the read coil, the phase angle of the alternating magnetic field is α, it is well known to those skilled in the art that the phase angle α and the frequency of the alternating magnetic field coincide with the phase angle and frequency of the alternating current power supply of the read coil, the phase angle α of the alternating magnetic field can be changed by adjusting the alternating current power supply, the above-described memristor array is placed in the alternating current magnetic field so that an alternating signal is generated across the memristor an alternating current power supply is applied to cause the electromagnetic field to be changed by the electromagnetic-applied-read-the electromagnetic-read amplifier, the electromagnetic-read-information-by the way of the electromagnetic-read-write-read-by the electromagnetic-read amplifier, which is schematically illustrated by the electromagnetic-write-by-coupled voltage-applied-read-by-applied-coupled voltage-by-applied-coupled voltage-applied.

When the external dc magnetic field is fixed (i.e., the magnetic moment M is fixed), the sign of the signal can be changed by applying a pulsed electric field or changing α and β from the same phase to a phase difference of pi, as shown in fig. 3(b) and (c), where H is_dcIndicating the applied DC magnetic field, V_MERepresenting the magneto-electric coupling voltage. It can be seen from the figure that under the condition of zero DC external magnetic field, the magnetoelectric coupling voltage values are all larger, so that in the invention, under the condition of zero external DC magnetic fieldα and β are kept in phase during operation, when the external magnetic field is positive (magnetic moment M is right), the direction of electric polarization of the sample is upward (circular dotted line) by applying a voltage to the sample, the voltage of magnetoelectric coupling is positive, when a voltage in the opposite direction is applied, the direction of electric polarization of the device is downward (square dotted line), the sign of the voltage of magnetoelectric coupling is reversed and becomes negative, when the magnetic moment of the device is not changed (right), α and β are kept in phase difference during operation, which is completely opposite to the case shown in fig. 3(b), the direction of magnetic moment is kept unchanged (right), when the direction of electric polarization of the device is upward (circular dotted line), the voltage of magnetoelectric coupling is negative, when the direction of electric polarization of the device is downward (square dotted line), the voltage of magnetoelectric coupling is positive.

Fig. 4 (a) shows an operation method of a logic state according to an embodiment of the present invention, which is divided into three steps. The first step is initialization, the initialized state is defined as variable W, and the memristor electric polarization P corresponds to W1 and W0 up and down, respectively. The second step is a writing process, and the electric potential generated by the direct current power supply at two ends of the memory coupler is defined as variables A and B, wherein A and B can be V_th[ 2 ] and-V_th/2, corresponding to "1" and "0" in the logical operation, respectively, where V_thThe voltage required to memorize the reversal of the direction of the electric polarization P of the coupler is 80V in this embodiment; according to other embodiments of the invention, V of A and B may also be used_th[ 2 ] and-V_thThe phase angles of the alternating current magnetic field and the phase lock are α and β respectively, a fourth variable C is defined, C1 and C0 correspond to α - β and α - β + pi respectively, C1 and C0 correspond to α - β + pi and α - β respectively, according to other embodiments of the invention, (B) in FIG. 4 lists the physical meanings represented by the four variables (W, A, B and C) of one embodiment of the invention, A and B represent the potentials at two ends of the memory coupler, and when A is B, the potential difference at two ends of the memory coupler is 0, the memory coupler does not represent that the memory coupler is provided with a phase lock, and the phase angles of the alternating current magnetic field and the phase lock are α and β respectivelyThe device is acted by an external electric field; when A is not equal to B, the potential difference between two ends of the memory coupler is not 0 (is +80V or-80V, and the corresponding electric field intensity is +4kV/cm or-4 kV/cm), and at the moment, the state of the memory coupler is possibly changed under the action of an electric field. When a certain logical operation is performed, the four variables are used as input amounts for the logical operation, and preferably, two of the four variables are selected as input amounts for the logical operation, and the other two are fixed values. The finally read magnetoelectric coupling voltage is the result of the logic operation, and according to an embodiment of the present invention, the operation result is "1" when the magnetoelectric coupling voltage is a positive value, and the operation result is "0" when the magnetoelectric coupling voltage is a negative value. Fig. 4 (c) lists variables selected as input values by 16 logical operations, where p and q represent input values of arbitrary states, which may be 0, 1,

andthe complementary value representing the input value is the negation operation in the logic operation. Is a basic operation in a logical operation.

To aid in understanding the invention, the following are logical NOR, Identity, Transfer (p) and completion

Further description is made for the purpose of example.

Fig. 5 shows an implementation method of NOR operation. Four variables W, A, B, C are defined as p, 0, q, 0, respectively, p and q being input quantities of the logical operation. For NOR, the output amount is "1" only when the input amounts are all "0" (as shown in fig. 5 (b)). When P is 0 and q is 0, W is 0 and represents that the direction of the electric polarization P of the memristor is downward as shown in (c) of fig. 5, the magnetoelectric coupling voltage of the memristor is negative and maximum, and a is B is 0 (that is, the electric potentials at the two ends of the memristor are both-V)_th/2), but since C is 0 (i.e., α is β + pi), the resulting output magnetoelectric coupling voltage is a positive maximum value when p is 1 and q is 0As shown in fig. 5 (d), the magnetoelectric coupling voltage after initialization is a positive maximum value, and a is 0, but since C is 0, the magnetoelectric coupling voltage that is finally output is a negative maximum value. When p is 0 and q is 1, the magnetoelectric coupling voltage after initialization is a negative maximum value, and a is 0 and B is 1, that is, the potentials applied to both ends of the memristor are-V respectively, as shown in (e) of fig. 5_thV and 2_thIn this example, the electric field in the memristor is-4 kV/cm, but since C is 0, the final output magnetoelectric coupling voltage is a negative maximum. When p is 1 and q is 1, as shown in (f) of fig. 5, the magnetoelectric coupling voltage after initialization is a positive maximum value, and a is 0 and B is 1, so that the electric field applied to the device is-4 kV/cm, but since C is 0, the finally output magnetoelectric coupling voltage is a negative maximum value. To this end, a NOR operation is realized in the device.

Fig. 6 illustrates an implementation method of the Identity operation. Four variables W, A, B, C are defined as p, q, p, and p and q are input quantities of the logical operation, respectively. For Identity, the output quantity is always "1" regardless of the value of the input quantity (as shown in fig. 6 (b)). When P is 0 and q is 0, W is 0 and represents that the direction of the electric polarization P of the memristor is downward as shown in (c) of fig. 6, the magnetoelectric coupling voltage of the memristor is negative and maximum, and a is B is 0 (that is, the electric potentials at the two ends of the memristor are both-V)_thWhen p is 0 and q is 1, the final output magnetoelectric coupling voltage is a negative maximum value as shown in (e) of fig. 6, and a B is 1, that is, the potential applied to both ends of the coupler is 0, but since C is 0, the final output magnetoelectric coupling voltage is a positive maximum value, when p is 0 and q is 1, the final output magnetoelectric coupling voltage is a positive maximum value as shown in (e) of fig. 6, the final output magnetoelectric coupling voltage is a positive maximum value as shown in (f) of fig. 6, and a is 1, B is 0, that is, the potential applied to both ends of the coupler, but since q is 0, the final output magnetoelectric coupling voltage is a positive maximum value as shown in (f) of fig. 6, the final output magnetoelectric coupling voltage is a positive maximum value as shown in which the final output magnetoelectric coupling voltage is achieved due to the application of C, the final output of the positive maximum value of the electric field is y applied to the final output voltage of the final output of the magnetoelectric coupling voltage, which is equal to the positive maximum value of the operation of the final output of the magnetoelectric coupling voltage of the device, as shown in (y) of fig. 6。

Fig. 7 shows an implementation of the transfer (p) operation. Four variables W, A, B, C are defined as q, 0, 1, p, and q as input quantities for logical operations, respectively. For transfer (p), the output is always p regardless of the value of q (as shown in fig. 7 (b)). When P is 0 and q is 0, as shown in (c) of fig. 7, W is 0 and represents that the direction of the electric polarization P of the memristor is downward, the magnetoelectric coupling voltage of the memristor is at the negative maximum, a is 0, B is 1, that is, the electric potentials applied to the two ends of the memristor are respectively-V_thV and 2_thIn this example, the electric field in the memristor is-4 kV/cm, the magnetoelectric coupling voltage is a positive maximum after application of-4 kV/cm, but since C is 0 (i.e., α is β + pi), the finally output magnetoelectric coupling voltage is a negative maximum value when p is 1 and q is 0, as shown in fig. 7 (d), the magnetoelectric coupling voltage after initialization is a negative maximum value, and a is 0 and B is 1, i.e., the potentials applied to both ends of the memristor are-V, respectively_thV and 2_thIn this example, the electric field in the memristor is-4 kV/cm, the magnetoelectric coupling voltage is a positive maximum after the application of-4 kV/cm, and the finally output magnetoelectric coupling voltage is a positive maximum because C is 1. When p is 0 and q is 1, as shown in fig. 7 (e), the magnetoelectric coupling voltage after initialization is a positive maximum value, and a is 0 and B is 1, that is, the potentials applied to both ends of the memristor are-V respectively_thV and 2_thIn this example, the electric field in the memristor is-4 kV/cm, but since C is 0, the final output magnetoelectric coupling voltage is a negative maximum. When p is 1 and q is 1, as shown in (f) of fig. 7, the magnetoelectric coupling voltage after initialization is a positive maximum value, and a is 0 and B is 1, so that the electric field applied to the device is-4 kV/cm, and since C is 1, the magnetoelectric coupling voltage finally output is a positive maximum value. Thus, transfer (p) operation is realized in the device.

FIG. 8 shows a completion

An implementation method of the operation. Four variables W, A, B, C are defined as q, 1, 0, p, and q as input quantities for logical operations, respectively. For completionThe output is independent of q, and is 0 when p is 1, and is 1 when p is 0 (see (b) in fig. 8). When P is 0 and q is 0, as shown in (c) of fig. 8, W is 0 and represents that the direction of the electric polarization P of the memristor is downward, the magnetoelectric coupling voltage of the memristor is at the negative maximum, a is 1, and B is 0, that is, the electric potentials applied to two ends of the memristor are respectively V_th[ 2 ] and-V_thIn this example, the electric field in the memristor is 4kV/cm, the magnetoelectric coupling voltage is still at a negative maximum after 4kV/cm is applied, but since C is 0 (i.e., α is β + pi), the finally output magnetoelectric coupling voltage is at a positive maximum value when p is 1 and q is 0, as shown in (d) of fig. 8, the magnetoelectric coupling voltage after initialization is at a negative maximum value, and a is 1 and B is 0, i.e., the potentials applied to the two ends of the memristor are V and V, respectively_th[ 2 ] and-V_thIn this example, the electric field in the memristor is 4kV/cm, and the magnetoelectric coupling voltage is still at a negative maximum after 4kV/cm is applied, but since C is 1, the finally output magnetoelectric coupling voltage is at a negative maximum. When p is 0 and q is 1, as shown in (e) of fig. 8, the magnetoelectric coupling voltage after initialization is a positive maximum value, and a is 1 and B is 0, that is, the potentials applied to both ends of the memristor are V respectively_th[ 2 ] and-V_thIn this example, the electric field in the memristor is 4kV/cm, but since C is 0, the finally output magnetoelectric coupling voltage is a positive maximum value. When p is 1 and q is 1, as shown in (f) of fig. 8, the magnetoelectric coupling voltage after initialization is a positive maximum value, and a is 1 and B is 0, so that the electric field applied to the device is 4kV/cm, but since C is 1, the magnetoelectric coupling voltage finally output is a negative maximum value. To this end, completion is implemented in a device

And (5) operating.

Those skilled in the art will appreciate that the direction of electrical polarization need not be up and down, as long as the two electrical polarization directions are opposite. In addition, the logical operators need not be 0 and 1, and logical operators capable of representing different states, which are well known in the art, can be applied to the present invention.

According to other embodiments of the invention, at least one memory coupler is adopted for reading and writing information and carrying out logic operation.

Although the present invention has been described by way of preferred embodiments, the present invention is not limited to the embodiments described herein, and various changes and modifications may be made without departing from the scope of the present invention.