阅读说明：本技术 转位反馈场效应电子器件及利用其的排列电路 (Transposition feedback field effect electronic device and arrangement circuit using same ) 是由 金相植 赵庚娥 赵鎭先 任斗赫 禹率娥 于 2018-11-06 设计创作，主要内容包括：本发明公开转位反馈场效应电子器件及利用其的排列电路。根据本发明的一实施例,本发明包括二极管结构体、多个栅极及多个接近电子器件,当上述二极管结构体通过上述多个栅极中的第一栅极和上述多个接近电子器件中的第一接近电子器件接收电压时执行第一方向接近,当通过上述多个栅极中的第二栅极和上述多个接近电子器件中的第二接近电子器件接收电压时执行第二方向接近。(The invention discloses an index feedback field effect electronic device and an arrangement circuit using the same. According to an embodiment of the present invention, the present invention includes a diode structure, a plurality of gates, and a plurality of proximity electronic devices, wherein a first direction proximity is performed when the diode structure receives a voltage through a first gate of the plurality of gates and a first proximity electronic device of the plurality of proximity electronic devices, and a second direction proximity is performed when the diode structure receives a voltage through a second gate of the plurality of gates and a second proximity electronic device of the plurality of proximity electronic devices.)

1. A feedback field effect electronic device characterized in that,

comprises a diode structure, a plurality of grid electrodes and a plurality of proximity electronic devices,

the diode structure performs a first direction approach when receiving a voltage through a first gate of the plurality of gates and a first proximity electronic device of the plurality of proximity electronic devices, and performs a second direction approach when receiving a voltage through a second gate of the plurality of gates and a second proximity electronic device of the plurality of proximity electronic devices.

2. The feedback field effect electronic device according to claim 1,

the diode structure includes a first conductive type region, a second conductive type region, an inner region disposed between the first conductive type region and the second conductive type region, and a barrier region disposed between the inner region and the second conductive type region,

the first gate is disposed around the inner region,

the second gate electrode is electrically insulated from the first gate electrode and faces the first gate electrode with reference to the intrinsic region,

the first conductivity type region is connected to a drain of the first proximity electronic device so as to control the first direction proximity, and is connected to a drain of the second proximity electronic device so as to control the second direction proximity.

3. The feedback field effect electronic device of claim 2 wherein said first gate is connected to a first wordline, said second gate is connected to a second wordline, said first proximity electronic device gate is connected to a third wordline, and said second proximity electronic device gate is connected to a fourth wordline.

4. The feedback field effect electronic device according to claim 3,

the first direction approach is performed when a voltage pulse is applied to the first word line and the third word line,

the second direction approach is performed when a voltage pulse is applied to the second word line and the fourth word line.

5. The feedback field effect electronic device as claimed in claim 4, wherein data in one of a first logic state and a second logic state is stored based on a magnitude of a bit line voltage applied through the second conductivity type region when a voltage pulse is simultaneously applied to the first gate and the gate of the first proximity electronic device through the first word line and the third word line.

6. The feedback field effect electronic device according to claim 4, wherein when the first proximity electronic device applies a bit line voltage pulse to the gate of the first proximity electronic device through the second conductivity type region and applies a voltage pulse to the gate of the first proximity electronic device through the third word line, a current related to a data state of the internal region is outputted from the internal region through the first source line.

7. The feedback field effect electronic device according to claim 2,

doping the first conductivity type region and the barrier region with an n-type impurity, doping the second conductivity type region with a p-type impurity,

the first direction approach corresponds to a row direction approach with reference to the diode structure, and the second direction approach corresponds to a column direction approach with reference to the diode structure.

8. The feedback field effect electronic device of claim 2, further comprising:

a first gate insulating film disposed between the first gate and the intrinsic region; and

and a second gate insulating film disposed between the second gate and the intrinsic region.

9. An arrangement circuit, characterized in that,

the method comprises the following steps:

a plurality of feedback field effect electronic devices each including a diode structure, a first gate and a second gate, a first proximity electronic device and a second proximity electronic device;

a first neuron device connected to the plurality of feedback field effect electronic devices in a first direction; and

a second neural element connected in a second direction to the plurality of feedback field effect electronic elements,

the plurality of feedback field effect electronic devices store data of a first logic state between the first combustion time and the second combustion time when a first combustion time of the first neuron device is faster than a second combustion time of the second neuron device, and store data of a second logic state between the first combustion time and the second combustion time when the second combustion time is faster than the first combustion time.

10. The permutation circuit of claim 9,

the burning of the first neuron element device applies a bit line voltage pulse to the diode structure, applies a third voltage pulse via a third word line connected to the gate of the first proximity electronic device,

the burning of the second neural component applies a first voltage pulse via a first word line connected to the first gate.

11. The permutation circuit of claim 9,

the first voltage pulse and the third voltage pulse have the same pulse width,

the plurality of feedback field effect electronic devices store data of the second logic state when the third voltage pulse is applied after the first voltage pulse is applied,

the plurality of feedback field effect electronic devices store data of the first logic state when the first voltage pulse is applied after the third voltage pulse is applied.

12. The permutation circuit of claim 10,

a first feedback field effect electronic device of the plurality of feedback field effect electronic devices is connected to a second feedback field effect electronic device along the first direction, receives the first voltage pulse after receiving the third voltage pulse in accordance with combustion of the first neuron device, and stores the first logic state data,

the second feedback field effect electronic device receives the third voltage pulse after receiving the first voltage pulse in accordance with the combustion of the first neuron device, and stores the second logic state data.

13. The arrangement circuit of claim 12, wherein the act of reading row direction data is performed based on a current output via a first source line of a first proximity electronic device coupled to the first feedback field effect electronic device and a current output via a second source line of the first proximity electronic device coupled to the second feedback field effect electronic device.

14. The permutation circuit of claim 9,

the burning of the first neuron element device applies a bit line voltage pulse to the diode structure, applies a fourth voltage pulse via a fourth word line connected to the gate of the second proximity electronic device,

the burning of the second neural component applies a second voltage pulse via a second word line connected to the second gate.

15. The permutation circuit of claim 14,

a second feedback field effect electronic device of the plurality of feedback field effect electronic devices is connected to a third feedback field effect electronic device along the second direction, receives a fourth voltage pulse to store the second logic state data after receiving the second voltage pulse in accordance with the combustion of the first neuron device,

the third feedback field effect electronic device receives the second voltage pulse after receiving the fourth voltage pulse, and stores the first logic state data.

16. The arrangement circuit according to claim 15, wherein the act of reading column direction data is performed based on a current output through a third source line of a second proximity electronic device connected to the first feedback field effect electronic device and a current output through a fourth source line of the second proximity electronic device connected to the third feedback field effect electronic device.

Technical Field

The present invention relates to an inversion feedback field effect electronic device that is used as a synapse arrangement device and, more particularly, to an inversion feedback field effect electronic device that controls the proximity in a row (row) direction and a column (column) direction by connecting two proximity transistors to a feedback field-effect transistor using two independent gates, and an arrangement circuit using the same.

Background

As a technique for simulating a human neural structure into an electronic device or a circuit, there is a Neuromorphic (Neuromorphic) technique.

A conventional von neumann computer exhibits a fast operation speed in sequential mathematical computation, but exhibits a limitation on the speed of simultaneous computation of multiple inputs and outputs and power consumption.

Spiking neural network (spiking neural network) technology among various neuromorphic technologies imitates the effects of brain neural networks and brain waves to embody more exquisite thinking ability.

In order to embody the neurons and synapses of such spiking neural networks as electronic devices, in particular, research is being conducted worldwide in which synapses acting as memories and learning of the brain are embodied by electronic devices.

Synapse mimic devices require two-party parallel action, synapse plasticity, low power, and high integration.

Conventional memory devices are not capable of bidirectional parallel operation and hardly exhibit synaptic plasticity, and therefore, memory devices having a plurality of devices and structures such as a resistive random access memory (ReRAM), a Phase Change Memory (PCM), and a conductive bridge memory (CBRAM) have been proposed.

However, the above-mentioned memory device cannot use a conventional complementary metal-Oxide-Semiconductor (CMOS) process, so that the uniformity and stability of the device are reduced, and the device cannot be used in real life due to a complicated process.

In contrast, an 8T-SRAM that exhibits bidirectional parallel operation and outstanding plasticity using a conventional cmos process has been proposed, and an additional circuit is required to exhibit synaptic plasticity using eight transistors in one memory cell, thereby exhibiting a limitation in integration.

Therefore, development of a protruding dummy device satisfying the bidirectional parallel operation, synaptic plasticity, low power, and high integration characteristics by the cmos process is required.

In the case of a memory device driven by a feedback loop (feedback loop) memory scheme, it is applicable to a silicon channel-based cmos process and exhibits excellent switching characteristics and low operating voltage characteristics.

However, there is a limitation that bidirectional parallel operation and outstanding flexibility cannot be realized only by a memory device based on a feedback loop memory scheme, and currently, there is no technology in which a memory device based on a feedback loop memory scheme is connected to a proximity transistor to realize bidirectional parallel operation.

Moreover, the device can be used as a highly integrated synapse arrangement device as long as the protruding plasticity is embodied in the protruding mimic device unit.

Disclosure of Invention

The purpose of the present invention is to achieve inversion (transposable) in an array circuit by bringing the row direction and the column direction close to each other using two independent gates and two proximity transistors.

The invention provides a feedback field effect electronic device which simultaneously provides bidirectional parallel operation, low power and high integration characteristics.

The purpose of the present invention is to provide a feedback field effect electronic device which is manufactured by using a complementary metal oxide semiconductor process and can utilize a spiking neural network.

The invention aims to embody a synapse mimic device by utilizing a feedback field effect electronic device corresponding to a memory device based on a feedback loop (feedback loop) memory mechanism, thereby improving the integration level of the synapse mimic device.

The invention aims to provide a method for realizing bidirectional parallel operation by using a plurality of proximity transistors, and simultaneously calculating multiple input values and output values quickly and reducing power consumption.

The present invention provides a feedback field effect electronic device which embodies a protruding plasticity in a feedback field effect electronic device corresponding to a protruding imitation device, thereby reducing a calculation delay time to execute ultra-high speed learning.

The present invention aims to provide a feedback field effect electronic device utilizing hysteresis of a feedback loop memory mechanism.

According to an embodiment of the present invention, a feedback field effect electronic device includes a diode structure, a plurality of gates, and a plurality of proximity electronic devices, a first direction proximity is performed when the diode structure receives a voltage through a first gate of the plurality of gates and a first proximity electronic device of the plurality of proximity electronic devices, and a second direction proximity is performed when the diode structure receives a voltage through a second gate of the plurality of gates and a second proximity electronic device of the plurality of proximity electronic devices.

According to an embodiment of the present invention, the diode structure includes a first conductivity type region, a second conductivity type region, an intrinsic region and a blocking region, the intrinsic region is disposed between the first conductivity type region and the second conductivity type region, the blocking region is disposed between the intrinsic region and the second conductivity type region, the first gate is disposed in a periphery of the intrinsic region, the second gate is electrically insulated from the first gate, faces the first gate with reference to the intrinsic region, the first conductivity type region is connected to a drain of the first proximity electronic device so as to control the proximity in the first direction, and is connected to a drain of the second proximity electronic device so as to control the proximity in the second direction.

According to an embodiment of the present invention, the first gate is connected to a first word line, the second gate is connected to a second word line, the gate of the first proximity electronic device is connected to a third word line, and the gate of the second proximity electronic device is connected to a fourth word line.

According to an embodiment of the present invention, the first direction approach is performed when a voltage pulse is applied to the first word line and the third word line, and the second direction approach is performed when a voltage pulse is applied to the second word line and the fourth word line.

According to an embodiment of the present invention, when a voltage pulse is simultaneously applied to the first gate and the gate of the first proximity electronic device through the first word line and the third word line, data in one of a first logic state and a second logic state is stored based on a magnitude of a bit line voltage applied through the second conductive type region.

According to an embodiment of the present invention, when the first proximity electronic device applies a bit line voltage pulse through the second conductivity type region and a voltage pulse to the gate of the first proximity electronic device through the third word line, a current related to a data state of the intrinsic region is output from the intrinsic region through the first source line.

According to an embodiment of the present invention, the first conductivity type region and the barrier region are doped with an n-type impurity, and the second conductivity type region is doped with a p-type impurity, wherein the first direction approach corresponds to a row direction approach with reference to the diode structure, and the second direction approach corresponds to a column direction approach with reference to the diode structure.

According to an embodiment of the invention, the feedback field effect electronic device further comprises: a first gate insulating film disposed between the first gate and the intrinsic region; and a second gate insulating film disposed between the second gate and the intrinsic region.

According to an embodiment of the present invention, the permutation circuit includes: a plurality of feedback field effect electronic devices each including a diode structure, a first gate and a second gate, a first proximity electronic device and a second proximity electronic device; a first neuron device connected to the plurality of feedback field effect electronic devices in a first direction; and a second neural component connected in a second direction to the plurality of feedback field effect electronic components, wherein when a first combustion time of the first neural component is faster than a second combustion time of the second neural component, the plurality of feedback field effect electronic components store data of a first logic state between the first combustion time and the second combustion time, and when the second combustion time is faster than the first combustion time, the plurality of feedback field effect electronic components store data of a second logic state between the first combustion time and the second combustion time.

According to an embodiment of the present invention, the burning of the first neuron element applies a bit line voltage pulse to the diode structure, a third voltage pulse is applied via a third word line connected to a gate of the first proximity electronic element, and the burning of the second neuron element applies a first voltage pulse via a first word line connected to the first gate.

According to an embodiment of the present invention, the first voltage pulse and the third voltage pulse have the same pulse width, and the plurality of feedback field effect electronic devices store data of the second logic state when the third voltage pulse is applied after the first voltage pulse is applied, and store data of the first logic state when the first voltage pulse is applied after the third voltage pulse is applied.

According to an embodiment of the present invention, in the plurality of feedback field effect electronic devices, a first feedback field effect electronic device is connected to a second feedback field effect electronic device along the first direction, and the first feedback field effect electronic device receives the first voltage pulse after receiving the third voltage pulse to store the first logic state data in accordance with the combustion of the first neuron device, and the second feedback field effect electronic device receives the third voltage pulse after receiving the first voltage pulse to store the second logic state data in accordance with the combustion of the first neuron device.

According to an embodiment of the present invention, the act of reading the row direction data is performed based on a current output through a first source line of a first proximity electronic device connected to the first feedback field effect electronic device and a current output through a second source line of the first proximity electronic device connected to the second feedback field effect electronic device.

According to an embodiment of the present invention, the burning of the first neuron element applies a bit line voltage pulse to the diode structure, a fourth voltage pulse is applied via a fourth word line connected to a gate of the second proximity electronic element, and the burning of the second neuron element applies a second voltage pulse via a second word line connected to the second gate.

According to an embodiment of the present invention, in the plurality of feedback field effect electronic devices, a second feedback field effect electronic device is connected to a third feedback field effect electronic device along the second direction, and receives a fourth voltage pulse to store the second logic state data after receiving the second voltage pulse according to the combustion of the first neuron device, and the third feedback field effect electronic device receives the second voltage pulse to store the first logic state data after receiving the fourth voltage pulse.

According to an embodiment of the present invention, the operation of reading the column direction data is performed based on a current output through a third source line of a second proximity electronic device connected to the first feedback field effect electronic device and a current output through a fourth source line of the second proximity electronic device connected to the third feedback field effect electronic device.

The present invention utilizes two independent gates and two proximity transistors to achieve the indexing in the alignment circuit to bring the row and column directions into proximity.

The invention provides a feedback field effect electronic device which simultaneously provides bidirectional parallel operation, low power and high integration characteristics.

The invention provides a feedback field effect electronic device which is manufactured by using a complementary metal oxide semiconductor process and can utilize a spiking neural network.

The invention utilizes a feedback field effect electronic device corresponding to a storage device based on a feedback loop (feedback loop) storage mechanism to embody a synapse mimic device, thereby improving the integration level of the synapse mimic device.

The invention provides a method for realizing bidirectional parallel operation by using a plurality of proximity transistors, simultaneously calculating multiple input values and output values quickly and reducing power consumption.

The present invention provides a feedback field effect electronic device which embodies a protruding plasticity in a feedback field effect electronic device corresponding to a protruding mimic device, thereby reducing a calculation delay time to perform ultra-high speed learning.

The present invention provides a feedback field effect electronic device utilizing hysteresis of a feedback loop memory mechanism.

Drawings

Fig. 1a to 1c are diagrams for explaining a diode structure of a feedback field effect electronic device according to an embodiment of the present invention.

Fig. 2a and 2b are diagrams for explaining the structure of a feedback field effect electronic device according to an embodiment of the present invention.

Fig. 3 is a diagram for explaining a graph comparing a plasticity learning mechanism based on a simplified combustion time and a plasticity learning mechanism based on a biological combustion time according to an embodiment of the present invention.

FIG. 4 is a graph illustrating a graph relating to a pulse width modulation method for reduced burn time based plasticity according to an embodiment of the present invention.

Fig. 5 is a diagram illustrating an arrangement circuit according to an embodiment of the present invention.

Fig. 6a and 6b are diagrams illustrating the row direction approach of the feedback field effect electronic device according to an embodiment of the present invention.

Fig. 7a and 7b are diagrams illustrating column-wise proximity of feedback field effect electronic devices according to an embodiment of the present invention.

Description of reference numerals

110: diode structure

112: region of the first conductivity type

114: inner zone

116: barrier region

118: region of the second conductivity type

120: a first grid electrode

121: a first gate insulating film

130: second grid

131: second gate insulating film

200: feedback field effect electronic device

210: diode structure

220: a first grid electrode

230: second grid

240: first proximity electronic device

250: second proximity electronic device

Detailed Description

Hereinafter, embodiments of the present invention will be described with reference to the drawings.