阅读说明：本技术 半导体装置、半导体晶片、存储装置及电子设备 (Semiconductor device, semiconductor wafer, memory device, and electronic apparatus ) 是由 山崎舜平 木村肇 于 2018-06-21 设计创作，主要内容包括：提供一种存储容量大的半导体装置。一种包括第一至第四绝缘体、第一导电体、第二导电体及第一半导体的半导体装置，其中第一半导体包括第一面及第二面。第一导电体的第一侧面在于第一半导体的第一面，第一绝缘体的第一侧面在于第一导电体的第二侧面。第二绝缘体在于包括第一绝缘体的第二侧面及顶面、第一导电体的顶面、第一半导体的第二面的区域。第三绝缘体在于第二绝缘体的形成面，第四绝缘体在于第三绝缘体的形成面。第二导电体在于形成有第四绝缘体的区域中的与第一半导体的第二面重叠的区域。第三绝缘体具有储存电荷的功能。通过对第二导电体供应电位，隔着第二绝缘体在第一半导体的第二面和第三绝缘体之间引起隧道电流。(A semiconductor device having a large storage capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor including a first surface and a second surface. The first side of the first conductor is on the first side of the first semiconductor and the first side of the first insulator is on the second side of the first conductor. The second insulator is in a region including the second side and top surfaces of the first insulator, the top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is on the formation face of the second insulator, and the fourth insulator is on the formation face of the third insulator. The second conductor is located in a region overlapping with the second surface of the first semiconductor in the region where the fourth insulator is formed. The third insulator has a function of storing electric charges. By supplying an electric potential to the second conductor, a tunnel current is induced between the second face of the first semiconductor and the third insulator via the second insulator.)

1. A semiconductor device, comprising: first to fourth insulators, a first conductor, a second conductor, and a first semiconductor,

wherein the first semiconductor comprises a first surface and a second surface,

a first side surface and a second side surface of the first insulator are located in a region overlapping with the first surface of the first semiconductor with the first conductor interposed therebetween,

a first side of the first conductor is located on the first side of the first semiconductor,

the first side of the first insulator is located at the second side of the first conductor,

the second insulator is located in a region including a second side of the first insulator, a top of the first conductor, and the second side of the first semiconductor,

the third insulator is located in a region overlapping with the second face of the first semiconductor among regions where the second insulator is formed,

the fourth insulator is located on a formation surface of the third insulator and in a region overlapping with the first surface of the first semiconductor with the second insulator interposed therebetween,

the second conductor is located in a region overlapping with the second surface of the first semiconductor in a region where the fourth insulator is formed,

the third insulator has a function of storing electric charges,

by supplying a potential to the second conductor, a tunnel current is induced between the second surface of the first semiconductor and the third insulator via a second insulator.

2. A semiconductor device, comprising:

first to fourth insulators, a first conductor, a second conductor, a first semiconductor and a second semiconductor,

wherein the first semiconductor comprises a first surface and a second surface,

a first side surface and a second side surface of the first insulator are located in a region overlapping with the first surface of the first semiconductor with the first conductor interposed therebetween,

a first side of the first conductor is located on the first side of the first semiconductor,

the first side of the first insulator is located at the second side of the first conductor,

the second insulator is located in a region including a second side of the first insulator, a top of the first conductor, and the second side of the first semiconductor,

the third insulator is located in a region overlapping with the second face of the first semiconductor among regions where the second insulator is formed,

the fourth insulator is located on a formation surface of the third insulator and in a region overlapping with the first surface of the first semiconductor with the second insulator interposed therebetween,

the second semiconductor is located in a region overlapping with the second face of the first semiconductor with the fourth insulator interposed therebetween,

the second conductor is located in a region overlapping with the second surface of the first semiconductor, of a region where the second semiconductor is formed and the fourth insulator is formed,

the third insulator has a function of storing electric charges,

by supplying a potential to the second conductor, a tunnel current is induced between the second surface of the first semiconductor and the third insulator via a second insulator.

3. The semiconductor device according to claim 1 or 2,

wherein the third insulator is also located in a region overlapping with the first face of the first semiconductor in a region where the second insulator is formed

And the third insulator is located in a region overlapping with the second insulator and the fourth insulator between them.

4. A semiconductor device, comprising: a first insulator, a second insulator, a fourth insulator, first to third conductors, and a first semiconductor,

wherein the first semiconductor comprises a first surface and a second surface,

a first side surface and a second side surface of the first insulator are located in a region overlapping with the first surface of the first semiconductor with the first conductor interposed therebetween,

a first side of the first conductor is located on the first side of the first semiconductor,

the first side of the first insulator is located at the second side of the first conductor,

the second insulator is located in a region including a second side of the first insulator, a top surface of the first conductor, the second side of the first semiconductor,

the third conductor is located in a region overlapping the second surface of the first semiconductor with the second insulator interposed therebetween,

the fourth insulator is located on a surface on which the third conductor is formed, a region overlapping the second surface of the first semiconductor with the third conductor interposed therebetween in a region on which the second insulator is formed, and a region overlapping the first surface of the first semiconductor with the second insulator interposed therebetween in a region on which the second insulator is formed,

the second conductor is located in a region overlapping with the second surface of the first semiconductor in a region where the fourth insulator is formed,

the third conductor has a function of storing electric charge,

by applying a potential to the second conductor, a tunnel current is caused between the second surface of the first semiconductor and the third conductor via a second insulator.

5. The semiconductor device according to claim 1, wherein the first and second semiconductor layers are formed of a silicon nitride film,

wherein a thickness of the first semiconductor of the second face of the first semiconductor is thinner than a thickness of the first semiconductor of the first face of the first semiconductor.

6. The semiconductor device according to claim 4, comprising a fifth insulator and a fourth conductor,

wherein the fifth insulator is located on a surface of the first semiconductor opposite to the first surface and the second surface,

the fourth conductor is located in a region overlapping the first surface and the second surface of the semiconductor with the fifth insulator interposed therebetween.

7. The semiconductor device according to claim 1, wherein the first and second semiconductor layers are formed of a silicon nitride film,

wherein the first semiconductor comprises a metal oxide,

the oxygen concentration in the vicinity of the second surface and the second surface of the first semiconductor is higher than that in the vicinity of the first surface and the first surface of the first semiconductor.

8. The semiconductor device according to claim 7, wherein the first and second semiconductor layers are stacked,

wherein the first surface and the vicinity of the first surface of the semiconductor include a compound composed of an element included in the first conductor and an element included in the semiconductor.

9. The semiconductor device according to claim 1, wherein the first and second semiconductor layers are formed of a silicon nitride film,

wherein the semiconductor comprises silicon,

and forming a low-resistance region with an element included in the first conductor and an element included in the semiconductor in the vicinity of the first surface and the first surface of the semiconductor.

10. The semiconductor device according to claim 1, wherein the first and second semiconductor layers are formed of a silicon nitride film,

wherein a sixth insulator is used in place of the first conductor,

and, the sixth insulator comprises silicon nitride.

11. A semiconductor wafer comprising a plurality of the semiconductor devices of claim 1 and a region for dicing.

12. A memory device comprising the semiconductor device according to claim 1 and a peripheral circuit.

13. An electronic device comprising the storage device of claim 12 and a casing.

Technical Field

One embodiment of the present invention relates to a semiconductor device, a semiconductor wafer, a memory device, and an electronic apparatus.

One embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a method or a method of manufacture. In addition, one embodiment of the present invention relates to a process (process), a machine (machine), a product (manufacture), or a composition (machine). Therefore, specifically, as an example of a technical field of one embodiment of the present invention disclosed in the present specification, a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a power storage device, an image pickup device, a storage device, a processor, an electronic apparatus, a driving method, a manufacturing method, a detection method, or a system including at least one of these devices can be given.

Background

In recent years, electronic components such as a Central Processing Unit (CPU), a Graphic Processing Unit (GPU), a storage device, and a sensor have been used in various electronic apparatuses such as a personal computer, a smartphone, and a digital camera, and have been improved in various aspects such as miniaturization and low power consumption.

In particular, since the amount of data used by the electronic devices and the like increases, a storage device having a large storage capacity is required. As a method for increasing the storage capacity, for example, patent document 1 discloses a NAND memory element having a three-dimensional structure in which a metal oxide is used as a channel formation region.

[ Prior Art document ]

[ patent document ]

[ patent document 1] specification of U.S. Pat. No. 9634097

Disclosure of Invention

Technical problem to be solved by the invention

Semiconductor layers of transistors constituting memory elements and the like are classified into a channel formation region and a low resistance region. In particular, when a metal oxide is used as a semiconductor layer of a three-dimensional NAND memory element, it is very important how to form a low-resistance region of the metal oxide. In a metal oxide which is used as a semiconductor layer of a transistor, a region having a low carrier density (or in this specification and the like, it is sometimes referred to as intrinsic or substantially intrinsic) is used as a channel formation region, and a region having a high carrier density is used as a low-resistance region. Therefore, in the case of manufacturing a NAND memory element having a three-dimensional structure in which a metal oxide is used as a semiconductor layer, there is a problem in that a channel formation region and a low-resistance region are formed separately.

An object of one embodiment of the present invention is to provide a novel semiconductor device. Another object of one embodiment of the present invention is to provide a memory device including a novel semiconductor device. Another object of one embodiment of the present invention is to provide an electronic device using a memory device including a novel semiconductor device. Another object of one embodiment of the present invention is to provide a storage device having a large data capacity. Another object of one embodiment of the present invention is to provide a highly reliable storage device.

Note that the object of one embodiment of the present invention is not limited to the above object. The above-listed objects do not preclude the existence of other objects. The other objects are not mentioned above and will be described in the following description. Those skilled in the art can derive and appropriately extract the objects not mentioned above from the description of the specification, the drawings, and the like. Further, one mode of the present invention achieves at least one of the above and other objects. In addition, it is not necessary for one embodiment of the present invention to achieve all of the above and other objects.

Means for solving the problems

(1)

One embodiment of the present invention is a semiconductor device including: first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, the first semiconductor including a first surface and a second surface, the first side surface and the second side surface of the first insulator being located in a region overlapping the first surface of the first semiconductor with the first conductor interposed therebetween, the first side surface of the first conductor being located in the first surface of the first semiconductor, the first side surface of the first insulator being located in the second side surface of the first conductor, the second insulator being located in a region including the second side surface of the first insulator, the top surface of the first conductor, and the second surface of the first semiconductor, the third insulator being located in a region overlapping the second surface of the first semiconductor in a region where the second insulator is formed, the fourth insulator being located in a region overlapping the first surface of the first semiconductor with the second insulator interposed therebetween, the second conductor being located in a region where the fourth insulator is formed And a region, in which the third insulator has a function of storing electric charges, and a tunnel current is induced between the second surface of the first semiconductor and the third insulator via the second insulator by supplying an electric potential to the second conductor.

(2)

Another embodiment of the present invention is a semiconductor device including: first to fourth insulators, a first conductor, a second conductor, a first semiconductor, and a second semiconductor, the first semiconductor including a first surface and a second surface, the first side surface and the second side surface of the first insulator being located in a region overlapping the first surface of the first semiconductor with the first conductor interposed therebetween, the first side surface of the first conductor being located in the first surface of the first semiconductor, the first side surface of the first insulator being located in the second side surface of the first conductor, the second insulator being located in a region including the second side surface of the first insulator, the top surface of the first conductor, and the second surface of the first semiconductor, the third insulator being located in a region overlapping the second surface of the first semiconductor in a region where the second insulator is formed, the fourth insulator being located in a region overlapping the first surface of the first semiconductor with the third insulator with the second surface of the second semiconductor with the second insulator interposed therebetween, the second semiconductor is located in a region overlapping with the second surface of the first semiconductor with a fourth insulator interposed therebetween, the second conductor is located in a region overlapping with the second surface of the first semiconductor among a formation surface of the second semiconductor and a region where the fourth insulator is formed, the third insulator has a function of storing electric charges, and a tunnel current is caused between the second surface of the first semiconductor and the third insulator with the second insulator interposed therebetween by supplying a potential to the second conductor.

(3)

In the structure of the above (1) or (2), one embodiment of the present invention is a semiconductor device in which the third insulator is further located in a region overlapping with the first surface of the first semiconductor in a region where the second insulator is formed, and the third insulator is located in a region overlapping between the second insulator and the fourth insulator.

(4)

Another embodiment of the present invention is a semiconductor device including: a first insulator, a second insulator, a fourth insulator, first to third conductors, and a first semiconductor, the first semiconductor including a first surface and a second surface, the first side surface and the second side surface of the first insulator being located in a region where the first conductor overlaps the first surface of the first semiconductor with the first surface of the first semiconductor interposed therebetween, the first side surface of the first conductor being located in the first surface of the first semiconductor, the first side surface of the first insulator being located in the second side surface of the first conductor, the second insulator being located in a region including the second side surface of the first insulator, the top surface of the first conductor, and the second surface of the first semiconductor interposed therebetween, the third conductor being located in a region where the second conductor overlaps the second surface of the first semiconductor with the second insulator interposed therebetween, the fourth insulator being located in a region where the second insulator is formed with the fourth insulator interposed therebetween, the region where the third conductor overlaps the second surface of the first semiconductor with the second surface of the third conductor interposed therebetween, And a region overlapping the first surface of the first semiconductor with the second insulator interposed therebetween in the region where the second insulator is formed, the second conductor is located in a region overlapping the second surface of the first semiconductor in the region where the fourth insulator is formed, the third conductor has a function of storing electric charges, and tunnel current is caused between the second surface of the first semiconductor and the third conductor with the second insulator interposed therebetween by supplying an electric potential to the second conductor.

(5)

In the structure of any one of the above (1) to (4), one embodiment of the present invention is a semiconductor device in which a thickness of the first semiconductor on the second surface of the first semiconductor is smaller than a thickness of the first semiconductor on the first surface of the first semiconductor.

(6)

In the structure of any one of the above (1) to (5), one embodiment of the present invention is a semiconductor device including a fifth insulator and a fourth conductor, wherein the fifth insulator is located on a surface of the first semiconductor opposite to the first surface and the second surface, and the fourth conductor is located in a region overlapping with the first surface and the second surface of the first semiconductor with the fifth insulator interposed therebetween.

(7)

In the structure of any one of the above (1) to (6), one embodiment of the present invention is a semiconductor device in which the first semiconductor includes a metal oxide, and oxygen concentrations in the vicinity of the second surface and the second surface of the first semiconductor are higher than those in the vicinity of the first surface and the first surface of the first semiconductor.

(8)

In the structure of the above (7), one embodiment of the present invention is a semiconductor device in which the first surface and the vicinity of the first surface of the first semiconductor contain a compound composed of an element contained in the first conductor and an element contained in the first semiconductor.

(9)

In the structure of any one of the above (1) to (6), one embodiment of the present invention is a semiconductor device in which a semiconductor includes silicon, and a low-resistance region is formed in the first surface and the vicinity of the first surface of the first semiconductor by an element included in the first conductor and an element included in the first semiconductor.

(10)

In the structure of any one of the above (1) to (9), one embodiment of the present invention is a semiconductor device in which a sixth insulator is used instead of the first conductor, and the sixth insulator includes silicon nitride.

(11)

Another embodiment of the present invention is a semiconductor wafer including a plurality of semiconductor devices described in any one of (1) to (10) above and a region for dicing.

(12)

Another embodiment of the present invention is a memory device including the semiconductor device according to any one of (1) to (10) above and a peripheral circuit.

(13)

Another embodiment of the present invention is an electronic device including the storage device and the housing described in (12) above.

Effects of the invention

According to one embodiment of the present invention, a novel semiconductor device can be provided. Further, according to one embodiment of the present invention, a memory device including the novel semiconductor device can be provided. Further, according to one embodiment of the present invention, there can be provided an electronic device using a memory device including a novel semiconductor device. Further, according to an embodiment of the present invention, a storage device with a large data capacity can be provided. Further, according to an embodiment of the present invention, a highly reliable storage device can be provided.

Note that the effects of one embodiment of the present invention are not limited to the above-described effects. The effects listed above do not hinder the existence of other effects. The other effects are not described in this section below. Those skilled in the art can appropriately extract the effects not described in this section from the description of the specification, the drawings, and the like. One embodiment of the present invention has at least one of the above-described effects and other effects. One embodiment of the present invention has at least one of the above-described effects and other effects.