阅读说明：本技术 一种存储单元的编程方法、装置、电子设备及存储介质 (Programming method and device of storage unit, electronic equipment and storage medium ) 是由 贺元魁 潘荣华 马思博 于 2018-06-01 设计创作，主要内容包括：本发明公开了一种存储单元的编程方法、装置及电子设备,该方法包括：对编程区域中除编程校验通过的存储单元之外的存储单元进行一次编程操作；对设定存储单元中除编程校验通过的存储单元进行编程校验；若编程校验均通过,则对所述设定存储单元之外的存储单元继续进行编程操作,否则返回对编程区域中除编程校验通过的存储单元之外的存储单元进行一次编程操作的步骤。通过采用上述技术方案实现了快速将存储单元的阈值电压抬升到较高区域,节省了编程时间。(The invention discloses a programming method and a device of a storage unit and electronic equipment, wherein the method comprises the following steps: performing a programming operation on memory cells in the programming region except for the memory cells passing the program verification; performing programming verification on the memory cells except the memory cells passing the programming verification in the set memory cells; and if the program verification is passed, continuing the programming operation on the memory cells except the set memory cell, otherwise, returning to the step of performing the one-time programming operation on the memory cells except the memory cell passed by the program verification in the programming region. By adopting the technical scheme, the threshold voltage of the storage unit is quickly raised to a higher area, and the programming time is saved.)

1. a method of programming a memory cell, comprising:

Performing a programming operation on memory cells in the programming region except for the memory cells passing the program verification;

Performing programming verification on the memory cells except the memory cells passing the programming verification in the set memory cells;

and if the program verification is passed, continuing the programming operation on the memory cells except the set memory cell, otherwise, returning to the step of performing the one-time programming operation on the memory cells except the memory cell passed by the program verification in the programming region.

2. The method of claim 1, wherein the set memory cells are memory cells in a programming region having a lower threshold voltage distribution.

3. The method of claim 1, wherein the program verifying the set memory cells except the memory cells that pass the program verifying comprises:

and performing program verification on the memory cells except the memory cells passing the program verification in the set memory cells one by one, and shielding the memory cells passing the program verification.

4. The method of claim 1, wherein the program verifying the set memory cells except the memory cells that pass the program verifying comprises:

Performing programming verification on a memory cell with the lowest grade in the set memory cells;

If the program verification is not passed, returning to the step of executing the one-time programming operation on the memory cells in the programming region except the memory cells passing the program verification;

if the program verification is passed, shielding the storage unit, and continuously performing program verification on the storage unit with the lowest grade in the rest storage units of the set storage unit;

repeating the judging operation of the programming verification until the programming verification of the set storage unit passes;

the grades of the memory cells are divided according to the distribution range of the target threshold voltage of the memory cells.

5. The method according to any one of claims 1-4, wherein continuing the programming operation on the memory cells other than the set memory cell comprises:

continuing to perform a programming operation on the memory cells except the set memory cell;

shielding the memory cell with the lowest grade in the memory cells except the set memory cells;

continuing to perform one-time programming operation on the rest memory cells in the memory cells except the set memory cell;

masking a memory cell with the lowest rank among the remaining memory cells other than the set memory cell;

Repeating the continuous programming-shielding operation until the rest memory cells in the memory cells except the set memory cell are zero, and ending the process;

the grades of the memory cells are divided according to the distribution range of the target threshold voltage of the memory cells.

6. the method according to any one of claims 1-4, wherein performing a program operation on the memory cell comprises:

the corresponding programming voltages are applied to the gate and the drain of the memory cell, respectively.

7. The method of any of claims 1-4, wherein performing program verification on the memory cell comprises:

applying a corresponding read voltage to a gate of a memory cell;

And determining whether the result of the programming verification is passed or not according to the voltage value at the set node of the sensitive amplifier matched with the memory cell.

8. an apparatus for programming a memory cell, the apparatus comprising:

The first programming module is used for carrying out one-time programming operation on the memory cells except the memory cells passing the program verification in the programming region;

the verification module is used for performing programming verification on the memory units except the memory units which pass the programming verification in the set memory units;

The second programming module is used for continuing programming operation on the storage units except the set storage unit if the programming verification is passed;

And the return module is used for returning to the step of carrying out one-time programming operation on the memory cells in the programming area except the memory cells passing the programming verification if the results of the programming verification are not all passed.

9. An electronic device comprising a first memory, a first processor and a computer program stored on the memory and executable on the first processor, characterized in that the first processor implements the method of programming a memory unit according to any of claims 1-7 when executing the computer program.

10. a storage medium containing computer-executable instructions which, when executed by a computer processor, implement a method of programming a storage unit according to any one of claims 1-7.

Technical Field

The embodiment of the invention relates to the technical field of storage, in particular to a programming method and device of a storage unit, electronic equipment and a storage medium.

background

a Nand flash Memory (Nand flash) is a common Memory chip, has the advantages of a Random Access Memory (RAM) and a Read-Only Memory (ROM), does not lose data when power is lost, is a Memory capable of performing electrical erasing in a system, has the advantages of high rewriting speed, large storage capacity and the like, and is widely applied to electronic products.

according to the division of the number of bits of data stored in each memory Cell, Nand flash can be divided into three types, namely SLC (Single-Level Cell), MLC (Multi-Level Cell), and TLC (Triple-Level Cell), wherein each memory Cell of SLC stores one-bit (1bit) of data, each memory Cell of MLC stores 2bit of data, and each memory Cell of TLC stores 3bit of data. The data storage is realized by controlling the distribution of the threshold voltage of the memory cell, and in particular, referring to a schematic diagram of the threshold voltage distribution of the memory cell of TLC shown in fig. 1, when the threshold voltage of the memory cell falls in an a region, it indicates that the data currently stored by the memory cell is 001, when the threshold voltage of the memory cell falls in a B region, it indicates that the data currently stored by the memory cell is 010, and when the threshold voltage of the memory cell falls in a G region, it indicates that the data currently stored by the memory cell is 111.

therefore, to achieve proper data storage of the TLC storage unit, the threshold distribution of the storage unit needs to be controlled by a complex algorithm. How to quickly program the threshold voltage of a TLC memory cell to a desired state becomes a matter of common effort for those skilled in the art.

Disclosure of Invention

the invention provides a programming method and device of a storage unit, electronic equipment and a storage medium, which can quickly raise the threshold voltage of the storage unit to a higher area and save the programming time.

In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:

In a first aspect, an embodiment of the present invention provides a method for programming a memory cell, where the method includes:

performing a programming operation on memory cells in the programming region except for the memory cells passing the program verification;

performing program verification on the memory cells except the memory cells which pass the program verification in the set memory cells;

and if the program verification is passed, continuing the programming operation on the memory cells except the set memory cell, otherwise, returning to the step of performing the one-time programming operation on the memory cells except the memory cell passed by the program verification in the programming region.

further, the set memory cell is a memory cell having a target threshold voltage distribution in a lower range in a program area.

Further, the performing program verification on the memory cells except the memory cell which passes program verification in the set memory cells includes:

and performing program verification on the memory cells except the memory cells passing the program verification in the set memory cells one by one, and shielding the memory cells passing the program verification.

Further, the performing program verification on the memory cells except the memory cells which pass the program verification in the set memory cells includes:

Performing programming verification on a memory cell with the lowest grade in the set memory cells;

If the program verification is not passed, returning to the step of executing the one-time programming operation on the memory cells in the programming region except the memory cells passing the program verification;

If the program verification is passed, shielding the storage unit, and continuously performing program verification on the storage unit with the lowest grade in the rest storage units of the set storage unit;

repeating the judging operation of the verification result until the programming verification of the set storage unit is passed;

The grades of the memory cells are divided according to the distribution range of the target threshold voltage of the memory cells.

Further, the continuing of the programming operation on the memory cells other than the set memory cell includes:

continuing to perform a programming operation on the memory cells except the set memory cell;

Shielding the memory cell with the lowest grade in the memory cells except the set memory cells;

Continuing to perform one-time programming operation on the rest memory cells in the memory cells except the set memory cell;

masking a memory cell with the lowest rank among the remaining memory cells other than the set memory cell;

repeating the continuous programming-shielding operation until the rest memory cells in the memory cells except the set memory cell are zero, and ending the process;

The grades of the memory cells are divided according to the distribution range of the target threshold voltage of the memory cells.

Further, the one-time programming operation is performed on the memory cell, and includes:

the corresponding programming voltages are applied to the gate and the drain of the memory cell, respectively.

Further, the program verifying the memory cell includes:

applying a corresponding read voltage to a gate of a memory cell;

and determining whether the result of the programming verification is passed or not according to the voltage value at the set node of the sensitive amplifier matched with the memory cell.

in a second aspect, an embodiment of the present invention provides an apparatus for programming a memory cell, the apparatus including:

The first programming module is used for carrying out one-time programming operation on the memory cells except the memory cells passing the program verification in the programming region;

The verification module is used for performing programming verification on the memory units except the memory units which pass the programming verification in the set memory units;

The second programming module is used for continuing programming operation on the storage units except the set storage unit if the programming verification is passed;

and the return module is used for returning to the step of carrying out one-time programming operation on the memory cells in the programming area except the memory cells passing the programming verification if the results of the programming verification are not all passed.

in a third aspect, an embodiment of the present invention provides an electronic device, which includes a first memory, a first processor, and a computer program stored in the memory and executable on the first processor, where the first processor implements the method for programming the memory unit according to the first aspect when executing the computer program.

In a fourth aspect, embodiments of the present invention provide a storage medium containing computer-executable instructions which, when executed by a computer processor, implement a method of programming a storage unit as described in the first aspect above.

According to the programming method of the memory unit provided by the embodiment of the invention, after the programming operation is performed on the memory units except the memory unit which passes the programming verification in the programming area for one time, the programming verification is performed on the set memory unit only, and when the programming verification result is passed, the programming operation is continued on the memory units except the set memory unit without performing the programming verification, so that the threshold voltage of the memory unit can be quickly raised to a higher area, and the programming time is saved.

drawings

FIG. 1 is a schematic diagram of a TLC memory cell threshold voltage distribution;

FIG. 2 is a flow chart illustrating a method for programming a memory cell according to one embodiment of the present invention;

Fig. 3 is a schematic structural diagram of a memory cell block according to a first embodiment of the present invention;

FIG. 4 is a diagram illustrating a programming process according to a first embodiment of the present invention;

FIG. 5 is a flowchart illustrating a method for programming a memory cell according to a second embodiment of the present invention;

FIG. 6 is a structural diagram of a programming device for a memory cell according to a third embodiment of the present invention;

Fig. 7 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present invention.

Detailed Description

the present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.