阅读说明：本技术 半导体装置及其形成方法 (Semiconductor device and forming method thereof ) 是由 张峰溢 童宇诚 李甫哲 林盈志 于 2018-05-24 设计创作，主要内容包括：本发明公开一种半导体装置及其形成方法,该半导体装置包含基底与材料层。基底具有第一区域,材料层则是设置在基底上。材料层包含呈阵列排列的多个第一图案、多个第二图案与两个第三图案,其中,第一图案设置在第一区域,第二图案设置在第一区域的两相对外侧,而第三图案设置在第一区域的另两相对外侧且部分合并于部分的各个第一图案与部分的各个第二图案。(The present invention discloses a kind of semiconductor device and forming method thereof, which includes substrate and material layer.Substrate has first area, and material layer is arranged in substrate.Material layer includes multiple first patterns, multiple second patterns and the two third patterns in array arrangement, wherein, first pattern is arranged in first area, second pattern is arranged in two opposite exterior lateral sides of first area, and another two opposite exterior lateral sides of first area are arranged in third pattern and part is incorporated in each first pattern and partial each second pattern of part.)

1. a kind of semiconductor device, characterized by comprising:

Substrate has first area；

Material layer, on this substrate, which includes multiple first patterns and multiple second patterns in array arrangement for setting, With two third patterns, wherein first pattern is arranged in the first area, which is arranged in the first area Two opposite exterior lateral sides, and respectively another two opposite exterior lateral sides of the first area are arranged in the third pattern and part is incorporated in each of a part Respectively second pattern of first pattern and a part.

2. semiconductor device according to claim 1, which is characterized in that respectively the size of second pattern be greater than respectively this first The size of pattern.

3. semiconductor device according to claim 1, which is characterized in that respectively the size of the third pattern be greater than respectively this second The size of pattern.

4. semiconductor device according to claim 1, which is characterized in that respectively first pattern is mutually separated and regularly arranged At multiple first rows along a direction, respectively respectively first pattern in the first row is on the other direction being perpendicularly to the direction It is alternately arranged with each other.

5. semiconductor device according to claim 4, which is characterized in that second pattern is mutually separated and is regularly arranged into Along multiple secondary series of the direction, respectively the alignment therewith on the other direction of respectively second pattern in the secondary series is arranged.

6. semiconductor device according to claim 5, which is characterized in that respectively first pattern and adjacent respectively second figure Case is alternately arranged with each other on the other direction.

7. semiconductor device according to claim 4, which is characterized in that the respectively surprise in the third pattern and those first rows Those first patterns in ordered series of numbers merge.

8. semiconductor device according to claim 4, which is characterized in that the respectively idol in the third pattern and those first rows Those first patterns of ordered series of numbers merge.

9. semiconductor device according to claim 1, which is characterized in that the substrate also includes around the of the first area Two regions, and second pattern and the third pattern are all disposed within the second area.

10. semiconductor device according to claim 1, which is characterized in that also include:

Multiple bit lines, setting on this substrate, are located at below the material layer；And

Multiple plugs, on this substrate, respectively first pattern connects the respectively plug for setting.

11. a kind of forming method of semiconductor device, characterized by comprising:

A substrate is provided, which has first area；

A material layer is formed on this substrate；And

Pattern the material layer with formed be in array arrangement multiple first patterns, multiple second patterns and two third patterns, Wherein, which is formed in the first area, which is formed in two opposite exterior lateral sides of the first area, and respectively should Third pattern be formed in another two opposite exterior lateral sides of the first area and part be incorporated in a part respectively first pattern and one Respectively second pattern divided.

12. the forming method of semiconductor device according to claim 11, which is characterized in that also include:

Multiple first optical mask patterns are formed in the material layer, respectively first optical mask pattern includes and extends along a first direction First part and along be not orthogonal to the first direction second direction extend second part；

Multiple second optical mask patterns are formed in the material layer, respectively second optical mask pattern includes and prolongs along the first direction The Part III stretched and the Part IV extended along the third direction for being not orthogonal to the first direction；

Two third optical mask patterns are formed in the material layer, respectively the third optical mask pattern partially overlaps each of a part Respectively second optical mask pattern of first optical mask pattern and a part；And

The material is patterned using those first optical mask patterns, those second optical mask patterns and those third optical mask patterns Layer.

13. the forming method of semiconductor device according to claim 12, which is characterized in that respectively first optical mask pattern The first part and respectively second optical mask pattern the Part III it is completely overlapped.

14. the forming method of semiconductor device according to claim 12, which is characterized in that respectively first optical mask pattern The first part and the Part III of respectively second optical mask pattern partly overlap.

15. the forming method of semiconductor device according to claim 12, which is characterized in that the first direction and this second Angle between direction is 40 to 60 degree.

16. the forming method of semiconductor device according to claim 12, which is characterized in that the second direction and the third Angle between direction is 60 to 80 degree.

17. the forming method of semiconductor device according to claim 12, which is characterized in that those first optical mask patterns The second part it is parallel to each other, and the Part IV of those the second optical mask patterns is parallel to each other.

18. the forming method of semiconductor device according to claim 12, which is characterized in that respectively first optical mask pattern The second part across respectively second optical mask pattern the Part IV.

19. the forming method of semiconductor device according to claim 11, which is characterized in that also include:

Multiple bit lines are formed on this substrate, those bit lines are located at below the material layer；And

Multiple plugs are formed on this substrate, those plugs are arranged alternately on this substrate with those bit lines, and those first figures Case contacts those plugs respectively.

20. the forming method of semiconductor device according to claim 11, which is characterized in that the substrate also includes to surround to be somebody's turn to do The second area of first area, second pattern and the third pattern are formed in the second area.

Technical field

The present invention relates to a kind of manufacture crafts of semiconductor device, utilize multiple patterning more particularly to a kind of (multiple patterning) manufacture craft forms the manufacture craft of semiconductor device.

Background technique

In semiconductor fabrication process, the manufacture of some micro-structures is needed in semiconductor substrate/film layer, dielectric materials layer Or in the substrate appropriate such as metal material layer or material layer, using manufacture crafts such as photoetching and etchings, being formed has accurate dimension Micro pattern.To reach this purpose, in traditional semiconductor technology, mask layer (mask is formed on target material layer Layer), which is then transferred to target layer by the formation/define these micro patterns in the mask layer so as to elder generation. In general, mask layer is, for example, the patterning photoresist layer formed by lithographic fabrication process, and/or utilize the pattern Change the patterned mask layer that photoresist layer is formed.

With the complication of integrated circuit, the size of these micro patterns is steadily decreasing, so being used to generate characteristic pattern The equipment of case just must satisfy the strict demand of manufacture craft resolution ratio and overlay accuracy (overlay accuracy), single Patterning (single patterning) method has been unable to satisfy the resolution requirements or manufacture craft for manufacturing small line width patterns Demand.Therefore the existing manufacture craft for how improveing those micro-structures is one of the important topic of this field now.

Summary of the invention

It a purpose of the present invention is that providing a kind of forming method of semiconductor device, is made using multiple patterning Technique, e.g. sidewall pattern shift (sidewall image transfer, SIT) technology, are respectively formed interlaced figure Case.As a result, can be under the premise of simplifying manufacture craft and saving mask number, formation layout is relatively intensive and size is relatively slight Semiconductor structure.

In order to achieve the above object, one embodiment of the invention provides a kind of semiconductor device, it includes a substrates and a material Layer.The substrate has a first area, and the material layer is then to be arranged on this substrate.The material layer includes in array arrangement Multiple first patterns, multiple second patterns and two third patterns, wherein first pattern is arranged in the first area, should Two opposite exterior lateral sides of the first area are arranged in second pattern, and respectively the another two opposite of the first area is arranged in the third pattern Outside and part are incorporated in respectively first pattern of a part and respectively second pattern of a part.

In order to achieve the above object, one embodiment of the invention provides a kind of forming method of semiconductor device, it includes following Step.Firstly, providing a substrate, which has a first area.Also, in forming a material layer in the substrate.Then, scheme The caseization material layer is to form in multiple first patterns of array arrangement and multiple second patterns and two third patterns, wherein First pattern is formed in the first area, which is formed in two opposite exterior lateral sides of the first area, and the respectively third Pattern is formed in another two opposite exterior lateral sides of the first area and part is incorporated in a part of respectively first pattern and a part Respectively second pattern.

Generally, the present invention is to utilize multiple patterning manufacture craft, e.g. side wall transfer techniques and dual pattern Change manufacture craft, forms mutually overlapping sacrificial pattern, and by intersecting with each other overlapping between each pattern on a destination layer Form corresponding pattern.In this situation, the variant each sacrificial pattern of shape or overlapping direction can be adjusted, cooperation side wall turns Shifting technology forms the relatively intensive and relatively slight size micro-structure etc. of layout with double patterning manufacture craft, and then reaches The simplified purpose with cost savings of manufacture craft.Forming method of the invention can be applied to semiconductor fabrication process as a result, In, such as the production of dynamic random processing memory (dynamic random access memory, DRAM) device Technique, to form in it engagement pad for being electrically connected each memory node (storage node contact, SNC).

Detailed description of the invention

Fig. 1 to Fig. 6 is the step schematic diagram of the forming method of semiconductor device in first preferred embodiment of the invention；Wherein

Fig. 1 is the photomask schematic diagram of the forming method in first preferred embodiment；

Fig. 2 is upper schematic diagram of the semiconductor device after forming photoresist structure；

Fig. 3 is diagrammatic cross-section of the semiconductor device after forming photoresist structure；

Fig. 4 is diagrammatic cross-section of the semiconductor device after carry out one patterns manufacture craft；

Fig. 5 is upper schematic diagram of the semiconductor device after carrying out another patterning manufacture craft；

Fig. 6 is upper schematic diagram of the semiconductor device after forming pattern；

Fig. 7 to Fig. 8 is the step schematic diagram of the forming method of semiconductor device in second preferred embodiment of the invention；Wherein

Fig. 7 is the photomask schematic diagram of forming method in the second preferred embodiment；

Fig. 8 is upper schematic diagram of the semiconductor device after forming pattern；

Fig. 9 to Figure 11 is the step schematic diagram of the forming method of semiconductor device in third preferred embodiment of the invention；Its In

Fig. 9 is the photomask schematic diagram of forming method in third preferred embodiment；

Figure 10 is upper schematic diagram of the semiconductor device after forming mask pattern；

Figure 11 is upper schematic diagram of the semiconductor device after forming pattern；

Figure 12 be third preferred embodiment in pattern formed after another pattern figure.

Figure 13 to Figure 14 is the step schematic diagram of the forming method of semiconductor device in four preferred embodiment of the invention；

Figure 13 is the photomask schematic diagram of forming method in the 4th preferred embodiment；

Figure 14 is upper schematic diagram of the semiconductor device after forming pattern；

Figure 15 is the step schematic diagram of the forming method of semiconductor device in fifth preferred embodiment of the invention.

Main element symbol description

100 substrates

The first area 100a

100b second area

113,123 pattern

127 patterns

129a, 129b, 129c, 129d pattern

110 material layers

130 hard mask layers

150 mask layers

170 mask layers

171 mask patterns

172,174 opening

173 mask patterns

175 mask patterns

176 grooves

177 mask patterns

179,179a, 179b mask pattern

190 photoresist structures

191 patterning photoresists

191a sacrificial pattern

193 anti-reflecting layers

195 sacrificial layers

229a, 229b, 279a, 279b pattern

201,203,205 photomask

201a, 203a dashed box pattern

301,303,305 photomask

301a, 303a, 305a optical mask pattern

301b, 303b dashed box pattern

311,312,331,332 entity part

401,403 photomask

401a, 403a optical mask pattern

401b, 403b dashed box pattern

501,503 photomask

501a, 503a optical mask pattern

501b, 503b dashed box pattern

C10, C11, C12, C13, C14, C15, C16, C17, C18, C19 first row

C21, C22 secondary series

The direction D1, D2, D3, D4

The interval P1, P2, P3, P4, P5, P6, P9, P8

θ angle

Specific embodiment

To enable the general technology person for being familiar with the technical field of the invention to be further understood that the present invention, hereafter spy is enumerated Several preferred embodiments of the invention, and cooperate appended attached drawing, the constitution content that the present invention will be described in detail and to be reached Effect.

Fig. 1 to Fig. 6 is please referred to, illustrated is the formation side of semiconductor device in first preferred embodiment of the invention The step schematic diagram of method, wherein Fig. 1 is photomask schematic diagram used in the forming method；Fig. 2, Fig. 5, Fig. 6 are the semiconductor Be installed on the upper schematic diagram of formation stages, Fig. 3 and Fig. 4 be then the semiconductor device in formation stages along tangent line in Fig. 2 The diagrammatic cross-section of A-A '.

It is, for example, semiconductor substrate (not being painted), such as silicon base firstly, providing a substrate (substrate) 100 (silicon substrate), contain silicon base (silicon-containing substrate), extension silicon base (epitaxial silicon substrate), silicon-coated insulated substrate (silicon-on-insulatorsubstrate) etc.. Definition has a first area 100a, an e.g. nucleus (coreregion), such as a memory areas in substrate 100 (memory region), and the part outside the 100a of first area is then defined as a second area (not being painted), an e.g. periphery Area (periphery region).In one embodiment, one from bottom to top sequentially stacked is also formed further in substrate 100 Material layer 110, a hard mask layer 130 is such as comprising silicon nitride (SiN), mask layer 150 is such as comprising silicon (Si), and covers Mold layer 170 is covered on the first area 100a of substrate 100, as shown in Figure 2 and Figure 3 such as comprising silicon oxynitride (SiON). Wherein, material layer 110 is intended to through the patterned destination layer of the forming method (target layer), may include appointing What suitable material, such as can be the conductive layer (conductive comprising metal materials such as tungsten (W), copper (Cu), aluminium (Al) Layer), it is also possible to the dielectric layer comprising dielectric materials such as silica, silicon nitrides, but not limited to this.

Then, photomask 401,403 as shown in Figure 1 is sequentially utilized, forms phase on the first area 100a of substrate 100 The photoresist structure answered, to pattern each stack layer (including mask layer 170,150, hard mask layer 130) of lower section.Citing For, photomask 401 defines the multiple optical mask pattern 401a extended towards a direction D1, can be first with photomask 401 A photoresist structure 190 is formed in substrate 100, it includes the sacrificial layers 195 from bottom to top sequentially stacked, an antireflection Layer 193 and a patterning photoresist 191, patterning photoresist 191 include corresponding to optical mask pattern 401a's Several sacrificial pattern (mandrels) 191a.One side wall pattern transfer (sidewall image is carried out using sacrificial pattern 191a Transfer, SIT) technology, it includes deposition and etching process is carried out, in the side wall shape of each photoresist pattern 191a It (is not painted) at a clearance wall, forming position is, for example, then to go completely as shown in the dashed box pattern 401b on photomask 401 A patterning manufacture craft is carried out except patterning photoresist 191, and using those clearance walls, it can be in lower section mask layer Multiple mask patterns 171 along direction D1 are formed on 170, each mask pattern 171 is divided by multiple along the groove 172 of direction D1 Every as shown in Figure 4.

On the other hand, photomask 403 defines the multiple photomasks extended towards the other direction D2 perpendicular to direction D1 Pattern 403a forms another photoresist structure (not being painted) using photomask 403 in substrate 100, equally include by A sacrificial layer (not being painted), an anti-reflecting layer (not being painted) and the patterning photoresist sequentially stacked on down is (not It is painted), and the patterning photoresist includes several sacrificial patterns (not being painted) corresponding to optical mask pattern 403a.It utilizes Those sacrificial patterns carry out one side wall Pattern transfer techniques again, it includes deposition and etching process is carried out, in the respectively sacrifice The side wall of pattern forms a clearance wall (not being painted), and forming position is, for example, such as the dashed box pattern 403b institute on photomask 403 Show, then completely removes the patterning photoresist, and carry out a patterning manufacture craft using those clearance walls, it can shape At multiple grooves 174 along direction D2, and by mask layer 170 further patterned multiple mask patterns 173 in rectangle, It is to form an array arrangement (array arrangement), as shown in Figure 5.It is noted that though abovementioned steps are with sequentially Pass through sidewall pattern transfer techniques and double patterning and dual etching process (double- using photomask 401,403 Patterning and double-etching, 2P2E) on mask layer 170, form corresponding pattern and groove, but its reality Operation timing is not limited thereto, and the use timing of photomask 401,403 can be adjusted according to product demand, or use instead double Patterning and single etch manufacture craft (double-patterning and one-etching, 2P1E) again.

Later, mask pattern 173 is sequentially transferred to the mask layer 150, hard mask layer 130 and material layer 110 of lower section, i.e., Multiple patterns 113 corresponding to mask pattern 173 can be formed in material layer 110, as shown in Figure 6.Specifically, pattern 113 It is equally to form an array arrangement, so that each pattern 113 is mutually separated and is regularly arranged and having the same in the direction di It is spaced (pitch) P1, such as is about 75 to 80 nanometers (nm), and then same interval P2 having the same in the direction d 2, Such as 78 to 85 nanometers are about, but not limited to this.

The manufacture craft of first preferred embodiment of the invention is completed as a result,.Manufacture craft of the invention mainly utilizes Photomask 401,403 as shown in Figure 1, sequentially formed on mask layer 170 opening 172 extended towards different directions D1, D2, 174, and lower section is transferred to by the patterned mask pattern 173 arranged in arrays of mask layer 170, then by mask pattern 173 Material layer 110 forms pattern 113.It is noted that optical mask pattern 401a defined in photomask 401 and photomask 403 are fixed The optical mask pattern 403a of justice is to extend respectively towards orthogonal two directions D1, D2, thus intersect with each other and make its heavy Folded place is correspondingly formed subsequent pattern 113.In this situation, i.e., dual using the side wall transfer techniques cooperation of operation twice Patterning forms the relatively intensive and relatively slight size micro-structure etc. of layout with dual etching process, and then reaches system Make the simplified purpose with cost savings of technique.

The usual skill in this field is it will also be appreciated that forming method of the invention is not limited to aforementioned step or operates suitable Sequence can also be reached by other means.For example, in one embodiment, may be selected to omit hard mask layer 130 above-mentioned and straight Connect patterned material layer；Either photomask above-mentioned also can have other aspects according to actual product demand, to cooperate reality The suitable pattern of product formation.Therefore, it is illustrated below for the other embodiments or change type of forming method of the present invention. And illustrate to simplify, illustrate to be described in detail mainly for each embodiment difference below, and no longer something in common is repeated It repeats.In addition, identical element is indicated in various embodiments of the present invention with identical label, in favor of mutual between each embodiment It contrasts.

Fig. 7 to Fig. 8 is please referred to, illustrated is the formation side of semiconductor device in second preferred embodiment of the invention The step schematic diagram of method, wherein Fig. 7 is photomask schematic diagram used in the forming method；Fig. 8 is the semiconductor device in shape At the upper schematic diagram in stage.The concrete operation step of the present embodiment is generally identical as aforementioned first preferred embodiment, in this It is not repeating.The manufacture craft of the present embodiment and the main difference of previous embodiment are that the forming method of the present embodiment is benefit It is arranged in pairs or groups side wall transfer techniques and double patterning and dual etching process with photomask 501,503 as shown in Figure 7, and As aforementioned substrates 100 first area 100a on form corresponding sacrificial pattern (not being painted), come pattern lower section each stacking Layer (including mask layer 170,150, hard mask layer 130).

Specifically, photomask 501 defines the multiple photomasks extended towards the direction D3 different from direction D1, D2 Pattern 501a, and photomask 503 is defined towards the multiple light extended perpendicular to the direction D4 different from direction D1, D2, D3 Mask pattern 503a, wherein direction D3 is not preferably vertical with direction D4, and angle theta between the two is for example about 40 degree extremely 60 degree, but not limited to this.Then, a photoresist structure can be formed in substrate 100 first with photomask 501 (not draw Show), it includes the sacrificial layer from bottom to top sequentially stacked (not being painted), an anti-reflecting layer (not being painted) and a patterning light It causes resist (not being painted), the patterning photoresist is comprising corresponding to several sacrificial patterns of optical mask pattern 501a (not It is painted).One side wall Pattern transfer techniques are carried out using those sacrificial patterns, it includes carry out deposition and etching process, In Respectively the side wall of the sacrificial pattern forms a clearance wall (not being painted), and forming position is, for example, such as the dashed box figure on photomask 501 Shown in case 501b, the patterning photoresist is then completely removed, and carry out a patterning production work using those clearance walls Skill can form multiple mask patterns (not being painted) along direction D3 and groove (not being painted) on lower section mask layer 170.It connects , another photoresist structure (not being painted) is formed in substrate 100 using photomask 503, equally includes from bottom to top A sacrificial layer (not being painted), an anti-reflecting layer (not being painted) and patterning photoresist (not being painted) sequentially stacked, And the patterning photoresist includes several sacrificial patterns (not being painted) corresponding to optical mask pattern 503a.It is sacrificial using those Domestic animal pattern carries out one side wall Pattern transfer techniques again, it includes deposition and etching process is carried out, in the respectively sacrificial pattern Side wall forms a clearance wall (not being painted), as shown in the dashed box pattern 503b on photomask 503, then forming position is, for example, The patterning photoresist is completely removed, and carries out a patterning manufacture craft using those clearance walls, can be formed multiple Along the groove (not being painted) of direction D4, further patterned mask layer 170 and form multiple mask patterns (not being painted).

Then, those mask patterns are sequentially transferred to the mask layer 150, hard mask layer 130 and material layer 110 of lower section, Multiple patterns 123 corresponding to those mask patterns can be formed in material layer 110, as shown in Figure 8.Specifically, pattern 123 be equally to form an array arrangement, so that each pattern 123 is mutually separated and is regularly arranged and has on the D3 of direction identical Interval P3, such as be about 65 to 70 nanometers, and the also interval P4 having the same on the D4 of direction, such as be about 65 To 70 nanometers, but not limited to this.

The manufacture craft of second preferred embodiment of the invention is completed as a result,.It is noted that the present embodiment is formed by Though those mask patterns are equally the matrix arrangements that rule is presented, those mask patterns are corresponding several mutual intersections without hanging down Straight dashed box pattern 501b, 503b and formed, and diamond shape is presented, while being correspondingly formed and equally assuming diamond in shape and shape is arranged in a matrix Pattern 123.In this situation, equally cooperate double patterning and dual etching system using the side wall transfer techniques of operation twice It is formed as technique and is laid out the more small micro-structure etc. of more intensive and size, and then reach manufacture craft simplification and Cheng Benjie The purpose of province.

However, the present embodiment is formed by each pattern 123, positioned at first area 100a boundary pattern 123 vulnerable to It is limited to the scope limitation of its shape and first area 100a and incomplete profile is presented.In the case, it is located at first area The actual functional capability of the pattern 123 of 100a boundary may also be affected with application, and damage the whole effect of the semiconductor device Energy.

Fig. 9 to Figure 11 is please referred to, illustrated is the formation side of semiconductor device in third preferred embodiment of the invention The step schematic diagram of method, wherein Fig. 9 is photomask schematic diagram used in the forming method；Figure 10, Figure 11 are semiconductor dress It is placed in the upper schematic diagram of formation stages.The concrete operation step of the present embodiment generally with aforementioned first preferred embodiment phase Together, it is not being repeated in this.The manufacture craft of the present embodiment and the main difference of previous embodiment be, the formation side of the present embodiment Method is to utilize the first area 100a and second of photomask 301,303,305 as shown in Figure 9 in substrate 100 as shown in Figure 10 Corresponding and intersection sacrificial pattern (not being painted) is respectively formed on the 100b of region, to pattern each stack layer of lower section (comprising covering Mold layer 170,150, hard mask layer 130).

Specifically, photomask 301 defines multiple optical mask pattern 301a being arranged parallel to each other, each optical mask pattern 301a include along the direction D4 entity part 311 extended and along direction D2 extend entity part 312, and direction D2 and Angle between D4 is for example about 40 to 60 degree.Wherein, entity part 311 is located in the 100a of first area, and entity portion Points 312 are in being located at second area 100b, and the two sides of adjacent entity part 311, as shown in Figure 9.On the other hand, light is covered Mould 303 equally defines multiple optical mask pattern 303a being arranged parallel to each other, and each optical mask pattern 303a includes along side To the entity part 332 D3 the entity part 331 extended and extended along direction D2.Wherein, entity part 331 is to be located at the In one region 100a, and entity part 332 is then the two sides for being located in second area 100b, and abutting entity part 331, such as Shown in Fig. 9.Photomask 305 then defines two optical mask pattern 305a being arranged parallel to each other, as shown in Figure 9.

Then, a photoresist structure (not being painted) can be formed in substrate 100 first with photomask 301, it includes A sacrificial layer (not being painted), an anti-reflecting layer (not being painted) and the patterning photoresist from bottom to top sequentially stacked (not being painted), the patterning photoresist include several sacrificial patterns (not being painted) corresponding to optical mask pattern 301a.Benefit One side wall Pattern transfer techniques are carried out with those sacrificial patterns, it includes deposition and etching process is carried out, in the respectively sacrifice The side wall of pattern forms a clearance wall (not being painted), and forming position is, for example, such as the dashed box pattern 301b institute on photomask 301 Show, then completely removes the patterning photoresist, and carry out a patterning manufacture craft, Ji Ke using those clearance walls Multiple mask patterns 175 arranged in parallel and groove 176 are formed on lower section mask layer 170, as shown in Figure 10.

Then, another photoresist structure (not being painted) is formed in substrate 100 using photomask 303, it is same to wrap Containing the sacrificial layer (not being painted), an anti-reflecting layer (not being painted) and a patterning photoresist from bottom to top sequentially stacked (not being painted), and the patterning photoresist includes several sacrificial patterns (not being painted) corresponding to optical mask pattern 303a. One side wall Pattern transfer techniques are carried out again using those sacrificial patterns, it includes deposition and etching process is carried out, respectively should The side wall of sacrificial pattern forms a clearance wall (not being painted), and forming position is, for example, such as the dashed box pattern on photomask 303 Shown in 303b, the patterning photoresist is then completely removed, and carry out a patterning manufacture craft using those clearance walls, Can further pattern mask pattern 175 and form multiple mask patterns 179, as shown in Figure 10.Wherein, each mask pattern 179 be corresponding several mutual intersections and each dashed box pattern 301b, 303b of out of plumb and formed, and corresponding each dashed box pattern 301b, 303b are overlapped along the part that direction D2 extends and form mask pattern relatively large sized and that rectangle is presented 179b, and part that corresponding each dashed box pattern 301b, 303b extends along direction D3, D4 is then overlapped and to form size opposite Mask pattern 179a smaller and that diamond shape is presented, as shown in Figure 10.It can avoid being formed in first area 100a boundary as a result, The incomplete pattern of profile；And the position of remaining pattern for being likely to form imperfect profile, then by corresponding optical mask pattern 305a and the mask pattern 177 formed is covered, the size of mask pattern 177 is significantly greater than mask pattern 179a, 179b.

Then, mask pattern 177,179 is sequentially transferred to mask layer 150, hard mask layer 130 and the material layer of lower section 110, corresponding multiple patterns 127,129a, 129b can be formed in material layer 110, e.g. as shown in figure 11.Come in detail It says, pattern 129a corresponds to mask pattern 179a, and forms an array arrangement, so that each pattern 129a is mutually separated and regular Ground arrangement and on direction D3, D4 interval P5 having the same, such as be about 65 to 70 nanometers, but not limited to this.Such as Shown in Figure 11, pattern 129a be regularly be arranged in along direction D1 multiple first rows (column) C11, C12, C13, C14, C15, C16, C17, C18, C19, C10, each first row are then alternately arranged in the direction d 2.For example, it is arranged in adjacent Miss one another arrangement between each pattern 179a of one column C1, C2, the spacing P5 for the half that e.g. misplaces in the direction di, such as Shown in Figure 11, but not limited to this.

On the other hand, pattern 129b corresponds to mask pattern 179b and is formed, and each pattern 129b is mutually separated and regular Ground is arranged in two opposite exterior lateral sides of pattern 129a along direction D1 and forms secondary series C21, C22, and each pattern 129b is in side The interval P6 having the same on D1, such as 75 to 80 nanometers are about, but not limited to this.As shown in figure 11, it is located at the Each pattern 179b alignment therewith arrangement on two column C21, C22, and it is wrong with each pattern 179a on adjacent first row C11, C10 Position arrangement, the spacing P6 for the half that e.g. misplaces in the direction di, but not limited to this.And pattern 127 then corresponds to Mask pattern 177 and formed, be another two opposite exterior lateral sides that pattern 179a is formed in along direction D2.It is noted that because of light The optical mask pattern 305a of mask 305 partially overlaps optical mask pattern 301a, 303a of photomask 301,303, when its correspondence When pattern is transferred to material layer 110 simultaneously, pattern 127 can merge with the pattern 129a of a part with the pattern 129b of a part. For example, be located at the side pattern 129a (e.g. upside) pattern 127 can be located in secondary series C21, C22 one A pattern 129b merges, and can also be with a pattern in first row C2, C4, C6, C8, C10 for being located at even column 129a merges, as shown in figure 11.However, this field person will be readily appreciated that, merging pattern 129a, 129b of pattern 127 are not Now in aforementioned citing, and the relative position of photomask 301,303,305 can be adjusted according to actual components demand, and make each pattern 127, there is different merging relationships between 129a, 129b.It (is not painted) in another embodiment, also may be selected to make each pattern 127 It, can also be with the first row that is located at odd column in addition to merging with a pattern 129b being located in secondary series C21, C22 A pattern 129a in C1, C3, C5, C7, C9 merges.

The manufacture craft of third preferred embodiment of the invention is completed as a result,.It is noted that the present embodiment is formed by Though mask pattern 179a, 179b and pattern 129a, 129b equally be present rule matrix arrangement, because mask pattern 179a, 179b with pattern 129a, 129b is corresponding several mutual intersect and out of plumb, comprising the different two-part dashed box of extending direction Pattern 301b, 303b and formed, therefore each pattern that shape is different, size is different can be presented simultaneously.It in this situation, equally can benefit With the side wall transfer techniques cooperation double patterning and dual etching process of operation twice, is formed and be laid out relatively intensive and ruler Very little relatively slight micro-structure etc., and then achieve the purpose that manufacture craft simplification and cost savings.And.The method of the present embodiment Be allow the part positioned at each two sides dashed box pattern 301b, 303b overlapped and formed subsequent mask pattern 179b with Pattern 129b, and mask pattern 179b and pattern 129b are to be located in the second area 100b other than the 100a of first area, by It is imperfect that this is avoided mask pattern 179a or pattern 129a adjacent to the first area two opposite sides 100a side boundary that profile occurs The problem of.And mask pattern 179a or pattern 129a adjacent to the another two opposite sides side first area 100a boundary, then pass through It is formed by mask pattern 177 and pattern 127 corresponding to optical mask pattern 305a, masking is located at covering except the 100a of first area Mould pattern 179a or pattern 129a, and then avoid the generation of foregoing problems.Therefore, the method for the present embodiment is more advantageous in simplification Under the premise of manufacture craft, is formed and be laid out more complete micro-structure, and cooperated product demand and make to be formed in specific region Pattern or structure have relatively large size, interval and/or shape.

In addition, it should also be noted that though the mask pattern 179a or pattern 129a of the present embodiment are the shapes diamond shape is presented Shape is illustrated as pattern is implemented, but in actual fabrication technique, also can adjust the system such as passed through exposure, development, etching Make the condition of technique, so that each mask pattern 179a or pattern 129a corners, and form the rough figure at round or ellipse Case 279a/229a, as shown in figure 12.Similarly, though the mask pattern 179b or pattern 129b of the present embodiment are so that rectangle is presented Shape be illustrated as pattern is implemented, but in actual fabrication technique, same adjustable passed through exposure, development, erosion The condition of the manufacture crafts such as quarter, so that each mask pattern 179b or pattern 129b form the pattern 279a/ of rough ovalisation 229a, as shown in figure 12.

Figure 13 to Figure 14 is please referred to, illustrated is the formation of semiconductor device in four preferred embodiment of the invention The step schematic diagram of method, wherein Figure 13 is photomask schematic diagram used in the forming method；Figure 14 is the semiconductor device In the upper schematic diagram of formation stages.The concrete operation step of the present embodiment is generally identical as aforementioned third preferred embodiment, It is not being repeated in this.The manufacture craft of the present embodiment and the main difference of previous embodiment are, in the formation side of the present embodiment Method make the two sides of each photomask 201,203,205 relative to 301,303,305 retention of each photomask in previous embodiment outside Space, as shown in figure 13, and utilize first area of the photomask 201,203,205 in substrate 100 as shown in fig. 13 that Corresponding sacrificial pattern (not being painted) is respectively formed on 100a and second area 100b, to pattern each stack layer (packet of lower section Containing mask layer 170,150, hard mask layer 130).

Specifically, photomask 201 equally defines multiple optical mask pattern 301a being arranged parallel to each other, photomask 203 equally define multiple optical mask pattern 303a being arranged parallel to each other, and photomask 205 is then equally defined and is parallel to each other Two optical mask pattern 305a of arrangement.Then, it is sequentially formed in substrate 100 using photomask 201,203 corresponding photic anti- It loses agent structure (not being painted), making each photoresist structure includes the sacrificial layer (not being painted) from bottom to top sequentially stacked, one Anti-reflecting layer (not being painted) and patterning photoresist (not being painted), respectively the patterning photoresist includes and corresponds to Several sacrificial patterns (not being painted) of optical mask pattern 301a, 303a.One side wall pattern is carried out respectively using those sacrificial patterns Transfer techniques can form a clearance wall (not being painted) in the side wall of the respectively sacrificial pattern, and forming position is, for example, as light is covered Shown in dashed box pattern 201a, 203a on mould 201,203, the respectively patterning photoresist is then completely removed, it is aforementioned for another example One patterning manufacture craft of progress described in embodiment, in the lap (not being painted) of each dashed box pattern 201a, 203a of correspondence It is formed on mask layer 170 multiple mask patterns (not being painted), then those mask patterns is sequentially transferred to the mask layer of lower section 150, hard mask layer 130 and material layer 110, can form corresponding multiple patterns 127,129a, 129c in material layer 110, E.g. as shown in figure 14.

It is noted that being by completely this etc. in the transfer techniques of sidewall pattern twice carried out in the present embodiment Clearance wall is transferred in each stack layer of lower section (such as mask layer 170,150), and avoids removing the grade clearance walls two sides Coupling part.That is, being shifted in the sidewall pattern that previous embodiment (including first, second and 3rd embodiment) is carried out In technology, needs additionally to carry out one cutting manufacture craft to being formed by those clearance walls, be only located at each optical mask pattern to be formed 301a, 303a, 401a, 403a, 501a, 503a and corresponding each dashed box pattern 301b, 303b, 401b, 403b, 501b, 503b's Two Separation walls (not being painted), but the sidewall pattern transfer techniques carried out in the present embodiment then omit this and cut production work Skill, so that being formed by those clearance walls directly retains the aspect for surrounding optical mask pattern 301a, 303a, such as each dashed box of Figure 13 Shown in pattern 201a, 203a.

Corresponding to each two sides dashed box pattern 201a, 203a lap as a result, then can form size more in material layer 110 Greatly and the pattern 129c of U-shaped is presented；And the lap that corresponding each dashed box pattern 201a, 203a extends along direction D3, D4 It is relatively small and the pattern 129a of diamond shape is presented that size then can be equally formed in material layer 110, as shown in figure 14.Each pattern 129c is equally mutually separated and is regularly arranged in two opposite exterior lateral sides of pattern 129a along direction D1 and forms secondary series C21, C22, and each pattern 129c interval P7 having the same in the direction di, such as 150 to 160 nanometers are about, but It is not limited.Also, be located at secondary series C21, C22 on each pattern 179c alignment therewith arrangement, and with adjacent first row Each pattern 179a Heterogeneous Permutation on C11, C10, as shown in figure 14.And pattern 127 equally corresponds to optical mask pattern 305a And it is formed, and be located at another two opposite exterior lateral sides of pattern 179a along direction D2.As a result, pattern 127 can be with the figure of a part Case 129a merges with the pattern 129c of a part.

The manufacture craft of four preferred embodiment of the invention is completed as a result,.The present embodiment be formed by pattern 129a, Though 129c is equally the matrix arrangement that rule is presented, make pattern 129c can phase because of the difference in operation of sidewall pattern transfer techniques There is bigger size, interval P7 and special shape compared with aforementioned third embodiment.The method of the present embodiment is still advantageous as a result, It under the premise of simplifying manufacture craft, is formed and is laid out more complete micro-structure, and further cooperated product demand and make spy Determine to be formed by pattern or structure in region with relatively large size, interval and/or different shapes.

Please refer to Figure 15, illustrated is in fifth preferred embodiment of the invention, the forming method of semiconductor device Step schematic diagram, wherein Figure 15 is the semiconductor device in the upper schematic diagram of formation stages.The concrete operations of the present embodiment walk It is rapid generally identical as aforementioned third preferred embodiment, it is not being repeated in this.The manufacture craft and previous embodiment of the present embodiment Main difference be, the present embodiment forming method be adjustment photomask 301,303 on optical mask pattern 301a, 303a Relative position, so that the entity portion that each optical mask pattern 301a, 303a extend along direction D2 defined in photomask 301,303 Divide and be only capable of partly overlapping, and cannot complete to be overlapped.Each clearance wall is formed by by sidewall pattern transfer techniques as a result, (not draw Show) it is also only capable of partly overlapping along the part that direction D2 extends, and cannot complete to be overlapped.

Under this setting, method through this embodiment corresponds to each clearance wall two sides lap then in material layer 110 The lesser rectangular patterns 129d of size is formed, as shown in figure 15.Each pattern 129d is equally mutually separated and regularly along side Two opposite exterior lateral sides of pattern 129a are arranged in D1 and form secondary series C21, C22, and each pattern 129d has in the direction di There is identical interval P8, such as be about 65 to 70 nanometers, but not limited to this.Also, it is located on secondary series C21, C22 The arrangement of each pattern 179d alignment therewith, and with each pattern 179a Heterogeneous Permutation on adjacent first row C11, C10.

The manufacture craft of fifth preferred embodiment of the invention is completed as a result,.The present embodiment be formed by pattern 129a, Though 129d is equally the matrix arrangement that rule is presented, make pattern 129d can because adjusting between each optical mask pattern relative position There is lesser size, interval P8 compared to the pattern 129b of aforementioned third embodiment.So that the present embodiment is formed by pattern 129d has in the direction di less than pattern 129b size, and but not limited to this.It in other embodiments, also can be by adjusting each Relative position between optical mask pattern and making, which is formed by pattern (not being painted) and has in direction D2, is less than pattern 129b size.By This, the method for the present embodiment is still conducive to be formed under the premise of simplifying manufacture craft and be laid out more complete micro-structure, gone forward side by side One step cooperation product demand and making is formed by pattern in specific region or structure have relatively large size, interval and/or Shape.

Generally, the present invention is to utilize multiple patterning manufacture craft, e.g. side wall transfer techniques and dual pattern Change manufacture craft, forms mutually overlapping sacrificial pattern, and by intersecting with each other overlapping between each pattern on a destination layer Form corresponding pattern.In this situation, the variant each sacrificial pattern of shape or overlapping direction can be adjusted, cooperation side wall turns Shifting technology forms the relatively intensive and relatively slight size micro-structure etc. of layout with double patterning manufacture craft, and then reaches The simplified purpose with cost savings of manufacture craft.Therefore, present invention forming method above-mentioned can be applied to semiconductor fabrication In technique, such as semiconductor storage device, an e.g. dynamic random handles memory (dynamic random Access memory, DRAM) device, each memory node (storage node contact, SNC) is electrically connected to be formed in it Engagement pad.That is, in one embodiment, before carrying out aforementioned manufacture craft, can first be formed in substrate 100 multiple Embedded grid (not being painted) is used as character line (word line, WL, be not painted), and makees the first area 100a of substrate 100 Second area 100b for a memory areas, and circular first area 100a is then used as a peripheral region.Also, in substrate 100 A dielectric layer (not being painted) in be further formed multiple bit lines (bit line, BL, be not painted) and plug (not being painted).So Afterwards, it is formed in material layer 110 on the dielectric layer, and includes tungsten (tungsten, W), aluminium (aluminum, Al) or copper The low resistances metal material such as (copper, Cu).As a result, i.e. using present invention forming method patterned material layer 110 above-mentioned, Each pattern 127,129a, 129b, 129c, 129d are formed, so that each pattern 129a being located in the 100a of first area can directly connect Those plugs of lower section are connect, and respectively the plug can be thus electrically connected to a transistor unit of the semiconductor storage (not It is painted), and as a memory node (storage node contact, SNC).On the other hand, positioned at second area 100b's Each pattern 127,129b, 129c, 129d are not attached to those plugs, or are connected to illusory plug.However, reality of the invention Border application should be not limited to aforementioned implementation pattern, in other embodiments, also be optionally applied to other semiconductor fabrication process, with Under the premise of manufacture craft simplification is with cost savings, the relatively intensive and relatively slight size semiconductor structure of layout is formed.

The above description is only a preferred embodiment of the present invention, all equivalent changes done according to the claims in the present invention with repair Decorations, should all belong to the scope of the present invention.