阅读说明：本技术 层叠陶瓷电子部件 (Laminated ceramic electronic component ) 是由 桥本英之 上野健之 于 2021-03-18 设计创作，主要内容包括：本发明提供一种抑制构成电介质层的晶粒内的氧空穴的移动并具有高可靠性的层叠陶瓷电子部件。层叠陶瓷电子部件具备包含层叠的电介质层和内部电极层的层叠体。电介质层具备包含Ba、Ti的多个电介质粒子。而且,层叠陶瓷电子部件在电介质粒子的界面存在由第1元素构成的第1浓缩区域,在从第1浓缩区域起50nm以内的界面存在由第1元素构成的第2浓缩区域。(The invention provides a laminated ceramic electronic component which inhibits the movement of oxygen vacancies in crystal grains forming a dielectric layer and has high reliability. A laminated ceramic electronic component includes a laminated body including laminated dielectric layers and internal electrode layers. The dielectric layer includes a plurality of dielectric particles including Ba and Ti. In the laminated ceramic electronic component, a 1 st concentrated region composed of the 1 st element is present at the interface between the dielectric particles, and a2 nd concentrated region composed of the 1 st element is present at the interface within 50nm from the 1 st concentrated region.)

1. A laminated ceramic electronic component, wherein,

the disclosed device is provided with: a stacked body including stacked dielectric layers and internal electrode layers,

the dielectric layer includes a plurality of dielectric particles including Ba and Ti,

a1 st condensed region composed of a 1 st element is present at an interface of the dielectric particles, and a2 nd condensed region composed of the 1 st element is present at an interface within 50nm from the 1 st condensed region.

2. The laminated ceramic electronic component according to claim 1,

a 3 rd concentrated region composed of a2 nd element exists between the 1 st concentrated region and the 2 nd concentrated region.

3. The laminated ceramic electronic component according to claim 2,

the 1 st and 3 rd condensation zones are adjacent.

4. The laminated ceramic electronic component according to any one of claims 1 to 3,

the 1 st element contains at least one rare earth element.

5. The laminated ceramic electronic component according to any one of claims 1 to 4,

the 2 nd element contains at least one metal selected from Ni, Cu, Pd, and Ag.

6. The laminated ceramic electronic component according to any one of claims 1 to 5,

the internal electrode layer contains the 2 nd element.

7. The laminated ceramic electronic component according to any one of claims 1 to 6,

the dielectric particles have a core-shell structure having a core and a shell.

8. The laminated ceramic electronic component according to any one of claims 1 to 7,

the thickness of the dielectric layer is 0.3 to 1.5 [ mu ] m.

Technical Field

The present disclosure relates to a laminated ceramic electronic component.

Background

In recent years, laminated ceramic electronic components such as laminated ceramic capacitors have been applied to electronic devices such as in-vehicle devices which require high reliability.

An example of a multilayer ceramic electronic component is a multilayer ceramic capacitor described in japanese patent application laid-open No. 2017-228590. The multilayer ceramic capacitor described in jp 2017-228590 a includes a dielectric layer containing a ceramic material and Ni, and an internal electrode layer containing Ni.

The insulation resistance when a high electric field is applied to the dielectric layer of a laminated ceramic capacitor as in the high-temperature load test tends to be dominated by the crystal grain boundaries of the dielectric particles constituting the dielectric layer. Jp 2017 a-228590 discloses a technique of suppressing variation in insulation resistance by introducing Ni, which diffuses from an internal electrode layer and is unevenly distributed at grain boundaries, into dielectric particles.

To improve the performance of the catalyst containing BaTiO₃The reliability of the dielectric layer laminated ceramic capacitor of (3) needs to suppress the movement of oxygen vacancies in the dielectric layer when a dc voltage is applied, in addition to introducing the Ni diffused from the internal electrode layers into the dielectric particles. For improving reliability, RE is a positive 3-valent ion of RE rare earth element³⁺To replace BaTiO₃As positive 2-valent ion of Ba in the crystal lattice of (a)²⁺Is effective (hereinafter, the label of the ion may be similar to the above label).

Ba is added as described above²⁺Quilt RE³⁺The positive charge becomes excessive by the substitution. Therefore, Ba holes that can be regarded as relatively charged to minus 2 are generated so as to satisfy the electrically neutral condition. The Ba vacancies form stable defect pairs with oxygen vacancies that can be considered to be relatively charged to the positive valence 2. Since Ba vacancies are less likely to move even when a dc voltage is applied thereto, the Ba vacancies hold them, thereby suppressing the movement of oxygen vacancies.

It is known that the movement of the oxygen vacancies can be suppressed by the structure near the grain boundaries of the dielectric particles. For example, in the case of a composition containing BaTiO using a lattice statics method₃The calculation of the stable structure of the corresponding grain boundaries of the dielectric of (2) shows that there are many positions near the grain boundaries which are stable to oxygen vacancies. Due to the above-mentioned Ba²⁺Quilt RE³⁺The presence of Ba vacancies due to substitution is an important factor for the stability of the oxygen vacancies in the vicinity of the grain boundaries.

To make the device contain BaTiO₃The reliability of the multilayer ceramic capacitor of (2) is improved, and it is necessary to suppress the movement of oxygen vacancies in the crystal grains constituting the dielectric layer, but Japanese patent application laid-open No. 2No. 017-228590 is described therein.

Disclosure of Invention

The laminated ceramic electronic component according to the present disclosure includes a laminated body including laminated dielectric layers and internal electrode layers. The dielectric layer includes a plurality of dielectric particles including Ba and Ti. Furthermore, a 1 st concentrated region composed of the 1 st element is present at the interface of the dielectric particles, and a2 nd concentrated region composed of the 1 st element is present at the interface within 50nm from the 1 st concentrated region.

By disposing an element capable of suppressing the movement of oxygen vacancies at the interface, the multilayer ceramic electronic component can be highly reliable.

The above and other objects, features, aspects and advantages of the present invention will become apparent from the following detailed description, which is to be read in connection with the accompanying drawings.

Drawings

Fig. 1 is a sectional view of a laminated ceramic capacitor 100 as embodiment 1 of the laminated ceramic electronic component according to the present disclosure.

Fig. 2 is a cross-sectional view for explaining a sample prepared for examining the microstructure of the dielectric layer 11 of the multilayer ceramic capacitor 100.

Fig. 3 is a schematic view of a transmission electron microscope (hereinafter, abbreviated as TEM) observation image in the central region of fig. 2.

Fig. 4 is a schematic diagram of analysis results of distribution of Dy and Ni by energy dispersive X-ray analysis (hereinafter, abbreviated as EDX in some cases) in the region shown in fig. 3.

Detailed Description

The features that characterize the present disclosure are explained with reference to the drawings. In the embodiments of the laminated ceramic electronic component described below, the same or common portions are denoted by the same reference numerals in the drawings, and the description thereof may not be repeated.

Embodiment of laminated ceramic electronic component

A multilayer ceramic capacitor 100 according to embodiment 1 of the present disclosure showing a multilayer ceramic electronic component will be described with reference to fig. 1 to 4.

< Structure of multilayer ceramic capacitor >

Fig. 1 is a sectional view of a laminated ceramic capacitor 100. The multilayer ceramic capacitor 100 includes a multilayer body 10. The stacked body 10 includes a plurality of dielectric layers 11 and a plurality of internal electrode layers 12 stacked. The plurality of dielectric layers 11 have an outer layer portion and an inner layer portion. The outer layer portions are disposed between the 1 st main surface and the inner electrode layer 12 closest to the 1 st main surface, and between the 2 nd main surface and the inner electrode layer 12 closest to the 2 nd main surface of the laminate 10. The inner layer portion is disposed in a region sandwiched by the two outer layer portions.

The plurality of internal electrode layers 12 have a 1 st internal electrode layer 12a and a2 nd internal electrode layer 12 b. The laminate 10 has a 1 st main surface and a2 nd main surface opposed in the lamination direction, a 1 st side surface and a2 nd side surface opposed in the width direction orthogonal to the lamination direction, and a 1 st end surface 13a and a2 nd end surface 13b opposed in the longitudinal direction orthogonal to the lamination direction and the width direction.

As described later, the dielectric layer 11 has a plurality of dielectric particles, and BaTiO is contained as a compound₃A perovskite-type compound, and contains, as an element, the 1 st element M1 which is a rare earth element RE.

Examples of the dielectric material include BaTiO₃Ba2 in crystal lattice of perovskite-like compound⁺Is partially RE³⁺A displaced material. Examples of the rare earth element RE include Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb. Further, as BaTiO₃Perovskite-type compounds of the group, BaTiO being exemplified₃And BaTiO₃Ba of (5)²⁺And Ti^{4 +}Is at least one of Ca²⁺And Zr⁴⁺And other ion-substituted compounds, and the like. Hereinafter, they are sometimes collectively referred to as BaTiO₃A dielectric-like material.

The 1 st internal electrode layer 12a includes a counter electrode portion facing the 2 nd internal electrode layer 12b with the dielectric layer 11 interposed therebetween, and a lead electrode portion extending from the counter electrode portion to the 1 st end face 13a of the laminate 10. The 2 nd internal electrode layer 12b includes a counter electrode portion facing the 1 st internal electrode layer 12a with the dielectric layer 11 interposed therebetween, and a lead electrode portion extending from the counter electrode portion to the 2 nd end face 13b of the laminate 10.

The 1 st internal electrode layer 12a and the 2 nd internal electrode layer 12b face each other with the dielectric layer 11 interposed therebetween, thereby forming one capacitor. The multilayer ceramic capacitor 100 can be said to be formed by connecting a plurality of capacitors in parallel via the 1 st external electrode 14a and the 2 nd external electrode 14b described later.

As the conductive material constituting the internal electrode layers 12, at least 2 nd element selected from Ni, Cu, Ag, Pd, and the like as the 2 nd element group or an alloy containing the element can be used. The internal electrode layers 12 may further contain a dielectric substance called a common material as described later. The common material is added to the internal electrode layer paste for forming the internal electrode layers 12 in order to make the sintering shrinkage characteristics of the internal electrode layers 12 close to the sintering shrinkage characteristics of the dielectric layers 11 when the stacked body 10 is fired.

The multilayer ceramic capacitor 100 further includes a 1 st external electrode 14a and a2 nd external electrode 14 b. The 1 st external electrode 14a is formed on the 1 st end surface 13a of the laminate 10 so as to be electrically connected to the 1 st internal electrode layer 12a, and extends from the 1 st end surface 13a to the 1 st main surface and the 2 nd main surface and the 1 st side surface and the 2 nd side surface. The 2 nd external electrode 14b is formed on the 2 nd end surface 13b of the laminate 10 so as to be electrically connected to the 2 nd internal electrode layer 12b, and extends from the 2 nd end surface 13b to the 1 st main surface and the 2 nd main surface and the 1 st side surface and the 2 nd side surface.

The 1 st external electrode 14a and the 2 nd external electrode 14b have a base electrode layer and a plating layer disposed on the base electrode layer. The base electrode layer includes at least one selected from a sintered body layer, a conductive resin layer, a metal thin film layer, and a plating layer.

The sintered body layer is formed by firing a paste containing a metal powder and a glass powder, and includes a conductor region and an oxide region. The conductor region includes a metal sintered body obtained by sintering the metal powder. As the metal powder, at least one selected from Ni, Cu, Ag, and the like or an alloy containing the metal can be used.The oxide region contains a glass component derived from the above-described glass powder. As the glass powder, B can be used₂O₃-SiO₂A BaO-based glass material, and the like. Further, the sintered body layer may be formed into a plurality of layers of different compositions. The sintered body layer may be fired simultaneously with the laminate 10, or may be fired after the laminate 10 is fired.

The conductive resin layer contains, for example, conductive particles such as metal microparticles and a resin portion. As the metal constituting the conductive particles, at least one selected from Ni, Cu, Ag, and the like, or an alloy containing the metal can be used. As the resin constituting the resin portion, epoxy thermosetting resin or the like can be used. The conductive resin layer may be formed into a plurality of layers of different compositions.

The metal thin film layer is a layer having a thickness of 1 μm or less formed by depositing metal fine particles by a thin film forming method such as sputtering or vapor deposition. As the metal constituting the metal thin film layer, at least one selected from Ni, Cu, Ag, Au, and the like, or an alloy containing the metal can be used. The metal thin film layer may be formed into a plurality of layers of different compositions.

The plating layer as the base electrode is directly provided on the laminate 10 and is directly connected to the internal electrode layer. As the plating layer, at least one selected from Cu, Ni, Sn, Au, Ag, Pd, Zn, and the like, or an alloy containing the metal can be used. For example, when Ni is used as the metal constituting the internal electrode layers 12, Cu having good bondability to the internal electrode layers 12 is preferably used as the plating layer.

As the metal constituting the plating layer disposed on the base electrode layer, at least one selected from Ni, Cu, Ag, Au, Sn, and the like, or an alloy containing the metal can be used. The plating layer may also be formed of multiple layers of different compositions. Preferably two layers of a Ni plating layer and a Sn plating layer.

The Ni plating layer is disposed on the base electrode layer, and can prevent the base electrode layer from being corroded by solder when the laminated ceramic electronic component is mounted on a circuit board or the like by using the solder. The Sn plating layer is disposed on the Ni plating layer. Since the Sn plating layer has good wettability with solder containing Sn, when a multilayer ceramic electronic component is mounted, the mountability can be improved. In addition, these plating layers are not necessary.

< microstructure of dielectric layer >

In order to examine the fine structure of the dielectric particles included in the dielectric layer 11 of the laminated ceramic capacitor 100 according to the present disclosure, TEM observation and element mapping by EDX accompanying TEM were performed.

In this investigation, BaTiO designed as follows was used as the material of the dielectric layer 11₃Dielectric-like materials, i.e. with BaTiO₃Has a basic structure and has a plurality of dielectric particles containing Dy as the 1 st element M1 and other additive elements. Further, Ni is used as a material of the internal electrode layers 12.

The preparation of a sample for TEM observation and EDX mapping will be described with reference to fig. 2. Fig. 2 is a cross-sectional view for explaining a sample prepared for examining the microstructure of the dielectric layer 11 of the multilayer ceramic capacitor 100.

A multilayer body 10 of the multilayer ceramic capacitor 100 was obtained by a manufacturing method described later. The laminate 10 was polished from the 1 st side surface side and the 2 nd side surface side so as to leave the central portion of the laminate 10 in the width direction, thereby obtaining a polished body. As shown in fig. 2, a virtual line OL is assumed which is orthogonal to the internal electrode layers 12 in the vicinity of the central portion in the longitudinal direction. Then, the region in which the dielectric layer 11, the 1 st internal electrode layer 12a, and the 2 nd internal electrode layer 12b are laminated, which is involved in obtaining the electrostatic capacitance of the polishing body, is divided into three regions, i.e., an upper region, a central region, and a lower region, in the laminating direction along the virtual line OL.

The upper region, the central region, and the lower region were cut out from the polishing body and thinned by Ar ion polishing or the like, and three thin film samples were obtained from each region. The three thin film samples in the upper region, the central region, and the lower region of the laminate 10 obtained in the above manner were subjected to TEM observation and element mapping by EDX attached to TEM.

Fig. 3 and 4 are schematic diagrams showing TEM observation and EDX-based element mapping results. Fig. 3 is a schematic diagram of a TEM observation image in the central region of fig. 2. Fig. 4 is a schematic diagram of the analysis result of the distribution of Dy and Ni by EDX in the region shown in fig. 3. Here, the center of gravity of the dielectric particles is calculated, the interface of the dielectric particles and the center of gravity are connected by a line, and a region in which the molar ratio of an element at a position shifted by 40% from the interface on the line segment toward the center of gravity to 100 moles of Ti is 1.5 times or more is defined as a concentrated region. When the molar ratio of the element on the gravity center side to 100 moles of Ti is equal to or less than the detection limit, a region having a molar ratio of 1.5 times or more the value equal to or less than the detection limit is defined as a concentrated region. In the present embodiment, these concentrated regions are disposed in the dielectric particles in contact with the interface. The 1 st element-containing condensed region is defined as a 1 st condensed region R1 and a2 nd condensed region R2, and the 2 nd element-containing condensed region is defined as a 3 rd condensed region R3. The 1 st concentrated region R1 and the 2 nd concentrated region R2 exist within 50nm in a region in contact with the interface.

Further, the 3 rd concentrated region R3 may exist between the 1 st concentrated region R1 and the 2 nd concentrated region R2. The 3 rd condensation area R3 is preferably adjacent to the 1 st condensation area R1 and the 2 nd condensation area R2. By being adjacent without a gap, the movement of oxygen vacancies between the dielectric particles can be effectively suppressed. Further, a 4 th concentrated region selected from the 1 st element group and the 2 nd element group may be further present between the 1 st concentrated region R1 and the 2 nd concentrated region R2. Therefore, the longer the line segment where the 1 st concentrated region R1 or the 2 nd concentrated region R2 of the dielectric particles meet at the interface, the more the dielectric particles are surrounded, and the reliability is improved. On the other hand, if the line segment is too long, the region of the dielectric particles occupied by the 1 st condensed region R1 or the 2 nd condensed region R2 inevitably becomes large, which causes a problem of lowering the dielectric constant ∈.

The thickness of the dielectric layer 11 is determined by performing image analysis of an observation image of a scanning electron microscope (hereinafter, may be abbreviated as SEM) at the center of each region on the virtual line OL. However, the thickness of the dielectric layer 11 was measured excluding the outermost dielectric layer 11 and the portions where two or more dielectric layers 11 were observed to be connected due to the defect of the internal electrode layer 12 in each region. The average thickness of the dielectric layer 11 is obtained by calculating an arithmetic mean of the thicknesses of a plurality of portions (10 portions or more) of the dielectric layer 11. As a result, it was confirmed that the average thickness of the dielectric layer 11 was 1.5. mu.m. However, the average thickness of the dielectric layer 11 is not limited to this, and is preferably 0.3 μm or more and 1.5 μm or less.

The grain boundaries GB of the dielectric particles G in the TEM observation image of fig. 3 were visually determined. The average particle diameter of the dielectric particles G determined as the median diameter of the equivalent circle diameter based on the image analysis of the TEM observed image was 0.13 μm. In order to make the features of the present disclosure easily understandable, the grain boundaries GB of the dielectric particles G are also shown in the schematic diagram of the analysis results of the distribution of Dy and Ni in fig. 4.

As shown in fig. 3 and 4, the plurality of dielectric particles G can be roughly divided into a 1 st part P1 located along the crystal grain boundary GB of the dielectric particles G and a2 nd part P2 located at the center of the dielectric particles G.

Part 1P 1 is in BaTiO₃A portion in which Dy as the 1 st element M1, Ni as the 2 nd element M2, and other optional additional elements are solid-dissolved. In addition, the amount of the solid solution of each element in the 2 nd part P2 is smaller than that in the 1 st part P1 and is close to pure BaTiO₃Part (c) of (a). The amount of Dy and the amount of Ni contained in part 2P 2 are preferably equal to or less than the detection sensitivity of EDX other than background noise. That is, at least a part of the plurality of dielectric particles G has a so-called core-shell structure. The core-shell structure is not limited, and the 1 st element and the 2 nd element may be homogeneously distributed.

Dy passes through BaTiO₃Ba in the crystal lattice of perovskite-like compounds²⁺Is partially Dy³⁺The dielectric particles G are replaced and dissolved in the dielectric particles G. Furthermore, Ni is converted into BaTiO₃Ti in the crystal lattice of perovskite-like compounds⁴⁺Is partially covered with Ni²⁺Is replaced and dissolved inDielectric particles G.

As shown in fig. 4, the dielectric particles G containing Ni, which is the 2 nd element M2, which is a metal element constituting the internal electrode layer (not shown) have a plurality of 1 st concentrated regions R1, a plurality of 2 nd concentrated regions R2, and a plurality of 3 rd concentrated regions R3 located along the grain boundaries GB. In the 1 st and 2 nd concentrated regions R1 and R2, more Dy is present than in the 3 rd concentrated region R3, and in the 3 rd concentrated region R3, more Ni is present than in the 1 st and 2 nd concentrated regions R1 and R2. Also, the 3 rd condensed region R3 exists between the 1 st condensed region R1 and the 2 nd condensed region R2.

It is presumed that Dy and Ni can stably exist along the grain boundaries GB of the dielectric particles G by the above-described structure. For example, it is considered that BaTiO is formed₃The 1 st and 2 nd concentrated regions R1 and R2 in which Dy is dissolved in the Ba site, and the 3 rd concentrated region R3 in which Ni is dissolved in the Ti site of the dielectric particles G cause strain. It is presumed that the above-described structure is formed to alleviate the deformation. However, the mechanism of formation of the above-described configuration is not understood. It should be noted that the above-described configuration is not dependent on a particular formation mechanism.

As described above, to improve the properties of the composition containing BaTiO₃The reliability of the dielectric layer laminated ceramic capacitor of (3) needs to suppress the movement of oxygen vacancies in the dielectric layer when a dc voltage is applied, in addition to introducing the metal element diffused from the internal electrode layer into the dielectric particles. In the laminated ceramic capacitor 100 according to the present disclosure, the above-described structure is formed along the crystal grain boundaries GB of the dielectric particles G. Therefore, Ni (element No. 2M 2) is introduced into the dielectric particles in the vicinity of the grain boundaries, and a decrease in insulation resistance can be suppressed.

Further, in the laminated ceramic capacitor 100, Dy (the 1 st element M1) is distributed in the vicinity of the grain boundaries of the dielectric particles G. Therefore, it is presumed that Dy-based atoms are formed in the vicinity of the grain boundaries³⁺And Ba²⁺A sufficient amount of Ba vacancies. That is, there are many sites near the grain boundaries that are stable to oxygen vacancies. As a result, it is presumed that, in the dielectric layer 11,by being held by the Ba vacancies, the movement of oxygen vacancies can be suppressed. The reliability of the laminated ceramic capacitor 100 can be improved by suppressing the decrease in insulation resistance and suppressing the movement of oxygen vacancies as described above.

< method for producing multilayer ceramic capacitor >

Next, a method for manufacturing the multilayer ceramic capacitor 100 showing an embodiment of the multilayer ceramic electronic component according to the present disclosure will be described in order of manufacturing steps. The method of manufacturing the multilayer ceramic capacitor 100 includes the following steps. Note that the reference numerals for the components correspond to those for the components shown in fig. 1.

The method for manufacturing the multilayer ceramic capacitor 100 includes a step of subjecting BaTiO subjected to plasma treatment₃The powders were further added with an appropriate amount of Si, Mg, and Mn, and mixed, and powders of Dy compound, Ni powder corresponding to element 2M 2, and compound added with other optional additional elements (dielectric raw material powder) were used to obtain a plurality of ceramic green sheets. Here, Dy corresponds to the 1 st element M1 which is a rare earth element RE. Examples of the rare earth element RE include Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb.

The term "green" is used to mean "before sintering", and is also used hereinafter in that sense. The ceramic green sheet contains a binder component in addition to the dielectric raw material powder. The binder component is not particularly limited.

About BaTiO₃Powders, e.g. of BaCO₃Powder and TiO₂The mixture of powders was pre-fired as BaTiO₃And (3) powder. On the other hand, BaTiO produced by a known method such as an oxalic acid method or hydrothermal synthesis method may be used₃And (3) powder.

The method of manufacturing the multilayer ceramic capacitor 100 includes a step of printing an internal electrode layer pattern on a ceramic green sheet using an internal electrode layer paste. The internal electrode layer paste contains Ni powder and p-BaTiO₃The surface of the powder is provided with various additive elementsPowders of the compound (public materials), and binder ingredients.

The common material can be produced, for example, by applying to BaTiO₃The surface of the powder is provided with various organic compounds of additive elements, and the organic compounds are burned to burn the organic components, so that the additive elements are provided to the BaTio in the state of oxides₃The state of the surface of the powder. However, the organic compound may be in a state of not being limited thereto, or may be in a state of being mixed with an oxide and the organic compound. Further, it is not limited to BaTiO₃Powder of BaTiO or BaTiO₃A solid solution powder.

In this case, BaTiO for ceramic green sheet₃Solid solution and BaTiO for internal electrode layer paste₃The solid solutions may be of the same kind or of different kinds.

The method of manufacturing the multilayer ceramic capacitor 100 includes a step of stacking a plurality of ceramic green sheets including the ceramic green sheet having the internal electrode layer pattern formed thereon to obtain a green laminate.

The method for manufacturing the multilayer ceramic capacitor 100 includes a step of obtaining a multilayer body 10 including a plurality of dielectric layers 11 and a plurality of internal electrode layers 12 stacked by sintering a green multilayer body.

Presumably, by using the BaTiO described above₃In the multilayer ceramic capacitor 100, the powder, Dy compound, and Ni powder corresponding to the 2 nd element M2 are plasma-treated, so that Ni (the 2 nd element M2) is introduced into the dielectric particles G in the vicinity of the grain boundaries, and a decrease in insulation resistance can be suppressed. Further, it is presumed that Dy (element 1M 1) is distributed in the vicinity of the grain boundary GB of the dielectric particles G, and therefore, Ba vacancies are generated in a sufficient amount in the vicinity of the grain boundary GB, and are held by the Ba vacancies in the dielectric layer 11, whereby the movement of oxygen vacancies can be suppressed. As shown in table 1, the suppression of the decrease in insulation resistance and the suppression of the movement of oxygen vacancies described above can improve the reliability of the multilayer ceramic capacitor 100.

The samples of examples 1 to 18 of the laminated ceramic capacitor 100 according to the embodiment of the present invention shown in table 1 below are samples in which the 1 st element M1 was introduced into the dielectric particles G by performing the plasma treatment to form the 1 st condensed region R1 and the 2 nd condensed region R2, and the 2 nd element M2 was introduced into the dielectric particles G by the plasma treatment to form the 3 rd condensed region R3. The 1 st and 2 nd concentrated regions R1 and R2 have a concentration of the 1 st element M1 added by the plasma treatment which is 1.5 times or more the concentration of 100 moles of Ti. Further, the 3 rd concentrated region R3 is a region having a concentration of the 2 nd element M2 added by the plasma treatment which is 1.5 times or more the concentration of 100 moles of Ti. The length of each line segment at the interface between the 1 st concentrated region R1 and the 3 rd concentrated region R3, which are segregated at the dielectric particle interface, is shown as an average of 10.

The mean failure time as an index for determining the reliability of the high-temperature load in table 1 is an average value of times during which a failure due to a short circuit or deterioration of insulation resistance occurs when a voltage of 6.3V is applied to 10 samples in a high-temperature environment of 120 ℃. The dielectric constant ∈ is also an average value of the measured values of 10 samples. Here, the determination in the case where the failure time is 10 hours or more and the dielectric constant ∈ is 2000 or more is indicated by ∘. In particular, the judgment when the failure time exceeded 30 hours was expressed as ∈. On the other hand, the determination when the failure time is 10 hours or less and the dielectric constant ∈ is less than 2000 is represented by ×. As described later, the comparative example is a sample judged to be x.

As shown in table 1, in examples 1 to 3, the dielectric layer had a thickness of 1.0 μm and only the 1 st concentrated region R1 was present, in examples 4, 5, and 9, the dielectric layer had a thickness of 1.0 μm and the 1 st concentrated region R1 and the 3 rd concentrated region R3 were present, in examples 6 to 8, the dielectric layer had a thickness of 1.0 μm and the 1 st concentrated region R1 and the 3 rd concentrated region R3 were present, and the alloy containing a plurality of elements was present in the 3 rd concentrated region R3. In examples 10 to 12, the dielectric layer had a thickness of 0.5 μm and only the 1 st concentrated region R1 was present, in examples 13, 14, and 18, the dielectric layer had a thickness of 0.5 μm and the 1 st concentrated region R1 and the 3 rd concentrated region R3 were present, in examples 15 to 17, the dielectric layer had a thickness of 0.5 μm and the 1 st concentrated region R1 and the 3 rd concentrated region R3 were present, and an alloy containing a plurality of elements was present in the 3 rd concentrated region R3.

In various embodiments, the mean time to failure is longer because of the presence of the condensed region. Further, since the line segment on the boundary is not too long, the decrease in the dielectric constant ∈ can be suppressed. In comparative examples 1 and 4, since there was no concentrated region, the mean failure time was less than 10 hours in terms of high-temperature reliability, and the evaluation was "x". In comparative examples 2, 3, 5 and 6, the dielectric constant ∈ was decreased and evaluated as "x", although the failure time exceeded 10 hours.

[ Table 1]

The embodiments disclosed in the present specification are illustrative, and the invention according to the present disclosure is not limited to the embodiments described above. That is, the scope of the invention according to the present disclosure is defined by the claims, and all changes that come within the meaning and range equivalent to the claims are intended to be embraced therein. In addition, various applications and modifications can be applied within the above range.

For example, various applications and modifications can be made to the number of layers of the dielectric layers and the internal electrode layers constituting the laminate, and the materials of the dielectric layers and the internal electrode layers within the scope of the present invention. Although the multilayer ceramic capacitor is exemplified as the multilayer ceramic electronic component, the invention according to the present disclosure is not limited thereto, and can be applied to a capacitor element and the like formed inside a multilayer substrate.