阅读说明：本技术 阵列基板及其制备方法、显示面板 (Array substrate, preparation method thereof and display panel ) 是由 段淼 李冬泽 于 2020-09-04 设计创作，主要内容包括：本发明提供一种阵列基板及其制备方法、显示面板,阵列基板包括衬底基板、薄膜晶体管阵列层以及至少一抗辐射层,薄膜晶体管阵列层包括氧化物半导体层,抗辐射层包括相对设置的入光侧和出光侧,出光侧靠近氧化物半导体层设置,入光侧配置成用于使高能量光波经由入光侧进入抗辐射层,抗辐射层配置成用于将高能量光波转换为可见光,出光侧配置成用于使可见光经由出光侧进入氧化物半导体层,使得转换的可见光达不到激发氧化物半导体层产生电子空穴对或氧空穴所需能量,从而避免对氧化物半导体(例如IGZO)产生破坏,能够提高氧化物半导体层的光照稳定性。(The invention provides an array substrate, a preparation method thereof and a display panel, wherein the array substrate comprises a substrate, a thin film transistor array layer and at least one anti-radiation layer, the thin film transistor array layer comprises an oxide semiconductor layer, the anti-radiation layer comprises a light inlet side and a light outlet side which are oppositely arranged, the light outlet side is close to the oxide semiconductor layer, the light inlet side is configured to enable high-energy light waves to enter the anti-radiation layer through the light inlet side, the anti-radiation layer is configured to convert the high-energy light waves into visible light, and the light outlet side is configured to enable the visible light to enter the oxide semiconductor layer through the light outlet side, so that the converted visible light cannot reach the energy required by exciting the oxide semiconductor layer to generate electron hole pairs or oxygen hole pairs, damage to the oxide semiconductor (such as IGZO) is avoided, and the illumination stability of the oxide semiconductor layer.)

1. An array substrate, comprising:

a substrate base plate;

the thin film transistor array layer is arranged on the substrate base plate and comprises an oxide semiconductor layer; and

at least one anti-radiation layer, including relative income light side and the play light side that sets up, the play light side is close to oxide semiconductor layer sets up, it is used for making the high energy light wave via to go into to the light side anti-radiation layer, anti-radiation layer is configured to be used for with high energy light wave converts visible light into, the play light side is configured to be used for making visible light goes into through the play light side oxide semiconductor layer.

2. The array substrate of claim 1, wherein the anti-radiation layer is disposed on a side of the substrate away from the thin film transistor array layer, the light incident side is a side of the anti-radiation layer away from the substrate, and the light emergent side is a side of the anti-radiation layer close to the substrate.

3. The array substrate of claim 1, wherein the thin film transistor array layer further comprises:

a light shielding layer disposed on the substrate;

a buffer layer covering the substrate and the light-shielding layer, the oxide semiconductor layer being disposed on the buffer layer;

a gate insulating layer disposed on the oxide semiconductor layer;

a gate electrode layer disposed on the gate insulating layer;

an interlayer dielectric layer covering the buffer layer, the oxide semiconductor layer, the gate insulating layer and the gate layer, the interlayer dielectric layer including a first through hole, a second through hole and a third through hole;

the source electrode and the drain electrode are arranged on the interlayer dielectric layer, the source electrode is connected with the shading layer through the second through hole, the source electrode is connected with the oxide semiconductor layer through the third through hole, and the drain electrode is connected with the oxide semiconductor layer through the first through hole; and

and the passivation layer covers the interlayer dielectric layer, the source electrode and the drain electrode.

4. The array substrate of claim 3, wherein the radiation-resistant layer is disposed on a side of the passivation layer away from the substrate, the light-incident side is a side of the radiation-resistant layer away from the substrate, and the light-emitting side is a side of the radiation-resistant layer close to the substrate.

5. The array substrate of claim 3, wherein the radiation-resistant layer is disposed on a side of the substrate close to the thin film transistor array layer, and the light-shielding layer is disposed on a side of the radiation-resistant layer away from the substrate.

6. The array substrate of claim 1, wherein the high energy light waves comprise ultraviolet light.

7. The array substrate of claim 6, wherein the radiation-resistant layer comprises a radiation-resistant resin comprising a down-conversion material, a resin, a fluoromonomer or fluoropolymer, a UV initiator, and a solvent;

wherein the mass percentages of the down-conversion material, the resin, the fluorine-containing monomer or the fluorine-containing polymer, the ultraviolet initiator and the solvent are respectively 0.1-5%, 50-90%, 1-20%, 1-5% and 20-40%.

8. The array substrate of claim 1, wherein the oxide semiconductor layer is IGZO.

9. A display panel, comprising the array substrate of any one of claims 1 to 8, wherein the display panel is a liquid crystal display panel or an organic light emitting diode display panel.

10. The preparation method of the array substrate is characterized by comprising the following steps:

s10: providing a substrate, and forming a thin film transistor array layer on the substrate; and

s20: preparing anti-radiation resin, coating the anti-radiation resin on the array substrate, and curing the array substrate under an ultraviolet lamp to form an anti-radiation layer.

Technical Field

The invention relates to the technical field of display, in particular to an array substrate, a preparation method of the array substrate and a display panel.

Background

Thin Film Transistor (TFT) technology is one of the core technologies of flat panel displays, and both Liquid Crystal Display (LCD) and Organic Light-Emitting semiconductor (OLED) Display devices require a TFT backplane for driving. Due to the low mobility of amorphous silicon (α -Si) materials, it is difficult to meet the future requirements for large-size and high-resolution displays. Low temperature Poly-silicon (LTPS) materials, while relatively high in mobility, suffer from high cost, poor uniformity, and difficulty in increasing area. Therefore, metal oxides having high mobility, such as Indium Gallium Zinc Oxide (IGZO), are very important for TFT backplanes.

However, high energy photons (e.g., UV light) in the ambient light excite IGZO to generate electron-hole pairs or oxygen vacancies, which generate free electrons and cause "negative drift" in the threshold voltage, resulting in poor illumination stability of IGZO.

In summary, it is desirable to provide a new array substrate, a method for manufacturing the same, and a display panel, so as to solve the above technical problems.

Disclosure of Invention

The array substrate, the preparation method thereof and the display panel provided by the invention solve the technical problems that in the prior art, the threshold voltage is negatively floated due to the fact that external high-energy photons excite IGZO to generate electron hole pairs or oxygen vacancies and generate free electrons, and the illumination stability of the IGZO is poor and the like.

In order to solve the above problems, the technical scheme provided by the invention is as follows:

an embodiment of the present invention provides an array substrate, including:

a substrate base plate;

the thin film transistor array layer is arranged on the substrate base plate and comprises an oxide semiconductor layer; and

at least one anti-radiation layer, including relative income light side and the play light side that sets up, the play light side is close to oxide semiconductor layer sets up, it is used for making the high energy light wave via to go into to the light side anti-radiation layer, anti-radiation layer is configured to be used for with high energy light wave converts visible light into, the play light side is configured to be used for making visible light goes into through the play light side oxide semiconductor layer.

According to the array substrate provided by the embodiment of the invention, the anti-radiation layer is arranged on one side of the substrate far away from the thin film transistor array layer, the light incident side is the side of the anti-radiation layer far away from the substrate, and the light emergent side is the side of the anti-radiation layer close to the substrate.

According to the array substrate provided by the embodiment of the invention, the thin film transistor array layer further comprises:

a light shielding layer disposed on the substrate;

a buffer layer covering the substrate and the light-shielding layer, the oxide semiconductor layer being disposed on the buffer layer;

a gate insulating layer disposed on the oxide semiconductor layer;

a gate electrode layer disposed on the gate insulating layer;

an interlayer dielectric layer covering the buffer layer, the oxide semiconductor layer, the gate insulating layer and the gate layer, the interlayer dielectric layer including a first through hole, a second through hole and a third through hole;

the source electrode and the drain electrode are arranged on the interlayer dielectric layer, the source electrode is connected with the shading layer through the second through hole, the source electrode is connected with the oxide semiconductor layer through the third through hole, and the drain electrode is connected with the oxide semiconductor layer through the first through hole; and

and the passivation layer covers the interlayer dielectric layer, the source electrode and the drain electrode.

According to the array substrate provided by the embodiment of the invention, the anti-radiation layer is arranged on one side of the passivation layer, which is far away from the substrate, the light-in side is the side of the anti-radiation layer, which is far away from the substrate, and the light-out side is the side of the anti-radiation layer, which is close to the substrate.

According to the array substrate provided by the embodiment of the invention, the radiation-resistant layer is arranged on one side of the substrate close to the thin film transistor array layer, and the light shielding layer is arranged on one side of the radiation-resistant layer far away from the substrate.

According to the array substrate provided by the embodiment of the invention, the high-energy light waves comprise ultraviolet light.

According to the array substrate provided by the embodiment of the invention, the radiation-resistant layer comprises a radiation-resistant resin, wherein the radiation-resistant resin comprises a down-conversion material, a resin, a fluorine-containing monomer or a fluorine-containing polymer, an ultraviolet initiator and a solvent;

wherein the mass percentages of the down-conversion material, the resin, the fluorine-containing monomer or the fluorine-containing polymer, the ultraviolet initiator and the solvent are respectively 0.1-5%, 50-90%, 1-20%, 1-5% and 20-40%. .

According to the array substrate provided by the embodiment of the invention, the material of the oxide semiconductor layer is IGZO.

The embodiment of the invention provides a display panel, which comprises the array substrate, wherein the display panel is a liquid crystal display panel or an organic light emitting diode display panel.

The embodiment of the invention provides a preparation method of an array substrate, which comprises the following steps:

s10: providing a substrate, and forming a thin film transistor array layer on the substrate; and

s20: preparing anti-radiation resin, coating the anti-radiation resin on the array substrate, and curing the array substrate under an ultraviolet lamp to form an anti-radiation layer.

The invention has the beneficial effects that: according to the array substrate, the preparation method thereof and the display panel provided by the invention, at least one anti-radiation layer with a down-conversion function is arranged on the array substrate, and the anti-radiation layer can absorb high-energy rays in external light and convert the high-energy rays into low-energy visible light, so that the energy required by exciting an oxide semiconductor layer to generate electron hole pairs or oxygen hole pairs cannot be reached, the oxide semiconductor (such as IGZO) is prevented from being damaged, and the illumination stability of the oxide semiconductor layer can be improved.

Drawings

In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic cross-sectional structure diagram of a first array substrate according to an embodiment of the present invention;

fig. 2 is a schematic cross-sectional structure view of a second array substrate according to an embodiment of the invention;

fig. 3 is a schematic cross-sectional structure diagram of a third array substrate according to an embodiment of the invention;

fig. 4 is a schematic cross-sectional structure diagram of a fourth array substrate according to an embodiment of the present invention;

fig. 5 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention;

fig. 6 is a schematic cross-sectional structure diagram of another display panel according to an embodiment of the present invention;

fig. 7 is a flowchart of a method for manufacturing an array substrate according to an embodiment of the invention.

Detailed Description

The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.

Aiming at the array substrate, the preparation method thereof and the display panel in the prior art, the embodiment of the invention can solve the defect that the illumination stability of the IGZO is poor due to the fact that external high-energy photons excite the IGZO to generate electron hole pairs or oxygen vacancies and generate free electrons to cause negative drift of the threshold voltage.

Referring to fig. 1, an array substrate 1 according to an embodiment of the present invention includes a substrate 10, a thin film transistor array layer 20, and at least one anti-radiation layer 30.

The substrate base plate 10 may be one of a glass base plate, a quartz base plate, and a resin base plate. The thin film transistor array layer 20 is disposed on the substrate base plate 10, the thin film transistor array layer 20 includes an oxide semiconductor layer 203, and a material of the oxide semiconductor layer 203 may be IGZO.

The anti-radiation layer 30 includes the relative income light side 301 and the play light side 302 that set up, the play light side 302 is close to oxide semiconductor layer 203 sets up, it is used for making the high energy light wave via to go into light side 301 anti-radiation layer 30, anti-radiation layer 30 is configured to be used for with the high energy light wave converts to visible light, it is used for making to go out light side 302 is configured to be used for making visible light via it enters to go out light side 203 oxide semiconductor layer 203. That is, when the array substrate 1 is irradiated by the external light, the external light enters the anti-radiation layer 30 from the light incident side 301, and exits the anti-radiation layer 30 from the light exiting side 302. Since the anti-radiation layer 30 provided in the embodiment of the invention has a down-conversion function, that is, the high-energy light waves entering the anti-radiation layer 30 through the light-incident side 301 can be converted into visible light, and the visible light enters the oxide semiconductor layer 203 through the light-emitting side 302. Because the energy of the visible light is low, the energy cannot reach the energy required for exciting the oxide semiconductor layer 203 to generate electron-hole pairs or oxygen-hole pairs, and free electrons cannot be generated, so that the negative influence of high-energy light waves on the oxide semiconductor layer 203 can be avoided, the illumination stability of the oxide semiconductor layer 203 is improved, and the service life of the array substrate 1 is prolonged.

Note that, the high-energy light waves affecting the stability of the oxide semiconductor layer 203 include ultraviolet light, and in fact, light waves having a larger energy than the ultraviolet light cause instability of the oxide semiconductor layer 203, such as: x-rays, and the like. Generally, since the array substrate 1 is rarely exposed to high-energy rays in a general application environment, it is easily affected by an ultraviolet component mainly in sunlight. Therefore, in the embodiment of the present invention, the high-energy light wave is taken as the ultraviolet light for illustration, but it is not meant that the radiation-resistant layer 30 provided in the embodiment of the present invention cannot resist the radiation of the high-energy rays other than the ultraviolet light.

Specifically, the thin film transistor array layer 20 further includes a light-shielding layer 201, a buffer layer 202, a gate insulating layer 204, a gate layer 205, an interlayer dielectric layer 206, a source electrode 207, a drain electrode 208, and a passivation layer 209.

The light shielding layer 201 is disposed on the substrate 10, and is used to reduce light leakage and to realize light shielding. The buffer layer 202 covers the substrate 10 and the light-shielding layer 201 to perform buffering and protection functions, and the oxide semiconductor layer 203 is disposed on the buffer layer 202. The gate insulating layer 204 is disposed on the oxide semiconductor layer 203, and the gate layer 205 is disposed on the gate insulating layer 204. The interlayer dielectric layer 206 covers the buffer layer 202, the oxide semiconductor layer 203, the gate insulating layer 204, and the gate layer 205, and is used for insulating and protecting the gate layer 205, and the interlayer dielectric layer 206 includes a first via 2061, a second via 2062, and a third via 2063. The source electrode 207 and the drain electrode 208 are disposed on the interlayer dielectric layer 206, the source electrode 207 is connected to the light-shielding layer 201 through the second via 2062, the source electrode 207 is connected to the oxide semiconductor layer 203 through the third via 2063, and the drain electrode 208 is connected to the oxide semiconductor layer 203 through the first via 2061. The passivation layer 209 covers the interlayer dielectric layer 206, the source electrode 207 and the drain electrode 208, and is used for protecting the source electrode 207 and the drain electrode 208.

Regarding the specific location of the radiation-resistant layer 30, the location may be designed according to the irradiation direction of the external light, for example, when the external light is irradiated from bottom to top, the radiation-resistant layer 30 may be disposed in the film structure below the oxide semiconductor layer 203. When the external light is irradiated from top to bottom, the anti-radiation layer 30 may be disposed in the film structure above the oxide semiconductor layer 203.

When external light is irradiated from bottom to top, in an embodiment, referring to fig. 1, the anti-radiation layer 30 is disposed on a side of the substrate 10 away from the thin film transistor array layer 20, the light incident side 301 is a side of the anti-radiation layer 30 away from the substrate 10, and the light emergent side 302 is a side of the anti-radiation layer 30 close to the substrate 10. Ultraviolet light in the external light sequentially passes through the anti-radiation layer 30, the substrate base plate 10, and the oxide semiconductor layer 203.

In another embodiment, referring to fig. 2, the difference between fig. 2 and fig. 1 is that the radiation-resistant layer 30 is disposed on a side of the substrate 10 close to the thin film transistor array layer 20, the light-shielding layer 201 is disposed on the radiation-resistant layer 30, the light-incident side 301 is a side of the radiation-resistant layer 30 close to the substrate 10, and the light-emitting side 302 is a side of the radiation-resistant layer 30 far from the substrate 10. Ultraviolet light in the external light sequentially passes through the substrate base plate 10, the anti-radiation layer 30 and the oxide semiconductor layer 203.

In an embodiment when the external light is irradiated from top to bottom, referring to fig. 3, fig. 3 is different from fig. 1 in that the radiation-resistant layer 30 is disposed on a side of the passivation layer 209 away from the substrate 10, the light-incident side 301 is a side of the radiation-resistant layer 30 away from the substrate 10, and the light-emitting side 302 is a side of the radiation-resistant layer 30 close to the substrate 10. Ultraviolet light in the external light sequentially passes through the anti-radiation layer 30, the oxide semiconductor layer 203 and the substrate 10. At this time, the radiation-resistant layer 30 may serve as a flat layer of the thin film transistor array layer 20, which is beneficial to reducing the overall thickness of the array substrate 1.

In the above embodiment, the array substrate 1 includes a single layer of the radiation-resistant layer 30. Further, the array substrate 1 may further include two or more radiation-resistant layers 30, for example, referring to fig. 4, fig. 4 is different from fig. 1 in that the array substrate 1 includes two radiation-resistant layers 30, wherein one radiation-resistant layer 30 is disposed on a side of the substrate 10 away from the thin film transistor array layer 20, and the other radiation-resistant layer 30 is disposed on a side of the passivation layer 209 away from the thin film transistor array layer 20. The radiation-resistant layer 30 can resist ultraviolet light from multiple directions by using a double layer, and radiation resistance is better.

It should be noted that, for the specific arrangement position of the radiation-resistant layer 30, the embodiments of the present invention only list several cases, and other cases that adopt the concept of the present invention, which are not listed, are also within the protection scope of the present invention.

Specifically, the thickness of the radiation-resistant layer 30 is 1um to 10 um.

Specifically, the radiation-resistant layer 30 is formed by curing a radiation-resistant resin, and the main components of the radiation-resistant resin include a down-conversion material, a resin, a fluorine-containing monomer or a fluorine-containing polymer, an ultraviolet initiator, and a solvent. Wherein, the mass percentages of the down-conversion material, the resin, the fluorine-containing monomer or the fluorine-containing polymer, the ultraviolet initiator and the solvent are respectively 0.1-5%, 50-90%, 1-20%, 1-5% and 20-40%. The anti-radiation resin prepared according to the formula can effectively resist the radiation of ultraviolet light.

The down-converting material is used to convert ultraviolet light into visible light or lower energy photons, and may be an organic dye, such as Lumogen F Violet 570, or an inorganic dye containing a metal element. The resin acts as a carrier, and the resin may be unsaturated polyester or vinyl, divinyl or the like, such as acrylic resin or the like. The fluorine-containing monomer or the fluorine-containing polymer is a high polymer containing fluorine elements, and plays a role in water resistance and moisture resistance. The ultraviolet light initiator is used for crosslinking and curing unsaturated polymers or initiating photopolymerization of monomers or oligomers. The ultraviolet initiator can be Irgacure-1173 and other materials. The solvent plays a role in dissolving the polymer, and can be an organic solvent such as toluene or chloroform.

The embodiment of the invention also provides a display panel, which comprises the array substrate 1 in the embodiment, and the display panel can be a liquid crystal display panel or an organic light emitting diode display panel. Referring to fig. 5, the display panel is a liquid crystal display panel, and further includes a color film substrate 11 disposed opposite to the array substrate 1, and a liquid crystal layer 12 disposed between the array substrate 1 and the color film substrate 11. Referring to fig. 6, the display panel is an organic light emitting diode display panel, and further includes a light emitting device layer disposed on the array substrate 1, the light emitting device layer is formed by deposition through an inkjet printing or evaporation process, the light emitting device layer includes an anode, a hole injection layer 21, a hole transport layer 22, a light emitting layer 23, an electron transport layer 24, an electron injection layer 25, and the like, which are sequentially stacked, and the light emitting layer includes a red light emitting layer, a green light emitting layer, and a blue light emitting layer.

Referring to fig. 7, an embodiment of the present invention further provides a method for manufacturing an array substrate 1, including the following steps:

s10: a base substrate 10 is provided, and a thin film transistor array layer 20 is formed on the base substrate 10.

Specifically, the forming of the thin film transistor array layer 20 on the substrate 10 includes depositing and patterning a light-shielding layer 201 on the substrate 10, depositing and forming a buffer layer 202 on the substrate 10 and the light-shielding layer 201, depositing and patterning an oxide semiconductor layer 203 on the buffer layer 202, depositing and forming a gate insulating layer 204 on the oxide semiconductor layer 203, depositing and patterning a gate electrode layer 205 on the gate insulating layer 204, depositing and forming an interlayer dielectric layer 206 on the buffer layer 202, the oxide semiconductor layer 203, the gate insulating layer 204, and the gate electrode layer 205, etching and forming a first through hole 2061, a second through hole 2062, and a third through hole 2063 on the interlayer dielectric layer 206, depositing and patterning a source electrode 207 and a drain electrode 208 on the interlayer dielectric layer 206, the source electrode 207 being connected to the light-shielding layer 201 through the second through hole 2062, the source electrode 207 is connected to the oxide semiconductor layer 203 through the third via 2063, the drain electrode 208 is connected to the oxide semiconductor layer 203 through the first via 2061, and a passivation layer 209 is deposited on the interlayer dielectric layer 206, the source electrode 207, and the drain electrode 208.

S20: preparing the anti-radiation resin, coating the anti-radiation resin on the array substrate 1, and curing the array substrate 1 under an ultraviolet lamp to form the anti-radiation layer 30.

Specifically, the radiation-resistant resin is prepared according to a formula, and the formula comprises a down-conversion material, a resin, a fluorine-containing monomer or a fluorine-containing polymer, an ultraviolet light initiator, a solvent and the like. Wherein the mass percentages of the down-conversion material, the resin, the fluorine-containing monomer or the fluorine-containing polymer, the ultraviolet initiator and the solvent are respectively 0.1-5%, 50-90%, 1-20%, 1-5% and 20-40%. The radiation-resistant layer 30 formed through curing can effectively absorb and resist ultraviolet light from external light.

The radiation-resistant resin may be applied to a side of the substrate base plate 10 away from the thin film transistor array layer by a slit coating process or the like, or applied to a side of the substrate base plate 10 close to the thin film transistor array layer 20, or applied to a side of the passivation layer 209 away from the substrate base plate 10.

It should be noted that after the preparation of the anti-radiation layer 30 is completed, when the array substrate 1 is applied to a liquid crystal display panel, the subsequent processes further include the processes of preparing a color film substrate, coating liquid crystal, forming a box, molding, attaching a bias, and the like. When the array substrate 1 is applied to an organic light emitting diode display panel, the subsequent process includes forming a light emitting device layer on the array substrate 1 after the preparation is completed, and the light emitting device layer can be deposited through an inkjet printing or evaporation process.

The beneficial effects are that: according to the array substrate, the preparation method thereof and the display panel provided by the invention, at least one anti-radiation layer with a down-conversion function is arranged on the array substrate, and the anti-radiation layer can absorb high-energy rays in external light and convert the high-energy rays into low-energy visible light, so that the energy required by exciting an oxide semiconductor layer to generate electron hole pairs or oxygen hole pairs cannot be reached, the oxide semiconductor (such as IGZO) is prevented from being damaged, and the illumination stability of the oxide semiconductor layer can be improved.

In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.