阅读说明：本技术 接触电阻监测器件及其制作方法、显示面板 (Contact resistance monitoring device, manufacturing method thereof and display panel ) 是由 聂晓辉 于 2020-05-07 设计创作，主要内容包括：本申请提供一种接触电阻监测器件及其制作方法、显示面板,所述接触电阻监测器件包括基板、设置于所述基板上的栅极金属层、设置于所述基板上的层间介电层、设置于所述层间介电层的凹孔内的源漏极金属层、以及设置于所述层间介电层及所述源漏极金属层上的像素电极层。本申请通过将源漏极金属层设置于层间介电层的凹孔中,避免了源漏极金属层因自身的凹陷表面而导致的像素电极层断裂,有利于保证通过该接触电阻监测器件测得的像素电极层与源漏极金属层之间的接触电阻准确性和稳定性。(The application provides a contact resistance monitoring device and manufacturing method, display panel thereof, contact resistance monitoring device include the base plate, set up in grid metal level on the base plate, set up in interlayer dielectric layer on the base plate, set up in source drain metal level in the shrinkage pool of interlayer dielectric layer and set up in interlayer dielectric layer reaches pixel electrode layer on the source drain metal level. According to the method, the source drain metal layer is arranged in the concave hole of the interlayer dielectric layer, the pixel electrode layer fracture caused by the concave surface of the source drain metal layer is avoided, and the accuracy and the stability of the contact resistance between the pixel electrode layer and the source drain metal layer measured by the contact resistance monitoring device are guaranteed.)

1. The utility model provides a contact resistance monitoring device which characterized in that, is applied to the monitoring of the contact resistance between the source drain metal level in the display panel and the pixel electrode layer, sets up in display panel's non-display area, contact resistance monitoring device includes:

a substrate;

the grid metal layer is arranged on the substrate;

the interlayer dielectric layer is arranged on the substrate, and a concave hole is formed in the interlayer dielectric layer and exposes the grid metal layer;

the source drain metal layer is arranged in the concave hole and is electrically connected with the grid metal layer;

and the pixel electrode layer is arranged on the interlayer dielectric layer and the source and drain electrode metal layer and is electrically connected with the source and drain electrode metal layer.

2. The contact resistance monitoring device according to claim 1, wherein the source-drain metal layer completely covers the recess hole.

3. The contact resistance monitoring device according to claim 2, wherein the thickness of the source-drain metal layer is equal to the height of the recess hole, so that the source-drain metal layer completely fills the recess hole.

4. The device of claim 1, wherein the pixel electrode layer is electrically connected to a pixel electrode in a display region of the display panel.

5. The contact resistance monitoring device according to claim 1, wherein the source and drain metal layers are a titanium-aluminum-titanium three-layer metal laminated structure.

6. A manufacturing method of a contact resistance monitoring device is characterized in that the contact resistance monitoring device is applied to monitoring of contact resistance between a source drain electrode metal layer and a pixel electrode layer in a display panel, and the manufacturing method comprises the following steps:

providing a substrate, wherein the substrate comprises a display area and a non-display area;

manufacturing a grid metal layer on a non-display area of the substrate;

manufacturing an interlayer dielectric layer on the substrate, and enabling the interlayer dielectric layer to cover the grid metal layer;

forming a concave hole on the interlayer dielectric layer, and exposing the gate metal layer through the concave hole;

manufacturing a source drain metal layer in the concave hole, wherein the source drain metal layer is electrically contacted with the grid metal layer;

and manufacturing a pixel electrode layer on the interlayer insulating layer, so that the pixel electrode layer covers the interlayer insulating layer and the source and drain electrode metal layer and is electrically contacted with the source and drain electrode metal layer.

7. The method for manufacturing a contact resistance monitoring device according to claim 6, wherein the method for manufacturing the gate metal layer on the non-display region of the substrate comprises:

depositing a first metal layer on a non-display area of the substrate through a physical vapor deposition process;

carrying out exposure and development processing on the first metal layer;

and carrying out an etching process on the first metal layer to form the grid metal layer.

8. The method of claim 6, wherein the recess hole is formed in the interlayer dielectric layer by:

carrying out exposure and development process on the interlayer dielectric layer;

and etching the interlayer dielectric layer to form the concave hole, and exposing the gate metal layer through the concave hole.

9. The method for manufacturing a contact resistance monitoring device according to claim 6, wherein the method for manufacturing the source/drain metal layer in the recessed hole comprises the following steps:

depositing a second metal layer on the interlayer dielectric layer and in the recessed hole by a physical vapor deposition process;

carrying out exposure and development processing on the second metal layer;

and carrying out an etching process on the second metal layer to form the source and drain metal layer, and filling the concave hole with the source and drain metal layer.

10. A display panel comprising a display region and a non-display region, the non-display region having the contact resistance monitoring device according to any one of claims 1 to 5 disposed therein.

Technical Field

The application relates to the technical field of display, in particular to a contact resistance monitoring device, a manufacturing method of the contact resistance monitoring device and a display panel.

Background

The thin film transistor technology is widely used in a driving circuit of a display panel, and the thin film transistor comprises a grid electrode, a source electrode and a drain electrode, wherein the drain electrode is electrically connected with a pixel electrode; the electrical conduction condition between the source electrode and the drain electrode is controlled by the voltage applied to the grid electrode, and the working state of the pixel electrode is further controlled. Therefore, the magnitude of the contact resistance between the drain and the pixel electrode determines the magnitude of the power consumption of the driving circuit and the corresponding speed of the pixel electrode.

Disclosure of Invention

Based on the not enough among the above-mentioned prior art, the contact resistance monitoring device that this application provided makes with the sunken formula of source drain metal level in the shrinkage pool of dielectric layer between the layer dielectric layer with the source drain metal level forms comparatively smooth surface, is favorable to keeping set up in dielectric layer between the layer and the good electric conductivity of the pixel electrode layer on the source drain metal level makes the contact resistance between pixel electrode layer and the source drain metal level that surveys through this contact resistance monitoring device more accurate.

The application provides a contact resistance monitoring device, is applied to the monitoring of the contact resistance between the source drain metal level and the pixel electrode layer among the display panel, sets up in display panel's non-display area, contact resistance monitoring device includes:

a substrate;

the grid metal layer is arranged on the substrate;

the interlayer dielectric layer is arranged on the substrate, and a concave hole is formed in the interlayer dielectric layer and exposes the grid metal layer;

the source drain metal layer is arranged in the concave hole and is electrically connected with the grid metal layer;

and the pixel electrode layer is arranged on the interlayer dielectric layer and the source and drain electrode metal layer and is electrically connected with the source and drain electrode metal layer.

According to an embodiment of the present application, the source drain metal layer completely covers the recess hole.

According to an embodiment of the present application, the thickness of the source drain metal layer is equal to the height of the recessed hole, so that the source drain metal layer completely fills the recessed hole.

According to an embodiment of the present disclosure, the pixel electrode layer is electrically connected to a pixel electrode located in a display region of the display panel.

According to an embodiment of the application, the source and drain metal layer is a titanium-aluminum-titanium three-layer metal laminated structure.

The application also provides a manufacturing method of the contact resistance monitoring device, the contact resistance monitoring device is applied to monitoring of contact resistance between a source drain electrode metal layer and a pixel electrode layer in a display panel, and the manufacturing method comprises the following steps:

providing a substrate, wherein the substrate comprises a display area and a non-display area;

manufacturing a grid metal layer on a non-display area of the substrate;

manufacturing an interlayer dielectric layer on the substrate, and enabling the interlayer dielectric layer to cover the grid metal layer;

forming a concave hole on the interlayer dielectric layer, and exposing the gate metal layer through the concave hole;

manufacturing a source drain metal layer in the concave hole, wherein the source drain metal layer is electrically contacted with the grid metal layer;

and manufacturing a pixel electrode layer on the interlayer insulating layer, so that the pixel electrode layer covers the interlayer insulating layer and the source and drain electrode metal layer and is electrically contacted with the source and drain electrode metal layer.

According to an embodiment of the present application, a method of forming the gate metal layer on the non-display region of the substrate includes:

depositing a first metal layer on a non-display area of the substrate through a physical vapor deposition process;

carrying out exposure and development processing on the first metal layer;

and carrying out an etching process on the first metal layer to form the grid metal layer.

According to an embodiment of the present application, a method of forming the recess hole on the interlayer dielectric layer is:

carrying out exposure and development process on the interlayer dielectric layer;

and etching the interlayer dielectric layer to form the concave hole, and exposing the gate metal layer through the concave hole.

According to an embodiment of the present application, a method for manufacturing the source/drain metal layer in the recess hole includes:

depositing a second metal layer on the interlayer dielectric layer and in the recessed hole by a physical vapor deposition process;

carrying out exposure and development processing on the second metal layer;

and carrying out an etching process on the second metal layer to form the source and drain metal layer, and filling the concave hole with the source and drain metal layer.

The application also provides a display panel, which comprises a display area and a non-display area, wherein the non-display area is provided with the contact resistance monitoring device.

The beneficial effect of this application is: according to the method, the source and drain metal layers are arranged in the concave holes of the interlayer dielectric layers, the pixel electrode layer fracture caused by the concave surface of the source and drain metal layers is avoided, and the accuracy and the stability of the contact resistance between the pixel electrode layer and the source and drain metal layers measured by the contact resistance monitoring device are guaranteed.

Drawings

In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the application, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a schematic diagram of a prior art contact resistance monitoring device;

FIG. 2 is a schematic diagram of a planar structure of a display panel according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of a first cross-sectional structure along A-A' of the contact resistance monitoring device in the display panel shown in FIG. 1;

FIG. 4 is a schematic diagram of a second cross-sectional structure along A-A' of the contact resistance monitoring device in the display panel shown in FIG. 1;

FIG. 5 is a flow chart of a method for fabricating a contact resistance monitoring device according to an embodiment of the present disclosure;

fig. 6 is a schematic diagram of forming a gate metal layer on a substrate according to an embodiment of the present disclosure;

FIG. 6a is a schematic diagram of a first metal layer formed on a substrate during a gate metallization process;

FIG. 6b is a schematic diagram of applying a photoresist on the first metal layer during the process of forming the gate metal process;

FIG. 6c is a schematic diagram showing the photoresist after exposure and development during the process of forming a gate metal process;

FIG. 7 is a schematic diagram illustrating an interlayer dielectric layer after fabrication according to an embodiment of the present disclosure;

FIG. 7a is a schematic diagram of an ILD layer formed on a substrate during an ILD process;

FIG. 7b is a schematic view of applying a photoresist on the ILD layer during the ILD layer fabrication process;

FIG. 7c is a schematic diagram illustrating exposure and development of a photoresist during the formation of an interlayer dielectric layer;

fig. 8 is a schematic structural diagram after a source-drain metal layer is manufactured according to the embodiment of the present application;

FIG. 8a is a schematic view of a second metal layer formed on an interlayer dielectric layer during fabrication of a source drain metal layer;

FIG. 8b is a schematic view of a second metal layer coated with a photoresist during fabrication of a source drain metal layer;

FIG. 8c is a schematic diagram of a photoresist after exposure and development during fabrication of a source-drain metal layer;

fig. 9 is a schematic structural diagram after a pixel electrode layer is manufactured according to the embodiment of the application.

Detailed Description

The following description of the various embodiments refers to the accompanying drawings, which are included to illustrate specific embodiments that can be implemented by the application. Directional phrases used in this application, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], etc., refer only to the directions of the attached drawings. Accordingly, the directional terminology is used for purposes of illustration and understanding, and is in no way limiting. In the drawings, elements having similar structures are denoted by the same reference numerals.

The embodiment of the application provides a contact resistance monitoring device and a manufacturing method and a display panel thereof, wherein a source drain metal layer of the contact resistance monitoring device is arranged in a sunken mode in a concave hole of an interlayer dielectric layer, so that the interlayer dielectric layer and the source drain metal layer form a relatively flat surface, and the contact resistance monitoring device is beneficial to keeping good conductivity of a pixel electrode layer arranged on the interlayer dielectric layer and the source drain metal layer, so that the contact resistance between the pixel electrode layer and the source drain metal layer measured by the contact resistance monitoring device is more accurate.

Fig. 2 to fig. 4 are schematic plan views of a display panel provided in an embodiment of the present disclosure, fig. 3 is a schematic cross-sectional view of a contact resistance monitoring device along a line a-a 'in the display panel shown in fig. 1, and fig. 4 is a schematic cross-sectional view of a contact resistance monitoring device along a line a-a' in the display panel shown in fig. 1.

The contact resistance monitoring device 10 provided in the embodiment of the present application is applied to a display panel 01, and is configured to monitor a contact resistance between a source/drain metal layer 14 and a pixel electrode layer 15 of the display panel 01. It should be noted that the display panel 01 includes a display area AA and a non-display area NA, and the contact resistance monitoring device 10 is disposed in the non-display area NA of the display panel 01. Optionally, the display panel 01 at least includes two contact resistance monitoring devices 10, and the two contact resistance monitoring devices 10 are respectively disposed near two opposite sides of the display panel 01, so as to monitor contact resistances of different positions of the display panel 01, and improve monitoring accuracy.

Specifically, the contact resistance monitoring device 10 includes a substrate 11, a gate metal layer 12 disposed on the substrate 11, an interlayer dielectric layer 13 disposed on the substrate 11, a source/drain metal layer 14 disposed in a recess of the interlayer dielectric layer 13, and a pixel electrode layer 15 disposed on the interlayer dielectric layer 13 and the source/drain metal layer 14. It should be noted that the contact resistance monitoring device 10 is a miniature of a thin film transistor structure and a pixel electrode structure inside the display panel 01 in a non-display area NA, that is, the gate metal layer 12, the source drain metal layer 14, and the pixel electrode layer 15 in the contact resistance monitoring device 10 are made of the same material and process as the gate, the source drain, and the pixel electrode of the thin film transistor inside the display panel 01, respectively, and can directly reflect the electrical properties of the thin film transistor and the pixel electrode inside the display panel 01.

Alternatively, the substrate 11 may be a hard substrate such as a glass substrate, or a flexible substrate such as a polyimide substrate.

The gate metal layer 12 and the gate of the thin film transistor in the display panel 01 are manufactured through the same process, and the gate metal layer 12 may be made of a metal having good conductivity, such as copper or gold.

The interlayer dielectric layer 13 and the interlayer dielectric structure inside the display panel 01 are manufactured through the same process. The interlayer dielectric layer 13 has electrical insulation and may be made of silicon oxide, silicon nitride, or the like. A concave hole SP is formed in the interlayer dielectric layer 13, and the gate metal layer 12 is exposed by the concave hole SP. The concave holes SP and the holes in the interlayer dielectric structure inside the display panel 01 are manufactured through the same process. Optionally, at the view angle shown in fig. 3, the width of the recess hole SP is greater than the width of the gate metal layer 12, so that at least a portion of the bottom of the recess hole SP is the structure of the interlayer dielectric layer 13, so as to facilitate the subsequent sink-type arrangement of the source/drain metal layer 14 in the recess hole SP.

The source/drain metal layer 14 is disposed in the recess SP and electrically connected to the gate metal layer 12. Alternatively, the thickness of the gate metal layer 14 may be equal to the height of the recess SP, as shown in fig. 3, or may be smaller than the height of the recess SP, as shown in fig. 4. It should be noted that the source/drain metal layer 14 is disposed in the recessed hole SP in a sinking manner, and the source/drain metal layer 14 is not disposed on the interlayer dielectric layer 13 outside the recessed hole SP, so that the problem of pixel electrode fracture caused by the source/drain metal layer depression on the interlayer dielectric layer outside the recessed hole in the prior art is fundamentally solved, and the stability and accuracy of monitoring the contact resistance by the contact resistance monitoring device 10 are favorably ensured. Optionally, the source-drain metal layer 14 is a titanium-aluminum-titanium three-layer metal stacked structure.

The pixel electrode layer 15 is disposed on the interlayer dielectric layer 13 and the source/drain metal layer 14, and is electrically connected to the source/drain metal layer 14. It should be understood that, because the source/drain metal layer 14 is disposed in the recess SP in a sinking manner, the pixel electrode layer 15 may be arranged on a relatively flat surface as a substrate, so that the risk of breaking the pixel electrode layer 15 is greatly reduced.

Optionally, at the view angle shown in fig. 3, the width of the source/drain metal layer 14 is the same as the width of the recess hole SP, so that the gate metal layer 14 completely covers the recess hole SP; further, the thickness of the source/drain metal layer 14 is the same as the height of the recess SP, so that the source/drain metal layer 14 completely sinks into the recess SP and simultaneously completely fills the recess SP, thereby forming a flat surface supporting the pixel electrode layer 15.

Further, the pixel electrode layer 15 is electrically connected to the pixel electrode located in the display area AA of the display panel 01.

To sum up, the source drain metal level formula of contact resistance monitoring device that this application embodiment provided sets up in the shrinkage pool of dielectric layer between layer, makes dielectric layer between layer with the source drain metal level forms comparatively smooth surface, is favorable to keeping set up in dielectric layer between layer with the good electric conductivity of the pixel electrode layer on the source drain metal level makes the contact resistance between pixel electrode layer and the source drain metal level that records through this contact resistance monitoring device more accurate.

The embodiment of the present application further provides a method for manufacturing a contact resistance monitoring device, as shown in fig. 5, where the contact resistance monitoring device is applied to monitoring contact resistance between a source/drain metal layer and a pixel electrode layer in a display panel, and the manufacturing method includes the following steps:

step S101, referring to fig. 6, a substrate 11 is provided, where the substrate 11 includes a display area and a non-display area. Alternatively, the substrate 11 may be a hard substrate such as a glass substrate, or a flexible substrate such as a polyimide substrate.

Step S102, a gate metal layer 12 is formed on the non-display region of the substrate 11.

Specifically, the method for manufacturing the gate metal layer 12 on the non-display region of the substrate 11 includes:

first, a first metal layer 121 is deposited on the non-display area of the substrate 11 by a physical vapor deposition process, as shown in fig. 6a, and the first metal layer 121 may be a conductive metal such as copper or gold.

Then, an exposure and development process is performed on the first metal layer 121. The method comprises the following steps: firstly, coating a photoresist PR on the first metal layer 121, as shown in fig. 6 b; and then, carrying out exposure and development operation on the photoresist PR to remove the photoresist PR at two ends and only keep the middle part as shown in FIG. 6 c.

Finally, an etching process is performed on the first metal layer 121 to form the gate metal layer 12. It should be noted that, after the etching process is completed, the remaining photoresist PR is removed.

Step S103, referring to fig. 7a, an interlayer dielectric layer 13 is fabricated on the substrate 12, such that the interlayer dielectric layer 13 covers the gate metal layer 12. Alternatively, the interlayer dielectric layer 13 may be made of an insulating material such as silicon oxide or silicon nitride, and the method for making the interlayer dielectric layer 13 may be a chemical vapor deposition method.

Step S104, referring to fig. 7, a recess SP is formed on the interlayer dielectric layer 13, so that the gate metal layer 12 is exposed through the recess SP.

Specifically, the method of forming the recess hole SP on the interlayer dielectric layer 13 is:

first, an exposure and development process is performed on the interlayer dielectric layer 13. The method specifically comprises the following steps: firstly, coating a photoresist PR on the interlayer dielectric layer 13, as shown in FIG. 7 b; and then, exposing and developing the photoresist PR to remove the middle photoresist PR and only two end parts are remained, as shown in FIG. 7 c.

Then, an etching process is performed on the interlayer dielectric layer 13 to form the recess hole SP, and the gate metal layer 12 is exposed through the recess hole SP. It is noted that after the etching process is completed, the remaining photoresist PR is removed.

Step S105, referring to fig. 8, a source/drain metal layer 14 is fabricated in the recess SP, and the source/drain metal layer 14 is electrically contacted with the gate metal layer 12.

Specifically, the method for manufacturing the source/drain metal layer 14 in the recess SP is:

first, a second metal layer 141 is deposited on the interlayer dielectric layer 13 and in the recess hole SP by a physical vapor deposition process, as shown in fig. 8 a.

Then, an exposure and development process is performed on the second metal layer 141, specifically: firstly, coating a photoresist PR on the second metal layer 141, as shown in fig. 8 b; and then, carrying out exposure and development operation on the photoresist PR to remove the photoresist PR at two ends and only keeping the middle part corresponding to the concave hole SP, as shown in FIG. 8 c.

Finally, an etching process is performed on the second metal layer 141 to form the source/drain metal layer 14, and the source/drain metal layer 14 fills the recess SP. It is noted that after the etching process is completed, the remaining photoresist PR is removed.

Step S106, referring to fig. 9, a pixel electrode layer 15 is fabricated on the interlayer insulating layer 13, so that the pixel electrode layer 15 covers the interlayer insulating layer 13 and the source/drain metal layer 14 and is electrically contacted with the source/drain metal layer 14, thereby forming the contact resistance monitoring device.

The embodiment of the application also provides a display panel, which comprises a display area and a non-display area, wherein the contact resistance monitoring device provided by the embodiment of the application is arranged in the non-display area. The display panel provided by the embodiment of the application can accurately monitor the contact impedance between the source and drain electrodes and the pixel electrode inside the display panel through the contact resistance monitoring device, and further accurately evaluate the performance of the display panel.

It should be noted that, although the present application has been described with reference to specific examples, the above-mentioned examples are not intended to limit the present application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, so that the scope of the present application shall be limited by the appended claims.