阅读说明：本技术 一种非易失存储器处理方法及装置 (Nonvolatile memory processing method and device ) 是由 朱长峰 舒清明 于 2018-07-13 设计创作，主要内容包括：本发明实施例提供了一种非易失存储器处理方法及装置,该方法包括：在对非易失存储器进行编程时,选中目标字线；以所述目标字线的初始电压为起始电压,根据预设的电压跳变时长和预设的电压跳变差值对所述目标字线施加依次增加的跳变电压,直到施加在所述目标字线上的电压达到编程电压。本发明实施例在对非易失存储器进行编程时,对被选中的目标字线,以目标字线的初始电压为起始电压,根据预设的电压跳变时长和预设的电压跳变差值对目标字线施加依次增加的跳变电压,直到施加在目标字线上的电压达到编程电压,使得在每个阶段目标字线远端和近端的电压建立时间差值较小,提升了非易失存储器数据存储的稳定性。(The embodiment of the invention provides a nonvolatile memory processing method and a nonvolatile memory processing device, wherein the method comprises the following steps: selecting a target word line when programming the nonvolatile memory; and applying sequentially increased jump voltages to the target word line according to a preset voltage jump duration and a preset voltage jump variation value by taking the initial voltage of the target word line as an initial voltage until the voltage applied to the target word line reaches a programming voltage. When the nonvolatile memory is programmed, the initial voltage of the target word line is used as the initial voltage of the selected target word line, the sequentially increased jump voltage is applied to the target word line according to the preset voltage jump duration and the preset voltage jump difference value until the voltage applied to the target word line reaches the programming voltage, so that the difference value of the voltage establishment time of the far end and the near end of the target word line is small at each stage, and the stability of data storage of the nonvolatile memory is improved.)

1. A non-volatile memory processing method, the method comprising:

selecting a target word line when programming the nonvolatile memory;

and applying sequentially increased jump voltages to the target word line according to a preset voltage jump duration and a preset voltage jump variation value by taking the initial voltage of the target word line as an initial voltage until the voltage applied to the target word line reaches a programming voltage.

2. The method of claim 1, wherein the initial voltage of the target word line is a pass-through voltage of the target word line.

3. The method of claim 2, further comprising:

applying a pass-through voltage to unselected word lines in the non-volatile memory.

4. The method of claim 1, further comprising:

grounding a first bit line BL needing programming;

the second bit line BL which does not need to be programmed is applied with a preset voltage.

5. The method of any of claims 1-4, wherein the method is applied to a multiplane nonvolatile memory.

6. A non-volatile memory processing apparatus, the apparatus comprising:

a target word line selection module for selecting a target word line when programming the nonvolatile memory;

and the programming voltage applying module is used for applying sequentially increased jump voltages to the target word line according to a preset voltage jump duration and a preset voltage jump variation value by taking the initial voltage of the target word line as an initial voltage until the voltage applied to the target word line reaches the programming voltage.

7. The apparatus of claim 6, wherein an initial voltage of the target word line is a pass-through voltage of the target word line.

8. The apparatus of claim 7, further comprising:

and the communication voltage applying module is used for applying communication voltage to unselected word lines in the nonvolatile memory.

9. The apparatus of claim 6, further comprising:

the grounding module is used for grounding a first bit line BL needing programming;

and the preset voltage module is connected and used for applying a preset voltage to the second bit line BL which does not need to be programmed.

10. The apparatus of any of claims 6-9, wherein the method is applied to a multiplane non-volatile memory.

Technical Field

The present invention relates to the field of memory processing technologies, and in particular, to a method and an apparatus for processing a nonvolatile memory.

Background

With the development of various electronic devices, embedded systems, and the like, nonvolatile memory devices are widely used in electronic products. Taking a non-volatile Memory NAND Flash Memory (NAND Flash Memory) as an example, the NAND Memory is composed of a plurality of Memory cells (cells), can realize multiple times of programming, and has large capacity, simple reading and writing, few peripheral devices and low price.

Disclosure of Invention

In view of the foregoing problems, embodiments of the present invention provide a method and an apparatus for processing a nonvolatile memory, so as to improve the stability of the nonvolatile memory.

According to a first aspect of the present invention, there is provided a non-volatile memory processing method, the method comprising:

selecting a target word line when programming the nonvolatile memory;

and applying sequentially increased jump voltages to the target word line according to a preset voltage jump duration and a preset voltage jump variation value by taking the initial voltage of the target word line as an initial voltage until the voltage applied to the target word line reaches a programming voltage.

Preferably, the initial voltage of the target word line is a pass-through voltage of the target word line;

the step of applying a program voltage to the target word line by a step-wise setup method includes:

and applying a programming voltage to the target word line by using the connected voltage as a starting point and adopting a step establishing method.

Preferably, the method further comprises:

applying a pass-through voltage to unselected word lines in the non-volatile memory.

Preferably, the method further comprises the following steps:

grounding a first bit line BL needing programming;

the second bit line BL which does not need to be programmed is applied with a preset voltage.

Preferably, the method is applied to a multiplane nonvolatile memory.

According to a second aspect of the present invention, there is provided a non-volatile memory processing apparatus, the apparatus comprising:

a target word line selection module for selecting a target word line when programming the nonvolatile memory;

and the programming voltage applying module is used for applying sequentially increased jump voltages to the target word line according to a preset voltage jump duration and a preset voltage jump variation value by taking the initial voltage of the target word line as an initial voltage until the voltage applied to the target word line reaches the programming voltage.

Preferably, the initial voltage of the target word line is a pass voltage of the target word line.

Preferably, the method further comprises the following steps:

and the communication voltage applying module is used for applying communication voltage to unselected word lines in the nonvolatile memory.

Preferably, the method further comprises the following steps:

the grounding module is used for grounding a first bit line BL needing programming;

and the preset voltage module is connected and used for applying a preset voltage to the second bit line BL which does not need to be programmed.

Preferably, the method is applied to a multiplane nonvolatile memory.

In the embodiment of the present invention, it is found that the reason why the performance of the nonvolatile memory is unstable in the prior art is as follows: when a programming voltage is applied to a selected target word line, a programming voltage is usually applied to one end of the target word line, because Resistance Capacitance (RC) and the like exist in the target word line, the end (hereinafter referred to as a near end) of the target word line to which the programming voltage is applied can quickly reach the programming voltage, and the end (hereinafter referred to as a far end) of the target word line to which the programming voltage is not applied can reach the programming voltage after a period of RC delay. Therefore, when programming the non-volatile memory, the embodiment of the invention applies the programming voltage to the selected target word line by adopting a step-like method, namely, the initial voltage of the target word line is used as the starting voltage, the jump voltage which is increased in sequence is applied to the target word line according to the preset voltage jump duration and the preset voltage jump difference value until the voltage applied to the target word line reaches the programming voltage, which is equivalent to the voltage increase at the near end of the target word line and slightly buffers, so that the difference between the voltage setup times at the far and near ends of the target word line is small at each stage, compared to setting only the programming voltage, and then applying a method for directly increasing the starting voltage to the programming voltage in the target word line, wherein the delay time between the far end of the target word line reaching the programming voltage and the near end of the target word line reaching the programming voltage is shortened, and the stability of data storage of the nonvolatile memory is improved.

The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

FIG. 1 is a flow chart of a method for processing a non-volatile memory according to an embodiment of the present invention;

FIG. 2 is a simplified diagram of a Block (memory Block) provided by an embodiment of the present invention;

FIG. 3 is a timing diagram of the voltage of NAND FLASH signals during programming according to the present invention;

FIG. 4 is a timing diagram of the voltage of signals during programming of a non-volatile memory according to an embodiment of the present invention;

FIG. 5 is a block diagram of a non-volatile memory processing apparatus according to an embodiment of the present invention.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below. It should be understood that the specific embodiments described herein are merely illustrative of the invention, but do not limit the invention to only some, but not all embodiments.