阅读说明：本技术 非易失性可编程异质结存储器 (Non-volatile programmable heterojunction memory ) 是由 张增星 盛喆 余睿 于 2021-07-29 设计创作，主要内容包括：本发明提供了一种非易失性可编程异质结存储器,包括控制栅层、第一电介质层、浮栅层、第二电介质层、异质结沟道层和电极,所述第一电介质层覆盖所述控制栅层的顶面,所述浮栅层覆盖所述第一电介质层的顶面,所述第二电介质层设置于所述浮栅层的上侧,所述异质结沟道层包括第一半导体和第二半导体,所述第一半导体和所述第二半导体中至少一种为双极性半导体,所述第一半导体和所述第二半导体共同覆盖所述第二电介质层的顶面,所述电极覆盖所述异质结沟道层的部分顶面,使得施加在所述控制栅层上的控制栅电压可以实现所述异质结沟道层在不同PN结和非PN结之间的连续逻辑变化和存储,实现低功耗的光电测试,从而实现感、存、算功能的一体化。(The invention provides a nonvolatile programmable heterojunction memory, which comprises a control gate layer, a first dielectric layer, a floating gate layer, a second dielectric layer, a heterojunction channel layer and an electrode, wherein the first dielectric layer covers the top surface of the control gate layer, the floating gate layer covers the top surface of the first dielectric layer, the second dielectric layer is arranged on the upper side of the floating gate layer, the heterojunction channel layer comprises a first semiconductor and a second semiconductor, at least one of the first semiconductor and the second semiconductor is a bipolar semiconductor, the first semiconductor and the second semiconductor jointly cover the top surface of the second dielectric layer, and the electrode covers part of the top surface of the heterojunction channel layer, so that continuous logic change and storage of the heterojunction channel layer between different PN junctions and non-PN junctions can be realized by control gate voltage applied to the control gate layer, the photoelectric test with low power consumption is realized, thereby realizing the integration of the functions of sensing, storing and calculating.)

1. A non-volatile programmable heterojunction memory, comprising in order:

a control gate layer;

a first dielectric layer covering a top surface of the control gate layer;

a floating gate layer covering a top surface of the first dielectric layer;

a second dielectric layer covering a top surface of the floating gate layer;

a heterojunction channel layer comprising a first semiconductor and a second semiconductor, at least one of the first semiconductor and the second semiconductor being a bipolar semiconductor, the first semiconductor and the second semiconductor collectively overlying a top surface of the second dielectric layer; and

an electrode covering a portion of a top surface of the heterojunction channel layer.

2. The non-volatile programmable heterojunction memory of claim 1, wherein the electrodes comprise a source electrode and a drain electrode, the source electrode overlying a portion of the top surface of the first semiconductor and the drain electrode overlying a portion of the top surface of the second semiconductor.

3. A non-volatile programmable heterojunction memory according to claim 2, wherein the material of the source electrode is gold or chromium and the material of the drain electrode is gold or chromium.

4. The non-volatile programmable heterojunction memory of claim 1, wherein the material of said bipolar semiconductor is tungsten diselenide.

5. The non-volatile programmable heterojunction memory of claim 1, wherein the material of the first dielectric layer and the material of the second dielectric layer are both hafnium oxide.

6. The non-volatile programmable heterojunction memory of claim 1, wherein the material of the floating gate layer and the material of the control gate layer are both gold.

Technical Field

The invention relates to the technical field of semiconductors, in particular to a nonvolatile programmable heterojunction memory.

Background

In the era of internet of things, acquisition and processing of mass data have great pressure on information transmission capacity, information processing speed, energy consumption and the like, development of edge calculation and storage becomes one of effective ways for solving the problem, wherein a novel intelligent sensor integrating sense, storage and calculation is developed to realize acquisition, processing and storage of information in a device, and the method has important significance for improving the energy efficiency of a system, reducing signal delay and meeting the increasing mass data acquisition and processing requirements in the era of interconnection of everything. Vision is one of the main sources of information acquisition, one of its main core sites being the photodetector.

The traditional photoelectric detector has single function and only has a photoelectric conversion function, and cannot meet higher requirements on an intelligent sensor in the era of mass information, so that the development of a new-principle low-power-consumption photoelectric detector component integrating sensing, storage and calculation is of great significance.

Therefore, there is a need to provide a new type of non-volatile programmable heterojunction memory to solve the above-mentioned problems in the prior art.

Disclosure of Invention

The invention aims to provide a nonvolatile programmable heterojunction memory, which realizes continuous logic change and storage of a heterojunction channel layer between different PN junctions and non-PN junctions, reduces the photoelectric test height, and realizes integration of sensing, storage and calculation functions.

To achieve the above object, the nonvolatile programmable heterojunction memory of the present invention sequentially comprises:

a control gate layer;

a first dielectric layer covering a top surface of the control gate layer;

a floating gate layer covering a top surface of the first dielectric layer;

a second dielectric layer covering a top surface of the floating gate layer;

a heterojunction channel layer comprising a first semiconductor and a second semiconductor, at least one of the first semiconductor and the second semiconductor being a bipolar semiconductor, the first semiconductor and the second semiconductor collectively overlying a top surface of the second dielectric layer; and

an electrode covering a portion of a top surface of the heterojunction channel layer.

The nonvolatile programmable heterojunction memory has the advantages that: the heterojunction channel layer comprises a first semiconductor and a second semiconductor, at least one of the first semiconductor and the second semiconductor is a bipolar semiconductor, so that continuous logic change and storage of the heterojunction channel layer between different PN junctions and non-PN junctions can be realized by a control gate voltage applied to the control gate layer, a photovoltaic mode of the PN junctions can be utilized, a low-power-consumption photoelectric test can be realized, and integration of sensing, storage and calculation functions of the nonvolatile programmable heterojunction memory can be realized.

Preferably, the electrode includes a source electrode covering a part of the top surface of the first semiconductor and a drain electrode covering a part of the top surface of the second semiconductor.

Further preferably, the material of the source electrode is gold or chromium, and the material of the drain electrode is gold or chromium.

Preferably, the bipolar semiconductor material is tungsten diselenide.

Preferably, the material of the first dielectric layer and the material of the second dielectric layer are both hafnium oxide.

Preferably, the material of the floating gate layer and the material of the control gate layer are both gold.

Drawings

FIG. 1 is a schematic structural diagram of a nonvolatile programmable heterojunction memory according to an embodiment of the invention;

FIG. 2 is a functional graph of a non-volatile programmable heterojunction memory according to an embodiment of the invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.

To address the problems with the prior art, embodiments of the present invention provide a non-volatile programmable heterojunction memory. Referring to fig. 1, the nonvolatile programmable heterojunction memory 100 sequentially includes a control gate layer 101, a first dielectric layer 102, a floating gate layer 103, a second dielectric layer 104, a heterojunction channel layer 105, and an electrode 106, the first dielectric layer 102 covers a top surface of the control gate layer 101, the floating gate layer 103 covers a top surface of the first dielectric layer 102, the second dielectric layer 104 covers a top surface of the floating gate layer 103, the heterojunction channel layer 105 includes a first semiconductor 1051 and a second semiconductor 1052, at least one of the first semiconductor 1051 and the second semiconductor 1052 is a bipolar semiconductor, the first semiconductor 1051 and the second semiconductor 1052 together cover a top surface of the second dielectric layer 104, and the electrode covers a portion of the top surface of the heterojunction channel layer 105.

The heterojunction channel layer in the nonvolatile programmable heterojunction memory comprises a first semiconductor and a second semiconductor, at least one of the first semiconductor and the second semiconductor is a bipolar semiconductor, so that continuous logic change and storage of the heterojunction channel layer between different PN junctions and non-PN junctions can be realized by a control gate voltage applied to the control gate layer, and a low-power photoelectric test can be realized by utilizing a photovoltaic mode of the PN junctions, so that integration of sensing, storage and calculation functions of the nonvolatile programmable heterojunction memory is realized, and the nonvolatile programmable heterojunction memory has semiconductor process compatibility and has the potential of large-scale production.

Figure 2 is a functional graph of a non-volatile programmable heterojunction memory in some embodiments of the invention. Referring to fig. 2, it can be seen that the control gate voltage V applied to the control gate layer when the optical power irradiated on the non-volatile programmable heterojunction memory is 10nW_CGThe photovoltaic voltage V generated by the non-volatile programmable heterojunction memory can be continuously modulated_OCThe photoelectric detection capability of the nonvolatile programmable heterojunction memory is continuously modulated, and the nonvolatile programmable heterojunction memory has a storage function.

Referring to fig. 1, the electrode 106 includes a source electrode 1061 and a drain electrode 1062, the source electrode 1061 covers a portion of the top surface of the first semiconductor 1051, and the drain electrode 1062 covers a portion of the top surface of the second semiconductor 1052, wherein the source electrode 1061 is made of gold (Au) or chromium (Cr), and the drain electrode 1062 is made of gold (Au) or chromium (Cr).

In some implementations, the bipolar semiconductor material is tungsten diselenide (WSe)₂) The material of the first dielectric layer and the material of the second dielectric layer are both hafnium oxide (HfO)₂) And the floating gate layer and the control gate layer are both made of gold (Au).

Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.