阅读说明：本技术 可弯折的阵列基板及其显示装置 (Bendable array substrate and display device thereof ) 是由 刘建欣 于 2021-07-19 设计创作，主要内容包括：一种可弯折的阵列基板及其显示装置,所述可弯折的阵列基板区分为像素区域与围绕所述像素区域的边缘区域,包含第一基板、复数条扫描线、复数条数据线、复数个数据驱动单元以及复数个栅极驱动单元,其中复数个数据驱动单元与至少一个栅极驱动单元相对设置在像素区域的两侧,至少一栅极驱动单元连接一条从边缘区域向像素区域延伸的栅极输入线,所述栅极输入线与一条所述扫描线电连接。(A bendable array substrate and a display device thereof are provided, the bendable array substrate is divided into a pixel region and an edge region surrounding the pixel region, and comprises a first substrate, a plurality of scanning lines, a plurality of data driving units and a plurality of grid driving units, wherein the plurality of data driving units and at least one grid driving unit are oppositely arranged at two sides of the pixel region, at least one grid driving unit is connected with a grid input line extending from the edge region to the pixel region, and the grid input line is electrically connected with one scanning line.)

1. The utility model provides a bendable array substrate, is distinguished into pixel region and centers on the border region of pixel region, its characterized in that, bendable array substrate includes:

a first substrate including;

a plurality of scan lines disposed in parallel on the pixel region of the first substrate and extending in a first direction;

a plurality of data lines disposed in parallel on the pixel region of the first substrate and extending along a second direction, wherein the first direction is perpendicular to the second direction;

the data driving units are arranged in the edge area, and each data driving unit is electrically connected with at least one data line; and

the grid driving units are arranged in the edge area, and each grid driving unit is electrically connected with at least one scanning line;

the plurality of data driving units and at least one gate driving unit are respectively arranged at two opposite sides of the edge region, the at least one gate driving unit is connected with a gate input line extending from the edge region to the pixel region, and the gate input line is electrically connected with one scanning line.

2. The bendable array substrate of claim 1, wherein the gate input line is separated from the scan line by at least one insulating layer, the at least one insulating layer is provided with a via hole, and the gate input line is electrically connected to the scan line through the via hole.

3. The bendable array substrate of claim 1, wherein the plurality of data driving units and all of the plurality of gate driving units are respectively disposed at the opposite sides of the pixel region, each gate driving unit is connected to one of the gate input lines extending from the edge region to the pixel region, and each gate input line is electrically connected to one of the scan lines.

4. The bendable array substrate of claim 1, wherein the pixel region is quadrilateral, the plurality of data driving units and at least one of the gate driving units are disposed opposite to two opposite sides of the edge region, respectively, the other gate driving units are disposed at sides of the edge region adjacent to the sides of the plurality of data driving units, wherein the gate driving unit closest to the plurality of data driving units is configured to output a first-stage gate output signal.

5. The bendable array substrate of claim 4, wherein the gate driving unit outputting the first stage gate output signal and the gate driving unit outputting the last stage gate output signal are electrically connected to the data driving unit through different array windings, respectively.

6. The bendable array substrate of claim 3, wherein each gate input line has the same length in the pixel region.

7. The bendable array substrate of claim 1, wherein at least one of the gate input lines is disposed in parallel with the plurality of data lines.

8. The bendable array substrate of claim 1, wherein the plurality of data driving units and the plurality of gate driving units are flip-chip-on-film chips.

9. A display device comprising the bendable array substrate according to any one of claims 1 to 8, and an encapsulation layer disposed on the bendable array substrate.

10. The display device according to claim 9, further comprising a main control board including a circuit board and a control unit disposed on the circuit board, wherein the plurality of gate driving units outside the pixel area are connected through an array wiring, the plurality of data driving units are partially connected to the main control board and partially connected to the first substrate, and the main control board exchanges signals with all the gate driving units through the plurality of data driving units and the array wiring.

[ technical field ] A method for producing a semiconductor device

The invention relates to the technical field of display, in particular to a bendable array substrate and a display device thereof.

[ background of the invention ]

In a severe application scene, such as a vehicle-mounted screen, a central control screen and the like, the requirement on the high and low temperature reliability of the product is very high. In order to satisfy such severe conditions, the scan signals in the display are driven by the gate chip. The scanning signals and the pixel data signals are in a wiring direction of the display area and are vertically intersected under the conventional condition, and chips exist on two adjacent sides of the display screen.

However, because the chip is made of a relatively hard material and is disposed on two adjacent sides of the display device, the display device cannot be bent in the left-right direction and the up-down direction due to the design.

Therefore, it is desirable to provide an array substrate and a display device thereof to solve the problems of the prior art.

[ summary of the invention ]

In order to solve the above problems, the present invention provides a bendable array substrate and a display device thereof, so as to solve the problem that the display device cannot be bent in two directions.

To achieve the above object, the present invention provides a bendable array substrate divided into a pixel region and an edge region surrounding the pixel region, including:

a first substrate including;

a plurality of scan lines disposed in parallel on the pixel region of the first substrate and extending in a first direction;

a plurality of data lines disposed in parallel on the pixel region of the first substrate and extending along a second direction, wherein the first direction is perpendicular to the second direction;

the data driving units are arranged in the edge area, and each data driving unit is electrically connected with at least one data line; and

the grid driving units are arranged in the edge area, and each grid driving unit is electrically connected with at least one scanning line;

the plurality of data driving units and at least one gate driving unit are respectively arranged at two opposite sides of the edge region, the at least one gate driving unit is connected with a gate input line extending from the edge region to the pixel region, and the gate input line is electrically connected with one scanning line.

In an embodiment of the invention, the gate input line and the scan line are separated by at least one insulating layer, the at least one insulating layer is provided with a through hole, and the gate input line is electrically connected to the scan line through the through hole.

In an embodiment of the invention, the plurality of data driving units and all of the plurality of gate driving units are respectively disposed at the two opposite sides of the pixel region, each gate driving unit is connected to one gate input line extending from the edge region to the pixel region, and each gate input line is electrically connected to one scanning line.

In an embodiment of the invention, the pixel region is a quadrilateral, the plurality of data driving units and at least one of the gate driving units are respectively disposed on two opposite sides of the edge region, and the other gate driving units are disposed in the edge region and on a side adjacent to the side on which the plurality of data driving units are disposed, wherein the gate driving unit closest to the plurality of data driving units is configured to output a first-stage gate output signal.

In an embodiment of the invention, the gate driving unit outputting the first stage gate output signal and the gate driving unit outputting the last stage gate output signal are electrically connected to the data driving unit through different array routing lines, respectively.

In one embodiment of the present invention, the gate input lines are identical in length in the pixel region.

In one embodiment of the present invention, at least one of the gate input lines is disposed in parallel with the plurality of data lines.

In an embodiment of the present invention, the plurality of data driving units and the plurality of gate driving units are chip on film packages.

In order to achieve the above object, the present invention further provides a display device, which includes the bendable array substrate and an encapsulation layer disposed on the bendable array substrate.

In one display device of the present invention, the plurality of gate driving units outside the pixel region are connected by an array winding, one end of each of the plurality of data driving units is disposed on a main control board, and the other end of each of the plurality of data driving units is disposed on the first substrate, and the main control board exchanges signals with all the gate driving units through the plurality of data driving units and the array winding.

In the bendable array substrate and the display device provided by the embodiments of the application, the data driving unit and the at least one gate driving unit are arranged at two opposite sides of the pixel region, so that the array substrate can protect the data driving unit and the gate driving unit from being damaged during static bending or dynamic bending;

meanwhile, when the plurality of data driving units and the plurality of gate driving units are arranged on two opposite sides of the pixel region, the gate driving units outputting the first-stage gate driving signal and the last-stage gate driving signal can be respectively connected with the data driving units through different array windings, so that the parasitic capacitance of signal transmission is greatly reduced, and the stability of signal transmission of the array substrate is ensured.

[ description of the drawings ]

FIG. 1 is a schematic circuit layout of a bendable array substrate according to an embodiment of the invention;

FIG. 2a is a schematic cross-sectional view of a portion of a first substrate in a pixel region according to an embodiment of the invention;

FIG. 2b is a cross-sectional view of a connection point portion of the first substrate in the pixel region according to an embodiment of the invention;

FIG. 3 is a schematic circuit layout diagram of another embodiment of a bendable array substrate according to the invention;

FIG. 4a is a schematic circuit layout diagram of a bendable array substrate according to still another embodiment of the invention;

FIG. 4b is a schematic circuit layout diagram of a bendable array substrate according to still another embodiment of the invention;

FIG. 5 is a cross-sectional view of a bendable array substrate according to an embodiment of the invention in an unfolded state;

FIG. 6 is a cross-sectional view of a bendable array substrate according to an embodiment of the invention;

FIG. 7 is a schematic cross-sectional view of a display device according to an embodiment of the invention.

[ detailed description ] embodiments

The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.

In the drawings, elements having similar structures are denoted by the same reference numerals.

Referring to fig. 1, fig. 1 is a schematic layout view of a bendable array substrate 10 according to the present invention. The bendable array substrate 10 includes a first substrate S1 including a pixel region 110 and an edge region 120 surrounding the pixel region 110; a plurality of data driving units DC1-DCn, and a plurality of gate driving units GC 1-GCm. In the pixel region 110, a plurality of scanning lines G1-Gp extending in the first direction D1 and a plurality of data lines DR1, DG1, DB1DRq, DGq, DBq extending in the second direction D2 are provided.

It should be noted that, in the embodiment of fig. 1, each pixel is composed of 3 kinds of sub-pixels with different colors, for example, the pixels in the first row and the first column are provided with three data lines DR1, DG1 and DB1 providing signals with different colors and a scan line G1 providing signals to red sub-pixels, green sub-pixels and blue sub-pixels arranged along the first direction D1. That is, for example, if the display area has 1080 pixels along the first direction D1, q is 1080. In total, 1080 × 3 — 3240 data lines arranged along the first direction and extending along the second direction D2 and scan lines extending along the first direction D1 provide driving signals.

The data lines DR1, DG1 and DB1 are configured to transmit a sub-pixel output signal for making the sub-pixel light emitting unit emit red light, a sub-pixel output signal for making the sub-pixel light emitting unit emit green light and a sub-pixel output signal for making the sub-pixel light emitting unit emit blue light, respectively. Each sub-pixel light-emitting unit may include one or all of a red light-emitting unit, a blue light-emitting unit, and a green light-emitting unit, and the sub-pixel light-emitting unit may be any one of an organic light-emitting diode (OLED), a sub-millimeter light-emitting diode (Mini-LED), a Micro light-emitting diode (Micro-LED), or a light-emitting diode (LED)

In other embodiments, the bendable array substrate 10 includes a single color sub-pixel for each pixel. Alternatively, in another embodiment, the bendable array substrate 10 includes four or more sub-pixels with different colors for each pixel.

As shown in fig. 1, the plurality of data driving units DC1-DCn and the plurality of gate driving units GC1-GCm are respectively disposed on two opposite sides 121, 123 of the edge region 120, and since the plurality of data driving units DC1-DCn and the plurality of gate driving units GC1-GCm with higher hardness are not disposed on the other two opposite sides 122, 124 of the edge region 120, when the foldable array substrate 10 is bent, the sides 122, 124 not disposed with the data driving units DC1-DCn and the gate driving units GC1-GCm can bear a larger amount of bending deformation, and the data driving units DC and the gate driving units GC cannot directly bear the stress of deformation.

In order to provide signals of the gate driving units GC1-GCm to the scan lines G1-Gp, each gate driving unit GC1-GCm is connected to a gate input line GI1-GIm extending toward the pixel region 110. In the embodiment shown in fig. 1, the gate input line GI1 is electrically connected to the scan line G1 at the intersection P1. Each of the gate input lines is electrically connected to a different scan line, respectively, to output a gate signal to a different scan line of the pixel region 110.

In an embodiment of the present invention, each gate input line GI has the same length in the pixel region 110 to balance the operation load of the sub-pixels.

In detail, referring to fig. 1, the gate driving unit GC1 outputting the first stage gate control output signal and the gate driving unit GCm outputting the last stage gate control output signal are respectively electrically connected to one data driving unit DC1 and DCn through different array wires WOA1 and WOA2, respectively, and since the pitch length of the first data driving unit DC1 in the first direction D1 and the first gate driving unit GC1 in the first direction D1 is close to the pitch length of the last data driving unit DCn in the first direction D1 and the last gate driving unit GCm in the first direction D1, the parasitic capacitance of the connection lines between the plurality of gate driving units GC1-GCm and the plurality of data driving units DC1-DCn is further balanced.

In addition, the gate driving unit GC1 outputting the first stage gate control output signal and the gate driving unit GCm outputting the last stage gate control output signal are electrically connected to the different data driving units DC1 and DCn through the different WOA1 and WOA2, respectively, so that the distortion rate of signal transmission between the gate driving units GC1-GCm and the data driving units DC1-DCn can be greatly reduced, and the interference noise between the different gate driving signals can be reduced.

Preferably, the gate input lines GI1-GIm extend from the gate driving units GC1-GCm to the corresponding scan lines G1-Gm respectively and are electrically connected to the scan lines G1-Gm at the intersections respectively, and the gate input lines GI1-GIm continue to extend along the second direction D2 to the edge of the pixel region 110, that is, although each gate input line GI1-GIm is electrically connected to a different scan line G1-Gm at a different intersection in the pixel region 110, the trace lengths of all the gate input lines GI1-GIm along the second direction D2 in the pixel region 110 are equal, so that the metal density inside each pixel is uniform, and the parasitic capacitances of all the gate input lines GI1-GIm are uniform, thereby improving the uniformity of the display effect of the pixel cell.

In an embodiment of the invention, the gate input lines GI1-GIm and the scan lines G1-Gm on the first substrate S1 are layered to reduce the influence of the gate signals received by each of the scan lines G1-Gm by the gate signals of other output stages.

Further, referring to fig. 2a, fig. 2a is a schematic cross-sectional view of a first substrate in a pixel region according to an embodiment of the invention. The first substrate S1 includes a gate input line GIm, an insulating layer RL and a scan line Gm in the pixel region 110, wherein the insulating layer RL separates the gate input line GIm from the scan line Gm.

FIG. 2b is a schematic cross-sectional view of a portion of the first substrate at the intersection of the pixel regions according to an embodiment of the invention; the difference from fig. 2a is that, at the intersection, a via Hm is formed through the at least one insulating layer RL to electrically connect the gate input line GIm with the scan line Gm.

As shown in fig. 1 and fig. 2, at least one spacer RL is spaced between the gate input lines GI1-GIm and the scan lines G1-Gm, and at other positions where the gate input lines GI1-GIm and the scan lines G1-Gm are interlaced in a top view without forming an electrical connection, the conductive layer of the gate input lines GI1-GIm is electrically separated from the conductive layer of the scan lines G1-Gm, so as to improve the accuracy of signal transmission and simplify the circuit layout inside the pixel region 110, and the plurality of gate input lines GI1-GIm, the plurality of scan lines G1-Gm, and the plurality of data lines DC1-DCn are interlaced and overlapped in the pixel region 110 in a layered manner without affecting the signal transmission.

The insulating layer in the pixel region 110 includes an inorganic insulating layer, and specifically, the material of the insulating layer includes, for example, silicon oxide (SiOx), silicon nitride (SiN), and the like.

In an embodiment of the invention, the gate input lines GI1-GIm and the data lines DC1-DCn are disposed at the same layer, so that the gate input lines GI1-GIm and the data lines CD1-CDn can be simultaneously fabricated when the first substrate S1 is fabricated.

Referring to fig. 3, fig. 3 is a circuit layout diagram of another embodiment of the bendable array substrate 10 of the invention. In the embodiment shown in fig. 3, the plurality of data driving units DC1-CDn and the at least one gate driving unit GCm are disposed at two sides 121, 123 of the pixel region 110 opposite to each other, the at least one gate driving unit GCm is connected to at least one gate input line GIm extending toward the pixel region 110, the at least one gate input line GIm is electrically connected to one scan line Gm, and the other gate driving units GC1, GC2 are disposed at two adjacent sides 121, 122 of the edge region 120 opposite to each other with the plurality of data driving units DC 1-DCn.

The pixel region 110 is a quadrilateral, and the edge region 120 surrounds the pixel region 110 to form a square. The gate driving units GC1-GCm are disposed in the edge area 120. At least one gate driving unit GCm is disposed at the side 123 of the edge region 120, the other gate driving units GC1, GC2 and the like are disposed at the side 122 of the edge region 120, and the side 122 is adjacent to the side 121 of the plurality of data driving units DC 1-DCn. The gate driving unit GC1 located closest to the plurality of data driving units DC1-DCn is used for outputting a first stage gate output signal. That is, the output levels of the gate driving units GC1-GCm are sequentially sorted from the gate driving unit GC1 closest to the data driving unit DC1 to the gate driving unit GCm disposed at the bottom of the side 123, so as to simplify the wiring of all the gate driving units GC1-GCm in the non-pixel region 110, and different gate driving units GC1-GCm sequentially control different corresponding scan lines G1-Gm.

However, in other embodiments of the present invention, the pixel region 110 has a symmetrical shape other than a quadrangle, and the data driving units DC1-DCn and the gate driving units GC1-GCm are respectively disposed at two symmetrical outer sides of the pixel region 110.

In a preferred embodiment, all of the gate input lines GI1-GIm and all of the data lines D1-Dn are parallel to the second direction D2, i.e., all of the gate input lines GI1-GIm are parallel to all of the data lines D1-Dn, so as to balance the metal density distribution of the pixel region 110.

A plurality of array wires WOA-g disposed on the array substrate may be used to transmit signals between each stage of the gate driving units GC 1-GCm.

Referring to fig. 4a, fig. 4a is a circuit layout diagram of a bendable array substrate according to still another embodiment of the invention, in an embodiment, a first data driving unit DC1 in a first direction D1 and a first gate driving unit GC1 in the first direction D1 exceed a setting range of a pixel region 110 in the first direction D1 in the first direction D1, and a last data driving unit DCn in the first direction D1 and a last gate driving unit GCm in the first direction D1 also exceed a setting range of the pixel region 110 in the first direction D1, so that an array wire WOA1 connecting the data driving unit DC1 and the gate driving unit GC1, and an array wire WOA2 connecting the data driving unit DCn and the gate driving unit GCm do not need to bypass a corner or an oblique angle of the pixel region 110, and a plurality of array wires WOA1 and WOA2 can be set to be completely parallel to a second direction D2, so that the array wire WOA1 and the array wire can be completely parallel to the second direction D1, The extending directions of the WOA2 are consistent, so that the array winding WOA1 and WOA2 are stressed more uniformly and are not easy to break when the array substrate is bent.

In an embodiment of the present invention, the gate driving unit GC1 outputting the first stage gate output signal and the gate driving unit GCm outputting the last stage gate output signal are electrically connected to the data driving units DC1 and DCn through different array wires WOA1 and WOA2, respectively. As shown in fig. 3, the gate driving unit GC1 outputting the first stage gate output signal is electrically connected to the data driving unit DC1 through the array wire WOA1 between the gate driving unit DC1, and the gate driving unit GCm outputting the last stage gate output signal is electrically connected to the data driving unit DCn through the array wire WOA2 between the gate driving unit DCn, so as to improve the stability of the output signals of the gate driving units GC 1-GCm.

Referring to fig. 3 and fig. 1 of the present invention, the embodiment of the present invention disclosed in fig. 3 and fig. 1 is different in that some of the gate driving units GC1, GC2 and the like in the embodiment disclosed in fig. 3 are disposed on the side 122 of the edge region 120 of the adjacent data driving units DC1-DCn, so that the pitches of the gate driving units GC1-GCm in the embodiment disclosed in fig. 3 are pulled apart, and the array substrate can be bent along the bending line BL without the gate driving units, and is suitable for manufacturing a display device applied to local bending.

The bending line BL can be disposed at the midpoint of the side 122 or the side 122 is close to the side 123 as shown in fig. 3, so that the end of the array substrate can be bent and fixed on the pillar, and the display device can maintain static bending on the pillar.

Referring to fig. 4b, fig. 4b is a schematic circuit layout diagram of a bendable array substrate according to another embodiment of the invention, wherein gate driving units GC1-GCm of each stage are connected through an array routing. And a plurality of data driving units DC arranged in the first direction D1 are configured to be partially connected to the main control board. The main control board comprises a printed circuit board PCBA and a control unit CON arranged on the printed circuit board PCBA. Therefore, the control unit CON, the data driving units DC1-DCn and the gate driving units GC1-GCm can be electrically connected to exchange signals through the printed circuit board PCBA, the array windings WOA1, WOA2 and WOA-g, so as to reduce the signal distortion rate among the main control board CON, the data driving units DC and all the gate driving units GC and improve the operation stability. It is convenient to regulate and control the driving timing of the data driving units DC1-DCn and the gate driving units GC1-GCn by the control unit CON disposed on the printed circuit board PCB a.

Further, please refer to fig. 5 and fig. 6 of the present invention.

Fig. 5 is a schematic side view of a bendable array substrate according to an embodiment of the invention in an unbent state. The data driving unit DCn and the gate driving unit GCm are respectively disposed on two opposite sides 121 and 123 of the edge region 120 in the second direction D2.

Fig. 6 is a schematic side view of a bendable array substrate according to an embodiment of the invention. When the bendable array substrate 10 is bent along the bending direction D3, since the data driving units DC1-DCn and the gate driving units GC1-GCm are respectively disposed at two bent ends of the bendable array substrate 10, and the long sides of the data driving units DC and the gate driving units GC are both parallel to the first direction D1 and the short sides are parallel to the second direction D2, the sectional areas of the data driving units DC1-DCn and the gate driving units GC1-GCm in the second direction D2 are smaller, so that when the display driving structure is bent along the bending direction D3 and is stressed, the deformation of the data driving units DC1-DCn and the gate driving units GC1-GCm is smaller, and therefore, the bending stress is smaller, thereby reducing the risk of the data driving units DC1-DCn and the gate driving units GC1-GCm, and enabling the bendable array substrate 10 to protect the data driving units DC1-DCn and the gate driving units GC1-GCm from being broken by the GC 26 during static or dynamic bending And is bad.

In an embodiment of the invention, the data driving unit DC and the Gate driving unit GC are Chip On Film (COF) chips or Gate On Array (GOA) chips, so as to simplify the circuit layout On the first substrate S1.

Referring to fig. 7, fig. 7 is a schematic view of a display device 1 including the bendable array substrate 10 according to any of the embodiments. The display device further includes an encapsulation layer 20 covering the bendable array substrate 10.

The encapsulating layer 20 may be an organic encapsulating layer or an inorganic encapsulating layer, and the organic encapsulating layer may include polyethylene terephthalate (polyethylene terephthalate), polyethylene naphthalate (polyethylene naphthalate), polycarbonate (polycarbonate), polyimide (polyimide), polyethylene sulfonate (polyethylene sulfonate), polyoxymethylene (polyoxymethylene), polyarylate (polyarylate), and/or hexamethyldisiloxane (hexamethyldisiloxane); the inorganic encapsulation layer may include inorganic materials including silicon oxide, silicon nitride, and/or silicon oxynitride.

The display device 1 has the same structure and beneficial effects as the display driving architecture provided by the previous embodiment. Since the foregoing embodiments have described the structure and beneficial effects of the display driving architecture in detail, detailed descriptions are omitted here.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and improvements can be made without departing from the principle of the present invention, and these modifications and improvements should also be considered as the protection scope of the present invention.