阅读说明：本技术 阵列基板及柔性显示面板 (Array substrate and flexible display panel ) 是由 陈建锋 张淑媛 于 2020-12-16 设计创作，主要内容包括：一种阵列基板,其显示区包括弯折区,阵列基板包括衬底、薄膜晶体管阵列以及无机绝缘层,所述无机绝缘层位于弯折区的部分开设有多个凹槽,且凹槽内填充有有机膜层,其中,位于弯折区的每一驱动薄膜晶体管的四周绕设有多个所述凹槽。在弯折区内的驱动薄膜晶体管的四周开设多个凹槽,并在该凹槽内填充有机材料,从而起到保护驱动薄膜晶体管的作用,避免弯折区长期遭受应力变化的压力导致驱动薄膜晶体管的阈值电压发生漂移的现象发生,进而提高柔性显示的可靠性。(The display area of the array substrate comprises a bending area, the array substrate comprises a substrate, a thin film transistor array and an inorganic insulating layer, a plurality of grooves are formed in the part, located in the bending area, of the inorganic insulating layer, organic film layers are filled in the grooves, and a plurality of grooves are formed around each driving thin film transistor located in the bending area. A plurality of grooves are formed in the periphery of the driving thin film transistor in the bending area, and organic materials are filled in the grooves, so that the effect of protecting the driving thin film transistor is achieved, the phenomenon that the threshold voltage of the driving thin film transistor drifts due to the fact that the bending area is subjected to stress change for a long time is avoided, and the reliability of flexible display is improved.)

1. An array substrate, the display area of which includes a bending area, the array substrate comprising:

a substrate;

the thin film transistor array is arranged on the substrate and comprises a plurality of driving thin film transistors arranged in an array; and

the inorganic insulating layer is arranged on the substrate, a plurality of grooves are formed in the part, located in the bending area, of the inorganic insulating layer, and organic film layers are filled in the grooves; wherein the content of the first and second substances,

and a plurality of grooves are formed around each driving thin film transistor in the bending area.

2. The array substrate of claim 1, wherein the openings of the plurality of grooves are the same size.

3. The array substrate of claim 2, wherein each of the grooves has a rectangular cross-sectional shape.

4. The array substrate of claim 1, wherein there is no overlapping surface between the plurality of grooves and the plurality of driving thin film transistors.

5. The array substrate of claim 4, wherein the plurality of grooves disposed around each of the driving TFTs comprises two first grooves and two second grooves, the two first grooves are disposed on two opposite sides of the driving TFT respectively, and the two second grooves are disposed on the other two opposite sides of the driving TFT respectively.

6. The array substrate of claim 5, wherein the array substrate comprises a plurality of data lines and a plurality of scan lines, the data lines and the scan lines are interlaced, the first groove extends in a same direction as the data lines and has an overlapping surface with the data lines, and the scan lines and the second groove extends in a same direction as the scan lines and has no overlapping surface with the scan lines.

7. The array substrate of claim 1, wherein the driving thin film transistor comprises an active layer, a first gate electrode, a second gate electrode, and a source drain layer, which are sequentially disposed; the inorganic insulating layer comprises a first grid insulating layer arranged between the active layer and the first grid, a second grid insulating layer arranged between the first grid and the second grid, and an inorganic interlayer insulating layer arranged between the second grid and the source drain layer.

8. The array substrate of claim 7, wherein the groove sequentially passes through the inorganic interlayer insulating layer, the second gate electrode, and the first gate electrode.

9. The array substrate of claim 7, wherein an organic interlayer insulating layer is disposed between the inorganic interlayer insulating layer and the source drain layer, and the groove is filled with the organic interlayer insulating layer.

10. A flexible display panel comprising the array substrate according to any one of claims 1 to 9 and a light-emitting layer disposed on the array substrate.

Technical Field

The invention relates to the technical field of display, in particular to an array substrate and a flexible display panel.

Background

An Organic Light-Emitting Diode (OLED) has many advantages of self-luminescence, low driving voltage, high luminous efficiency, short response time, high definition and contrast, wide viewing angle, wide temperature range, flexible display, large-area full-color display, and the like, and is considered as a display having the most potential for development.

With the development of display technology, flexible folding becomes the mainstream direction of the development of small-sized mobile phones, and in order to improve the bending performance of a display device as much as possible and realize dynamic bending of a product, the bending performance of a display area needs to be improved, and generally, organic materials are adopted to replace inorganic materials with larger stress, so that an important means for realizing dynamic bending is provided. However, the threshold voltage (Vth) of the thin film transistor in the bending region is likely to drift due to the stress of the stress variation over a long period of time, and the phenomenon of uneven light emission is caused.

Disclosure of Invention

The embodiment of the invention provides an array substrate and a flexible display panel, and aims to solve the technical problem that in the existing flexible display panel, the threshold voltage of a thin film transistor in a bending area drifts due to the fact that the bending area is subjected to stress change for a long time, so that the phenomenon of uneven light emission is caused, and the display effect is further influenced.

In order to solve the above problems, the technical scheme provided by the invention is as follows:

the embodiment of the invention provides an array substrate, wherein a display area of the array substrate comprises a bending area, and the array substrate comprises a substrate, a thin film transistor array arranged on the substrate and an inorganic insulating layer arranged on the substrate; the thin film transistor array comprises a plurality of driving thin film transistors arranged in an array, a plurality of grooves are formed in the part, located in the bending area, of the inorganic insulating layer, and organic film layers are filled in the grooves; and a plurality of grooves are formed around each driving thin film transistor in the bending area.

In one embodiment of the invention, the openings of the plurality of grooves are the same size.

In one embodiment of the present invention, each of the grooves has a rectangular cross-sectional shape.

In an embodiment of the invention, there is no overlapping surface between the plurality of grooves and the plurality of driving thin film transistors.

In an embodiment of the invention, the plurality of grooves disposed around each of the driving tfts includes two first grooves and two second grooves, the two first grooves are disposed on two opposite sides of the driving tfts respectively, and the two second grooves are disposed on the other two opposite sides of the driving tfts respectively.

In an embodiment of the invention, the array substrate includes a plurality of data lines and a plurality of scan lines that are interlaced with each other, an extending direction of the first groove is the same as an extending direction of the data lines and has an overlapping surface with the data lines, and an extending direction of the second groove is the same as an extending direction of the scan lines and has no overlapping surface with the scan lines.

In an embodiment of the present invention, the driving thin film transistor includes an active layer, a first gate electrode, a second gate electrode, and a source drain electrode layer, which are sequentially disposed; the inorganic insulating layer comprises a first grid insulating layer arranged between the active layer and the first grid, a second grid insulating layer arranged between the first grid and the second grid, and an inorganic interlayer insulating layer arranged between the second grid and the source drain layer.

In an embodiment of the present invention, the groove sequentially passes through the inorganic interlayer insulating layer, the second gate electrode, and the first gate electrode.

In an embodiment of the present invention, an organic interlayer insulating layer is disposed between the inorganic interlayer insulating layer and the source drain layer, and the groove is filled with the organic interlayer insulating layer.

The embodiment of the invention also provides a flexible display panel, which comprises the array substrate and a light emitting layer arranged on the array substrate.

The invention has the beneficial effects that: a plurality of grooves are formed in the periphery of the driving thin film transistor in the bending area, and organic materials are filled in the grooves, so that the effect of protecting the driving thin film transistor is achieved, the phenomenon that the threshold voltage of the driving thin film transistor drifts due to the fact that the bending area is subjected to stress change for a long time is avoided, and the reliability of flexible display is improved.

Drawings

Fig. 1 is a schematic plan view of an array substrate according to an embodiment of the present invention.

Fig. 2 is a schematic cross-sectional view of an array substrate according to an embodiment of the invention.

Fig. 3 is a circuit diagram of a pixel driving circuit according to an embodiment of the invention.

Fig. 4 is a schematic structural diagram of a flexible display panel according to an embodiment of the present invention.

Detailed Description

The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.

The invention aims at the technical problems that the threshold voltage of a thin film transistor in a bending area drifts due to the fact that the bending area is subjected to stress variation for a long time, and further the light emitting is uneven, and further the display effect is influenced in the existing flexible display panel, and the defects can be solved by the flexible display panel.

Referring to fig. 1 and fig. 2, an array substrate 100 according to an embodiment of the present invention includes a substrate 10, a thin film transistor array 20, and an inorganic insulating layer 30, wherein the thin film transistor array 20 and the inorganic insulating layer 30 are disposed on the substrate 10, and the array substrate 100 includes a plurality of thin film transistors disposed in an array. Each of the thin film transistors includes an active layer, a gate electrode, a source electrode, a drain electrode, and the like, and the inorganic insulating layer 30 may be a plurality of composite film layers disposed between adjacent metal device film layers in the thin film transistor to perform an insulating function.

The display area of the array substrate 100 may include a bending area BA and a non-bending area, and is applied to a flexible display panel that can be bent. The thin film transistor array comprises a plurality of driving thin film transistors arranged in an array, in order to improve the bending performance of the display area, a plurality of grooves 301 are formed in the part, located in the bending area BA, of the inorganic insulating layer 30, and the grooves 301 are filled with the organic film layer 40.

Those skilled in the art find that the brightness uniformity of the flexible screen after bending is degraded in the continuous bending process, which is represented as: when the gray scale of W255 is displayed, the brightness of the bending area BA is larger than that of the non-bending area, and when the gray scale of W is displayed, the brightness of the bending area BA is lower than that of the non-bending area. After the light emitting layer and the Mod factor are eliminated, the final locking deterioration is caused by: the bending causes a shift in threshold voltage (Vth) of a Driver TFT (driving thin film transistor), which in turn causes a luminance difference. Therefore, in the embodiment of the present invention, the plurality of grooves 301 are formed around each driving thin film transistor located in the bending area BA, and the grooves 301 are filled with organic materials, so that stress generated during bending is accumulated near the grooves 301, thereby protecting the driving thin film transistors from stress interference, or greatly weakening stress borne by the driving thin film transistors, and preventing long-term stress variation from affecting stability of threshold voltages of the driving thin film transistors.

In one embodiment, the size of each of the grooves 301 is kept consistent, and the photo dose amount cannot satisfy the exposure of apertures with different sizes, and dry etching may cause CD Loss exceeding due to the loading effect, Taper angle abnormality, Layer Loss large etching failure, and the like for the holes with different sizes, so that the grooves 301 with the same size need to be designed.

The depth of the groove 301 can extend to the surface of the substrate 10 and also to a part of the surface of the film layer above the substrate 10.

The array substrate 100 includes a plurality of pixels distributed in an array, each pixel includes a driving thin film transistor T1 and a compensation thin film transistor, the array substrate 100 is provided with a plurality of driving thin film transistors T1, and fig. 1 only shows an arrangement schematic diagram of the thin film transistors of one pixel.

Referring to fig. 1, a plurality of grooves 301 are formed around the driving tft T1, and the grooves 301 are filled with an organic film.

In one embodiment, the opening size of a plurality of the grooves 301 remains the same. Because the formation of the groove 301 requires a hole-digging design for the multiple film layers of the inorganic insulating layer 30, for groove structures of different sizes, the exposure amount cannot simultaneously meet the exposure of the apertures of different sizes, and for holes of different sizes, the dry etching process can cause undesirable phenomena of excessive CD LOSS (CD LOSS), abnormal etching cone angle, film layer LOSS and the like due to the load effect, so that the groove 301 structure can be widely used in the process, the embodiment of the invention adopts the groove 301 of the same aperture.

In one embodiment, each of the grooves 301 has a rectangular cross-section. Because the wiring of the thin film transistor is dense, compared with a square or round groove, the space occupied by the rectangular groove is relatively narrow, and compared with other elliptical or irregular grooves in the process, the exposure effect in the exposure process is better.

In one embodiment, there is no overlapping surface between the plurality of grooves 301 and the driving thin film transistor T1, that is, the orthographic projection of the grooves 301 on the substrate 10 does not overlap with the orthographic projection of the driving thin film transistor T1 on the substrate 10, so that the grooves 301 do not interfere with the lines.

In one embodiment, the plurality of grooves 301 disposed around each of the driving tfts T1 includes two first grooves 301A and two second grooves 301B, wherein the two first grooves 301A are disposed on two opposite sides of the driving tft T1, respectively, and the two second grooves 301B are disposed on the other two opposite sides of the driving tft T1, respectively, that is, one groove 301 is disposed on each of four sides of the driving tft T1, so as to form a groove structure surrounding the driving tft T1, thereby reducing the influence of bending stress on the electrical property of the driving tft T1.

In one embodiment, the plurality of grooves 301 are elongated, two first grooves 301A extend along a first direction Y, and two second grooves 301B extend along a second direction X, where the first direction Y intersects the second direction X.

The array substrate further comprises a plurality of data lines 11 and a plurality of scanning lines 13 which are staggered, the extending direction (Y) of the first groove 301A is the same as the extending direction of the data lines 11, and the extending direction (X) of the second groove 301B is the same as the extending direction of the scanning lines 13.

In one embodiment, the first groove 301A has an overlapping surface with the data line 11, and the second groove 301B has no overlapping surface with the scan line 13. Generally, the scan line 13 and the gate of the tft are disposed on the same layer, and the design of the groove 301 needs to penetrate through the inorganic film layer near the gate, so that the second groove 301B is designed to avoid the scan line 13 in order to avoid interference between the groove 301 and the scan line 13. Generally, the data line 11 and the source/drain layer of the tft are disposed on the same layer, and the inorganic insulating layer 30 may be disposed below the source/drain layer, so that the groove 301 does not need to pass through the source/drain layer, that is, the groove 301 is disposed below the data line 11, and therefore the groove 301 does not interfere with the data line 11, and an overlapping surface may be formed between the first groove 301 and the data line 11.

Referring to fig. 2, in one embodiment, the driving thin film transistor T1 further includes an active layer 21, a first gate 22, a second gate 23, and a source drain layer 24 sequentially disposed.

The inorganic insulating layer 30 includes a first gate insulating layer 31 disposed between the active layer 21 and the first gate 22, a second gate insulating layer 32 disposed between the first gate 22 and the second gate 23, and an inorganic interlayer insulating layer 33 disposed between the second gate 23 and the source drain layer 24.

The groove 301 passes through the inorganic interlayer insulating layer 33, the second gate electrode 23, and the first gate electrode 22 in this order.

In an embodiment, the organic film may be an interlayer insulating layer 40 disposed between the inorganic interlayer insulating layer 33 and the source drain layer 24, and the organic interlayer insulating layer 40 covers the second gate 23 and fills the groove 301.

In other embodiments, the organic film layer may be disposed on the source/drain layer 24, and the organic film layer may be an organic planarization layer, and the groove 301 is filled with the organic planarization layer.

In one embodiment, the inorganic interlayer insulating layer 33 may include a first inorganic interlayer insulating layer and a second inorganic interlayer insulating layer sequentially disposed on the second gate electrode 23. The material of the first inorganic interlayer insulating layer may be silicon dioxide, and the material of the second inorganic interlayer insulating layer may be silicon nitride.

In one embodiment, the material of the first gate insulating layer 31 may be silicon dioxide, and the material of the second gate insulating layer 32 may be silicon nitride.

The substrate 10 may be a double-layer polyimide layer, and includes a first polyimide layer, a barrier layer and a second polyimide layer stacked in sequence, where the barrier layer is an inorganic material, and may be a silicon dioxide material.

Referring to fig. 1, the driving circuit of the array substrate 100 includes 7 thin film transistors T1 to T7 and a storage capacitor C, i.e., a first thin film transistor (driving thin film transistor) T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a fifth thin film transistor T5, a sixth thin film transistor T6, and a seventh thin film transistor T7. The 7 thin film transistors T1 to T7 each include an active layer, a source electrode, a drain electrode, and a gate electrode.

Referring to fig. 1 and 3, the array substrate 100 further includes a power signal line 12, a signal reset line 14, and a control signal line 15, the power signal line 12 is parallel to the data line 11, and the signal reset line 14 is parallel to the scan line 13. The signal reset line 14 is used for inputting a low potential voltage Vi, the power signal line 12 is used for inputting a power positive voltage VDD, the control signal line 15 is used for inputting a control signal EM, the Data line 11 is used for inputting a Data voltage signal Data, and the Scan line 13 is used for inputting a present-stage Scan signal Scan (n) or a previous-stage Scan signal Scan (n-1).

The gate of the seventh thin film transistor T7 is connected to the primary scan line 13, the source of the seventh thin film transistor T7 is connected to one of the reset signal lines 14, the drain thereof is connected to the source of the sixth thin film transistor T6, and the source of the sixth thin film transistor T6 is connected to the anode of the light emitting layer.

A drain of the sixth thin film transistor T6 is connected to the source of the first thin film transistor T1 and the source of the third thin film transistor T3, and a gate of the sixth thin film transistor T6 is connected to a control signal line 15.

A drain of the first thin film transistor T1 is connected to a source of the fifth thin film transistor T5 and a source of the second thin film transistor T2, and a gate of the first thin film transistor T1 is connected to a drain of the third thin film transistor T3, a source of the fourth thin film transistor T4, and an electrode plate of the capacitor C.

The gate electrodes of the third and second thin film transistors T3 and T2 are connected to the current scanning line 13, and the drain electrode of the second thin film transistor T2 is connected to the data line 11.

A gate of the fifth thin film transistor T5 is connected to the control signal line 15, and a drain of the fifth thin film transistor is connected to the power signal line 12 and the other electrode plate of the capacitor C.

The drain of the fourth thin film transistor T4 is connected to the reset signal line 14, and the gate of the fourth thin film transistor T4 is connected to the primary scan line 13.

The fourth thin film transistor T4 and the seventh thin film transistor T7 are turned on, and the reset action on the anode of the light emitting layer and the gate of the first thin film transistor T1 is realized; the first, second, and third thin film transistors T1, T2, and T3 are turned on, and the threshold voltage and the data voltage of the first thin film transistor T1 are written; the fifth thin film transistor T5 and the sixth thin film transistor T6 are turned on, completing the light emission of the pixel.

In one embodiment, the first gate 22, the scan line 13 and the control signal line 15 can be disposed in the same layer, and can be formed in a first metal layer.

The second gate 23 and the signal reset line 14 may be disposed in the same layer, and may be formed on a second metal layer.

The source/drain layer 24, the power signal line 12, and the data line 11 may be disposed in the same layer, and may be prepared in a third metal layer.

The first grid 22 may also be used to form a lower plate of the capacitor C, and the second grid 23 may be used to form an upper plate of the capacitor C.

The first metal layer and the second metal layer may be made of molybdenum metal, and the third metal layer may be made of a composite film, specifically, a titanium-aluminum-titanium three-layer composite film.

Referring to fig. 4, an embodiment of the invention further provides a flexible display panel, including the array substrate 100 of the above embodiment and a light emitting layer 200 disposed on the array substrate 100, where the light emitting layer 200 includes an anode 201, a functional material layer 202, and a cathode 203.

The source/drain electrode layer 24 is covered with an organic flat layer 50, the anode 201 is arranged on the organic flat layer 50, and the anode 201 is connected with the driving thin film transistor T1.

The organic planarization layer 50 is disposed thereon with a pixel defining layer 60, the pixel defining layer 60 defining a plurality of pixel regions, and the functional material layer 202 defined in the pixel regions.

A plurality of grooves are formed in the periphery of the driving thin film transistor in the bending area, and organic materials are filled in the grooves, so that the effect of protecting the driving thin film transistor is achieved, the phenomenon that the threshold voltage of the driving thin film transistor drifts due to the fact that the bending area is subjected to stress change for a long time is avoided, and the reliability of flexible display is improved.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The array substrate and the flexible display panel provided by the embodiment of the invention are described in detail, and the principle and the embodiment of the invention are explained by applying specific examples, and the description of the embodiment is only used for helping to understand the technical scheme and the core idea of the invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.