阅读说明：本技术 Uvled外延结构及其制备方法、uvled芯片 (UVLED epitaxial structure, preparation method thereof and UVLED chip ) 是由 蔡武 康建 陈向东 于 2021-07-20 设计创作，主要内容包括：本发明提供一种UVLED外延结构及其制备方法、UVLED芯片,其中,本发明提供的一种UVLED外延结构,包括依次层叠设置的：衬底、缓冲层、非掺层、N型导电层、应力释放层、有源层、电子阻挡层、P型导电层和金属接触层,所述有源层包括T个周期依次层叠设置的第一阱层、第二阱层、第三阱层和垒层,其中,3≤T≤12。本发明提供的UVLED外延结构及其制备方法、UVLED芯片,用以至少提高UVALED的发光效率。(The invention provides a UVLED epitaxial structure, a preparation method thereof and a UVLED chip, wherein the UVLED epitaxial structure provided by the invention comprises the following components in sequential stacking arrangement: the semiconductor device comprises a substrate, a buffer layer, a non-doped layer, an N-type conducting layer, a stress release layer, an active layer, an electronic barrier layer, a P-type conducting layer and a metal contact layer, wherein the active layer comprises a first well layer, a second well layer, a third well layer and a barrier layer which are sequentially stacked in T periods, and T is more than or equal to 3 and less than or equal to 12. The UVLED epitaxial structure, the preparation method thereof and the UVLED chip are used for at least improving the luminous efficiency of UVALED.)

1. A UVLED epitaxial structure, includes that range upon range of setting in proper order: the light-emitting diode comprises a substrate (10), a buffer layer (20), a non-doped layer (30), an N-type conducting layer (40), a stress release layer (50), an active layer (60), an electron blocking layer (70), a P-type conducting layer (80) and a metal contact layer (90), and is characterized in that the active layer (60) comprises a first well layer (61), a second well layer (62), a third well layer (63) and a barrier layer (64) which are sequentially stacked in T periods, wherein T is more than or equal to 3 and less than or equal to 12.

2. UVLED epitaxial structure according to claim 1, characterized in that the first well layer (61) is Al_x1In_y1Ga_(1-x1-y1)N layer of which<x1<0.10，0.01<y1<0.10。

3. UVLED epitaxial structure according to claim 2, characterised In that the second well layer (62) is In_y2Ga_(1-y2)N layer of which<y2<0.10。

4. UVLED epitaxial structure according to claim 3, characterized in that the third well layer (63) is Al_x3In_y3Ga_(1-x3-y3)N layer of which<x3<0.10，0.01<y3<0.10。

5. UVLED epitaxial structure according to claim 4, characterized in that the barrier layer (64) is Al_x4Ga_(1-x4)N layer of which<x4<0.20。

6. A UVLED epitaxial structure according to claim 5 characterised in that y2 > y1, y2 > y 3.

7. A UVLED epitaxial structure according to one of the claims 5 to 6 characterised in that x4 > x1, x4 > x 3.

8. A UVLED epitaxy structure according to any one of claims 5 to 6, characterised in that said first well layer (61) has a thickness comprised between 0.5nm and 2.0 nm; and/or

The second well layer (62) has a thickness of 0.5nm to 4.0 nm; and/or

The thickness of the third well layer (63) is 0.5nm to 2.0 nm; and/or

The barrier layer (64) is 5.0-15.0 nm thick.

9. A UVLED epitaxy structure according to any one of claims 5 to 6, characterised in that the band gap of said first well layer (61) is greater than or equal to the band gap of said second well layer (62); and/or

The energy band gap of the third well layer (63) is greater than or equal to the energy band gap of the second well layer (62).

10. A UVLED chip comprising a UVLED epitaxial structure according to any one of claims 1 to 9, wherein the UVLED chip emits light having a peak wavelength of 360nm to 400 nm.

11. A method of fabricating a UVLED epitaxial structure, for use in fabricating a UVLED epitaxial structure according to any one of claims 1 to 9, the method comprising:

providing a substrate (10);

a buffer layer (20), a non-doped layer (30), an N-type conducting layer (40) and a stress release layer (50) are sequentially arranged on the substrate (10) upwards;

the stress release layer (50) is repeatedly provided with T active layers (60), each active layer (60) comprises a first well layer (61), a second well layer (62), a third well layer (63) and a barrier layer (64), wherein the first well layer, the second well layer, the third well layer and the barrier layer are sequentially stacked, and T is more than or equal to 3 and less than or equal to 12;

and an electron blocking layer (70), a P-type conducting layer (80) and a metal contact layer (90) are sequentially arranged on the active layer (60) upwards.

Technical Field

The invention relates to the technical field of semiconductor photoelectron, in particular to a UVLED epitaxial structure, a preparation method thereof and a UVLED chip.

Background

With the continuous development of science and technology, various LEDs (Light Emitting diodes) can directly convert electric energy into Light energy, and have been widely applied to daily life, work and industry of people. The UVLED epitaxial structure is a substrate structure capable of being heated to a proper temperature, the material of the UVLED epitaxial structure is a base stone for technical development of the semiconductor lighting industry, and the UVLED chip is generally formed by further processing and manufacturing an LED epitaxial wafer.

Ultraviolet (ultraviolet, abbreviated as UV) radiation is divided into an A wave band (320-400 nm), a B wave band (275-320 nm) and a C wave band (200-275 nm) which are respectively called as UVA, UVB and UVC, the market share of UVALED chips with the wavelength of 360-400 nm is higher and higher, and the ultraviolet LED has great application value In the fields of illumination, sterilization, medical treatment, printing, detection, photocuring, insect attraction and the like.

Therefore, how to solve the problem of low luminous efficiency of the UV LED is a technical problem which needs to be solved urgently in the industry.

Disclosure of Invention

The invention provides a UVLED epitaxial structure, a preparation method thereof and a UVLED chip, which are used for at least improving the luminous efficiency of UVALED.

In order to achieve the above object, the present invention provides a UVLED epitaxial structure, including: the semiconductor device comprises a substrate, a buffer layer, a non-doped layer, an N-type conducting layer, a stress release layer, an active layer, an electronic barrier layer, a P-type conducting layer and a metal contact layer, wherein the active layer comprises a first well layer, a second well layer, a third well layer and a barrier layer which are sequentially stacked in T periods, and T is more than or equal to 3 and less than or equal to 12.

In the UVLED epitaxial structure provided by the invention, the active layer comprises the first well layer, the second well layer, the third well layer and the barrier layer which are sequentially stacked in 3-12 periods, so that the stress generated during the growth of the active layer can be reduced, the growth quality of the active layer is improved, the internal stress of a quantum well can be relieved, the crystal quality of a well barrier interface of the quantum well and the quantum barrier can be greatly improved, the light effect of the semiconductor chip is improved, the indium quantum dot proportion is increased, and the internal quantum efficiency, the crystal quality of the active layer and the light-emitting efficiency are improved as a whole.

In one possible embodiment, the first well layer is Al_x1In_y1Ga_(1-x1-y1)N layer of which<x1<0.10，0.01<y1<0.10。

In one possible embodiment, the second well layer is In_y2Ga_(1-y2)N layer of which<y2<0.10。

In one possible embodiment, the third well layer is Al_x3In_y3Ga_(1-x3-y3)N layer of which<x3<0.10，0.01<y3<0.10。

In one possible embodiment, the barrier layer is Al_x4Ga_(1-x4)N layer of which<x4<0.20。

In one possible implementation, y2 > y1, y2 > y 3.

In one possible implementation, x4 > x1, and x4 > x 3.

In one possible embodiment, the first well layer has a thickness of 0.5nm to 2.0 nm; and/or the second well layer has a thickness of 0.5nm to 4.0 nm; and/or the thickness of the third well layer is 0.5nm to 2.0 nm; and/or the barrier layer has a thickness of 5.0nm to 15.0 nm.

In one possible embodiment, the energy band gap of the first well layer is greater than or equal to the energy band gap of the second well layer; and/or

The energy band gap of the third well layer is larger than or equal to that of the second well layer.

The invention also provides a UVLED chip which comprises the UVLED epitaxial structure, and the peak wavelength of light emitted by the UVLED chip is 360-400 nm.

The UVLED chip provided by the invention adopts the UVLED epitaxial structure, so that the luminous efficiency is high.

The invention also provides a preparation method of the UVLED epitaxial structure, which is used for preparing the UVLED epitaxial structure and comprises the following steps:

providing a substrate;

a buffer layer, a non-doped layer, an N-type conducting layer and a stress release layer are sequentially arranged on the substrate upwards;

repeatedly arranging T active layers on the stress release layer, wherein the active layers comprise a first well layer, a second well layer, a third well layer and a barrier layer which are sequentially stacked, and T is more than or equal to 3 and less than or equal to 12;

and an electron blocking layer, a P-type conducting layer and a metal contact layer are sequentially arranged on the active layer upwards.

According to the preparation method of the UVLED epitaxial structure, the forbidden bandwidth of the quantum well and the quantum barrier can be adjusted by controlling the Al/In component change In the four layers of the first well layer, the second well layer, the third well layer and the barrier layer, the quantum dot effect is enhanced, and further higher luminous efficiency is realized.

In addition to the technical problems solved by the embodiments of the present invention, the technical features constituting the technical solutions, and the advantages brought by the technical features of the technical solutions described above, a UVLED epitaxial structure and a method for manufacturing the same, other technical problems that can be solved by a UVLED chip, other technical features included in the technical solutions, and advantages brought by the technical features provided by the embodiments of the present invention will be further described in detail in specific embodiments.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic diagram of a UVLED epitaxial structure according to an embodiment of the present invention;

fig. 2 is a schematic energy band diagram of an active layer in a UVLED epitaxial structure device according to an embodiment of the present invention;

fig. 3 is a flowchart illustrating a method for fabricating a UVLED epitaxial structure according to one embodiment of the present invention;

fig. 4 is a schematic diagram showing the flow of TMGa in the growth of an active layer in a UVLED epitaxial structure apparatus according to an embodiment of the present invention as a function of time;

fig. 5 is a schematic time-dependent flow of TMIn for growth of an active layer in a UVLED epitaxial structure apparatus according to an embodiment of the present invention;

fig. 6 is a schematic diagram illustrating a time-dependent change in a flux of TMAl for growth of an active layer in a UVLED epitaxial structure device according to an embodiment of the present invention.

Description of reference numerals:

10-a substrate;

20-a buffer layer;

30-a non-doped layer;

a 40-N type conductive layer;

50-a stress release layer;

60-an active layer;

70-an electron blocking layer;

80-P type conductive layer;

90-metal contact layer;

61-a first well layer;

62-a second well layer;

63-third well layer;

and 64-barrier layer.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Gallium nitride (GaN) -based semiconductor materials are the third generation semiconductor materials following silicon and gallium arsenide, since GaN-based materials can emit the entire wavelength band from ultraviolet light to visible light. The performance of the UVLED chip largely depends on the performance of the active layer 60. The physical properties of the gallium nitride (GaN) quantum well structure limit the improvement of the performance of the UVLED chip, and the stress generated during the growth of the active layer influences the crystal quality of the active layer, so that the quantum dot effect is weakened, and the luminous efficiency is reduced. Particularly, the UVALED chip with the wavelength of 360-400 nm has low luminous efficiency, the ratio of the In component and the Al component has obvious influence on the luminous efficiency of the UVALED chip, and the problem that the forbidden bandwidth of an ultraviolet light quantum well and a quantum barrier is difficult to ensure while the luminous efficiency is improved by improving the In component exists.

In view of the above background, the present invention provides a UVLED epitaxial structure, as shown in fig. 1, including: the semiconductor device comprises a substrate 10, a buffer layer 20, a non-doped layer 30, an N-type conducting layer 40, a stress release layer 50, an active layer 60, an electron blocking layer 70, a P-type conducting layer 80 and a metal contact layer 90, wherein the active layer 60 comprises a first well layer 61, a second well layer 62, a third well layer 63 and a barrier layer 64 which are sequentially stacked in T periods, and T is more than or equal to 3 and less than or equal to 12.

According to the UVLED epitaxial structure provided by the embodiment of the invention, the active layer 60 comprises the first well layer 61, the second well layer 62, the third well layer 63 and the barrier layer 64 which are sequentially arranged in a stacking mode in 3-12 periods, stress generated during growth of the active layer 60 can be reduced, the growth quality of the active layer 60 can be improved, internal stress of a quantum well can be relieved, the crystal quality of a well barrier interface of the quantum well and the quantum barrier can be greatly improved, the light efficiency of a semiconductor chip is improved, the indium quantum dot proportion is increased, the internal quantum efficiency, the crystal quality of the active layer 60 and the light emitting efficiency are integrally improved, and the forbidden widths of the ultraviolet light quantum well and the quantum band can be ensured.

In one possible implementation, the substrate 10 may be sapphire (Al)₂O₃) At least one of silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), zinc oxide (ZnO), silicon (Si), gallium phosphide (GaP), indium phosphide (InP), and germanium (Ge).

In one possible implementation, the substrate 10 may be sapphire (Al)₂O₃) Example ofFor example, the patterned sapphire substrate 10 may be used, and the patterned sapphire substrate 10 may also be a mirror sapphire substrate 10.

In one possible implementation, N-type conductive layer 40 contains N-type impurities, which may be, for example, elements such as silicon (Si), germanium (Ge), tin (Sn), tellurium (Te), oxygen (O), carbon (C), etc., and the N-type impurities are doped to increase the carrier concentration.

In one possible implementation, the P-type conductive layer 80 and the metal contact layer 90 contain P-type impurities, such as magnesium (Mg), zinc (Zn), beryllium (Be), calcium (Ca), etc., and the P-type impurities are doped to increase the carrier concentration.

It is easily understood that T is an integer, and the numerical range of T is: t ≦ 3 ≦ T ≦ 12, i.e., T may be any integer between 3 and 12, e.g., T may be 3, 4, 5, 6, 7, 8, or 10.

In one possible embodiment, the first well layer 61 is Al_x1In_y1Ga_(1-x1-y1)N layer of which<x1<0.10，0.01<y1<0.10, for example x1 may be 0.03, 0.05 or 0.08; for example y1 may be 0.03, 0.05 or 0.08.

In one possible embodiment, the second well layer 62 is In_y2Ga_(1-y2)N layer of which<y2<0.10。In_y2Ga_(1-y2)The growth thickness of the N layer gradually increases or becomes thinner as the number of periods increases, and the In composition gradually increases or gradually decreases as the period increases. For example y2 may be 0.03, 0.05 or 0.08.

In one possible implementation, the third well layer 63 is Al_x3In_y3Ga_(1-x3-y3)N layer of which<x3<0.10，0.01<y3<0.10. For example x3 may be 0.03, 0.05 or 0.08. For example y3 may be 0.03, 0.05 or 0.08.

In one possible embodiment, barrier layer 64 is Al_x4Ga_(1-x4)N layer of which<x4<0.20. For example x4 may be 0.03, 0.05 or 0.08.

In this embodiment, the first well layer 61, the second well layer 62, and the third well layer 63 In the active layer 60 respectively include different element types, and the components of the elements are the same or different, so that the structure of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64 provided In this embodiment is adopted, and the final manufactured UVLED chip improves the In component, improves the quantum dot effect, improves the light emitting efficiency, and simultaneously can also ensure the forbidden bandwidth of the ultraviolet quantum well and the quantum barrier, and ensure that the emitted light is the required ultraviolet light.

Referring to fig. 2, which is a schematic energy band diagram of the active layer 60 in the UVLED epitaxial structure device provided in this embodiment, the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64 are Al respectively_x1In_y1Ga_(1-x1-y1)N layer, In_y2Ga_(1-y2)N layer, Al_x3In_y3Ga_(1-x3-y3)N layer, Al_x4Ga_(1-x4)N layer of which 0.01<x1<0.10、0.01<y1<0.10、0.01<y2<0.10、0.01<x3<0.10、0.01<y3<0.10、0.05<y4<0.20. By controlling the Al/In composition change In the four layers of the first well layer 61, the second well layer 62, the third well layer 63 and the barrier layer 64, the forbidden bandwidth of the quantum well and the quantum barrier can be adjusted.

In one possible implementation, y2 > y 1; y2 > y 3.

In one possible implementation, x4 > x 1; x4 > x 3.

In one possible embodiment, the thickness of the first well layer 61 is 0.5nm to 2.0nm, for example, the thickness of the first well layer 61 may be 0.5nm, 0.8nm, 1.0nm, 1.5nm, or 2.0 nm. And/or the thickness of the second well layer 62 is 0.5nm to 4.0nm, for example, the thickness of the second well layer 62 may be 0.5nm, 0.8nm, 1.0nm, 2.0nm, 3.0nm, or 4.0 nm. And/or the thickness of the third well layer 63 is 0.5nm to 2.0nm, for example, the thickness of the third well layer 63 may be 0.5nm, 0.8nm, 1.0nm, 1.5nm, or 2.0 nm. And/or the thickness of barrier layer 64 is 5.0nm to 15.0nm, for example, the thickness of barrier layer 64 may be 5.0nm, 6.0nm, 8.0nm, 10.0nm, 12.0nm, 13.0nm, or 15.0 nm.

In one possible embodiment, the first well layer 61 has a thickness of 0.5nm to 2.0nm, the second well layer 62 has a thickness of 0.5nm to 4.0nm, the third well layer 63 has a thickness of 0.5nm to 2.0nm, and the barrier layer 64 has a thickness of 5.0nm to 15.0 nm.

In one possible embodiment, the energy band gap of the first well layer 61 is greater than or equal to the energy band gap of the second well layer 62; and/or the energy band gap of the third well layer 63 is larger than or equal to the energy band gap of the second well layer 62. The first well layer 61, the second well layer 62 and the third well layer 63 with different energy band gaps can respectively realize different gain center wavelengths, and the growth quality of the UVLED epitaxial structure can be well controlled.

The buffer layer 20 is located between the substrate 10 and the undoped layer 30. The buffer layer 20 is kept between the substrate 10 and the undoped layer 30, so that the problem of lattice mismatch is avoided, and the stability and reliability of processing the UVLED epitaxial structure provided by the embodiment into a UVLED chip are ensured.

In one possible implementation, buffer layer 20 may be a gallium nitride buffer layer.

The electron blocking layer 70 in this embodiment can achieve lattice matching between the active layer 60 and the P-type conductive layer 80, thereby effectively reducing electron leakage and improving light emitting efficiency.

In order to reduce the stress generated in the active layer 60 due to lattice mismatch, the stress release layer 50 is disposed between the N-type conductive layer 40 and the active layer 60, so that the stress of the active layer 60 can be reduced, the recombination probability of electrons and holes in the active layer 60 can be improved, and the light emitting brightness can be improved.

The undoped layer 30 refers to an unintentionally doped gallium nitride (GaN) layer.

The buffer layer 20, the undoped layer 30, the N-type conductive layer 40, the stress release layer 50, the active layer 60, the electron blocking layer 70, the P-type conductive layer 80, and the metal contact layer 90 are grown of nitride-based III-V semiconductor layers, such as gallium nitride (GaN), indium nitride (InN), aluminum nitride (AlN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), aluminum indium gallium nitride (AlInGaN), and the like.

According to the UVLED epitaxial structure provided by this embodiment, the forbidden bandwidth can be adjusted by adjusting the thicknesses of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64 In the active layer 60, the amount of the Al component, and the amount of the In component, the internal stress is adjusted, the Al/In component is adjusted, the quantum dot effect is enhanced, and thus higher light emitting efficiency is achieved, and the forbidden bandwidth corresponding to the required ultraviolet light can be ensured.

According to the UVLED epitaxial structure provided by the embodiment, the introduction of the first well layer 61 and the third well layer 63 is improved, and under the condition that the forbidden bandwidth is not changed, namely the light-emitting wavelength is not changed, the higher In component of the active layer 60 is realized, the quantum dot effect is enhanced, and the light-emitting intensity is improved.

In the UVLED epitaxial structure provided In this embodiment, the first well layer 61, the second well layer 62, and the third well layer 63 In the active layer are adjusted by matching the Al/In composition and the thickness, so that the UVLED chip with a peak wavelength of 360nm to 400nm can emit light with high brightness.

The invention also provides a preparation method of the UVLED epitaxial structure, which is used for preparing the UVLED epitaxial structure. Referring to fig. 3, a flowchart of a method for manufacturing the UVLED epitaxial structure provided in the first to fifth embodiments of the present invention is shown, where the method for manufacturing the UVLED epitaxial structure includes:

s10, providing a substrate 10; the substrate 10 is placed in a metal organic compound vapor phase epitaxy precipitation apparatus

S20, sequentially arranging a buffer layer 20, a non-doped layer 30, an N-type conducting layer 40 and a stress release layer 50 upwards on a substrate 10;

in one possible implementation, a growth buffer layer 20, an undoped layer 30, an N-type conductive layer 40, and a stress relief layer 50 are sequentially deposited on the substrate 10.

S30, repeatedly arranging T active layers 60 on the stress release layer 50, wherein the active layers 60 comprise a first well layer 61, a second well layer 62, a third well layer 63 and a barrier layer 64 which are sequentially arranged in a laminated mode, and T is larger than or equal to 3 and smaller than or equal to 12;

s40, an electron blocking layer 70, a P-type conductive layer 80, and a metal contact layer 90 are sequentially disposed on the active layer 60 upward.

According to the preparation method of the UVLED epitaxial structure, the quantum dot effect is enhanced by adjusting the Al/In component, and further higher luminous efficiency is realized.

The Deposition apparatus adopted in this embodiment is a K465i Metal-organic Chemical Vapor Deposition (MOCVD) apparatus, which can realize precise control of growth of different functional layers, and is less polluted in the growth process, and high-purity hydrogen H2, high-purity N2, or high-purity H2/N2 mixed gas is used as a carrier gas, high-purity ammonia (NH3) is used as an N source, Metal organic trimethylgallium (TMGa) or triethylgallium (TEGa) is used as a gallium source, trimethylindium (TMIn) is used as an indium source, trimethylaluminum (TMAl) is used as an aluminum source, an N-type dopant is 200ppm silane (SiH4), a P-type dopant is magnesium dicocene (Cp2Mg), and the substrate 10 is a C-plane patterned sapphire substrate.

Fig. 4 is a schematic diagram showing the flow of TMGa in the growth of an active layer in a UVLED epitaxial structure apparatus according to an embodiment of the present invention as a function of time; fig. 5 is a schematic diagram showing the time-dependent flow of TMIn during growth of an active layer in a UVLED epitaxial structure apparatus according to an embodiment of the present invention; fig. 6 is a schematic diagram illustrating a time-dependent flow rate of TMAl during growth of an active layer in a UVLED epitaxial structure device according to an embodiment of the present invention. And depositing and growing an active layer 60 on the stress release layer 50, wherein the active layer 60 is a first well layer 61, a second well layer 62, a third well layer 63 and a barrier layer 64 which are arranged in sequence for T cycles. In S30, the flow rate changes of the three TMGa/TMIn/TMAl sources of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64 are shown in fig. 4, 5, and 6.

Example one

The active layer 60 is a 5-cycle repeated stack of 5 layers of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64, which is grown in an environment of high purity hydrogen H2, high purity N2, or high purity H2/N2 mixed gas as a carrier gas.

In one possible embodiment, the growth may be performed under a pressure of 200Torr and a growth temperature of 840 ℃ for 2min to 5min with a flow rate of 120sccm for triethylgallium (TEGa), 200sccm for trimethylindium (TMIn) and 10sccm for trimethylaluminum (TMAl), with the growth thickness of the first well layer 61 controlled to be 1.0nm, and the first well layer 61 may be Al_x1In_y1Ga_(1-x1-y1)N layers, where x1 can be 0.02 and y1 can be 0.025.

In one possible embodiment, in S30, the flow rate of triethylgallium (TEGa) may be set to 120sccm, the flow rate of trimethylindium (TMIn) may be set to 100sccm, and trimethylaluminum (TMAl) may be setThe flow rate of (2) is set to 0sccm, the growth is carried out for 2min to 5min under the conditions of a pressure of 200Torr and a growth temperature of 840 ℃, the growth thickness of the second well layer 62 is controlled to 1.5nm, and In is used as the second well layer 62_y2Ga_(1-y2)N layer, where y2 may be 0.015.

In one possible embodiment, in S30, the growth may be performed under a pressure of 200Torr and a growth temperature of 840 ℃ for 2min to 5min with a flow rate of triethyl gallium (TEGa) of 120sccm, a flow rate of trimethyl indium (TMIn) of 200sccm, and a flow rate of trimethyl aluminum (TMAl) of 10sccm, and the growth thickness of the third well layer 63 may be controlled to 1.0nm, and the third well layer 63 may be made of Al_x3In_y3Ga_(1-x3-y3)N layers, where x3 can be 0.02 and y3 can be 0.025;

in one possible embodiment, in S30, the growth may be performed under a pressure of 200Torr and a growth temperature of 920 ℃ for 4min to 5min by setting a flow rate of triethylgallium (TEGa) to 360sccm, a flow rate of trimethylindium (TMIn) to 0sccm, and a flow rate of trimethylaluminum (TMAl) to 50sccm, wherein the growth thickness of the barrier layer 64 is controlled to be 12.0nm, and the barrier layer 64 is Al_x4Ga_(1-x4)N layers, where x4 may be 0.08.

In S40, depositing and growing an electron blocking layer 70, a P-type conductive layer 80, and a metal contact layer 90 on the active layer 60 from bottom to top in sequence, completing the growth of the UVLED epitaxial structure device, processing the UVLED epitaxial structure device into a 45mil by 45mil UVLED chip according to a conventional normal mounting process, and driving the UVLED chip to emit light with a peak wavelength of 370.2nm, an optical power of 375mW, and a forward voltage of 3.32V under 350 mA.

In order to embody the scheme, an existing UVLED epitaxial structure is selected as a comparative example, in the selected existing UVLED epitaxial structure, structures and growth conditions of the other layers except for the active layer 60 are the same as those in the first embodiment, the existing UVLED epitaxial structure is processed into a 45mil by 45mil UVLED chip according to the same chip process as in the first embodiment, and under the same driving of 350mA, the peak wavelength of light emitted by the existing UVLED chip manufactured by the existing UVLED epitaxial structure is 370.6nm, the optical power is 352mW, and the forward voltage is 3.29V.

By comparison, the optical power of the first UVLED epitaxial structure is improved by about 6.5% compared with that of the existing UVLED epitaxial structure, and the forward voltage is only increased by 0.03V, so that the luminous efficiency is obviously improved.

Example two

The active layer 60 is a 5-cycle repeated stack of 5 layers of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64, which is grown in an environment of high purity hydrogen H2, high purity N2, or high purity H2/N2 mixed gas as a carrier gas.

The first well layer 61 was grown at a growth temperature of 840 ℃ under a pressure of 200Torr for 2 to 5min with a flow rate of trimethylindium (TMIn) and a flow rate of trimethylaluminum (TMAl) of 100sccm and 200Torr, while controlling the growth thickness of the first well layer 61 to 1.0nm and the first well layer 61 to be Al_x1In_y1Ga_(1-x1-y1)N, where x1 can be 0.025, y1 can be 0.015;

the flow rate of trimethylindium (TMIn) and the flow rate of trimethylaluminum (TMAl) in the third well layer 63 were set to 100sccm and 15sccm, respectively, and the layer was grown under a pressure of 200Torr and a growth temperature of 840 ℃ for 2 to 5min while controlling the growth thickness of the third well layer 63 to 1.0nm and the third well layer 63 to be Al_x1In_y1Ga_(1-x1-y1)N, where x1 can be 0.025 and y1 can be 0.015.

Example two compared to example one, the second well layer 62 and the barrier layer 64 were unchanged, the In composition In the first well layer 61 and the third well layer 63 was reduced, and the Al composition In the first well layer 61 and the third well layer 63 was increased.

The UVLED chips were processed into 45mil by 45mil UVLED chips by the same UVLED chip process as in example one, and the manufactured UVLED chips emitted light with peak wavelength of 368.8nm, optical power of 357mW and forward voltage of 3.36V under the drive of 350 mA. Compared with the embodiment, the In composition In the first well layer 61 and the third well layer 63 is reduced, and after the Al composition is increased, the average forbidden bandwidth of the quantum well is widened, and the wavelength is shortened; meanwhile, due to the reduction of In components In the quantum well, the quantum dot effect is weakened, and the overall luminous intensity is reduced. Compared with the UVLED chip processed by the existing UVLED epitaxial structure as a comparative example, the peak wavelength of the UVLED epitaxial structure is slightly shortened, the optical power is improved, and the luminous efficiency is also improved.

EXAMPLE III

The active layer 60 is a 5-cycle repeated stack of 5 layers of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64, which is grown in an environment of high purity hydrogen H2, high purity N2, or high purity H2/N2 mixed gas as a carrier gas.

The first well layer 61 was grown at a growth temperature of 840 ℃ under a pressure of 200Torr for 2 to 5min with a flow rate of trimethylindium (TMIn) and a flow rate of trimethylaluminum (TMAl) of 300sccm and a growth pressure of 200Torr, while controlling the growth thickness of the first well layer 61 to 1.0nm and the first well layer 61 to be Al_x1In_y1Ga_(1-x1-y1)N, where x1 can be 0.025 and y1 can be 0.033.

The flow rate of trimethylindium (TMIn) and the flow rate of trimethylaluminum (TMAl) in the third well layer 63 were set to 300sccm and 15sccm, respectively, and the layer was grown under a pressure of 200Torr and a growth temperature of 840 ℃ for 2 to 5min while controlling the growth thickness of the third well layer 63 to 1.0nm and the third well layer 63 to be Al_x1In_y1Ga_(1-x1-y1)N, where x1 can be 0.025 and y1 can be 0.033.

Example three compared to example one, the second well layer 62 and the barrier layer 64 were unchanged while increasing the In composition and the Al composition In the first well layer 61 and the third well layer 63; the UVLED chip is processed into a UVLED chip of 45mil by 45mil according to the same UVLED chip process as the example one, and the manufactured UVLED chip emits light with the peak wavelength of 371.8nm, the optical power of 382mW and the forward voltage of 3.31V under the drive of 350 mA. Compared with the first embodiment, when the In component and the Al component In the first well layer 61 and the third well layer 63 are increased simultaneously, the average forbidden bandwidth of the quantum well is slightly narrowed, and the wavelength is slightly longer; meanwhile, due to the rising of In components In the quantum wells, the quantum dot effect is enhanced, and the overall luminous intensity is slightly higher. Compared with the UVLED chip processed by the existing UVLED epitaxial structure as a comparative example, the peak wavelength of the UVLED epitaxial structure is slightly lengthened, the optical power is obviously improved, the quantum dot effect is enhanced, and the overall luminous efficiency is also improved.

Example four

The active layer 60 is a 5-cycle repeated stack of 5 layers of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64, which is grown in an environment of high purity hydrogen H2, high purity N2, or high purity H2/N2 mixed gas as a carrier gas.

The first well layer 61, the second well layer 62, and the third well layer 63 were grown in the same manner as in example one, except that the first well layer 61, the second well layer 62, and the third well layer 63 were grown to thicknesses of 0.8nm, 1.9nm, and 0.8nm, respectively,

in fourth embodiment, compared with the first embodiment, the barrier layer 64 is unchanged, the thicknesses of the first well layer 61 and the third well layer 63 are reduced, the thickness of the second well layer 62 is increased, and meanwhile, the total thickness of the first well layer 61, the second well layer 62 and the third well layer 63 is unchanged; the UVLED chips were processed into 45mil by 45mil UVLED chips according to the same UVLED chip process as in example one, and the peak wavelength of light emitted from the manufactured UVLED chips was 370.7nm, the optical power was 359mW and the forward voltage was 3.30V under the drive of 350 mA. Compared with the first embodiment, after the thicknesses of the first well layer 61 and the third well layer 63 are reduced and compensated to the thickness of the second well layer 62, the In component and the Al component In the quantum well are simultaneously reduced, the average forbidden bandwidth of the quantum well is basically unchanged, and the wavelength is basically leveled; meanwhile, due to the reduction of In components In the quantum well, the quantum dot effect is weakened, and the overall luminous intensity is low. Compared with the UVLED chip processed by the existing UVLED epitaxial structure as a comparative example, the peak wavelength of the UVLED chip is basically unchanged, the optical power is improved, and the luminous efficiency is also improved.

EXAMPLE five

The active layer 60 is a 5-cycle repeated stack of 5 layers of the first well layer 61, the second well layer 62, the third well layer 63, and the barrier layer 64, which is grown in an environment of high purity hydrogen H2, high purity N2, or high purity H2/N2 mixed gas as a carrier gas.

The first well layer 61, the second well layer 62, and the third well layer 63 were grown in the same manner as in example one, except that the first well layer 61, the second well layer 62, and the third well layer 63 were grown to thicknesses of 1.2nm, 1.1nm, and 1.2nm, respectively.

In fifth embodiment, compared with the first embodiment, the barrier layer 64 is unchanged, the thicknesses of the first well layer 61 and the third well layer 63 are increased, the thickness of the second well layer 62 is reduced, and meanwhile, the total thickness of the first well layer 61, the second well layer 62 and the third well layer 63 is ensured to be unchanged; the UV LED chips were processed into 45mil by 45mil UVLED chips according to the same UVLED chip process as in the example one, and the peak wavelength of light emitted by the manufactured UVLED chips under 350mA driving was 370.1nm, the optical power was 365mW and the forward voltage was 3.33V. On the premise that the total thickness is not changed, after the thicknesses of the first well layer 61 and the third well layer 63 are increased and the thickness of the second well layer 62 is reduced, the In component and the Al component In the quantum well are simultaneously increased, the average forbidden bandwidth of the quantum well is basically unchanged, and the wavelength is basically kept flat; although the In component In the quantum well is increased to some extent, the quantum dot effect is enhanced, but the Al component In the quantum well is increased, so that the film quality of the whole quantum well is deteriorated at a low growth temperature, and the whole luminous intensity is rather low. Compared with the UVLED chip processed by the existing UVLED epitaxial structure as a comparative example, the peak wavelength of the UVLED epitaxial structure is basically unchanged, the optical power is obviously improved, and the luminous efficiency is also improved.

The above five embodiments demonstrate that the invention can adjust and control the forbidden band width and adjust the internal stress by adjusting the thickness, Al composition and In composition of the first well layer 61, the second well layer 62, the third well layer 63 and the barrier layer 64 In the active layer 60, and adjust the Al/In composition under the condition of ensuring that the peak wavelength is basically unchanged, so as to enhance the quantum dot effect and further realize higher luminous efficiency.

The invention also provides a UVLED chip which comprises the UVLED epitaxial structure, and a current blocking layer, a transparent conducting layer and a connecting electrode which are sequentially formed on the UVLED epitaxial structure, wherein the peak wavelength of light emitted by the UVLED chip is 360-400 nm.

The connection electrode includes an N-type electrode electrically connected to the N-type conductive layer 40 and a P-type electrode electrically connected to the P-type conductive layer 80, and a current injected from the N-type electrode to the UVLED chip enters the active layer 60 through the N-type conductive layer 40, and a current injected from the P-type electrode to the UVLED chip enters the active layer 60 through the P-type conductive layer 80 and is combined in the active layer 60 to generate light.

The current blocking layer is used to make the active layer 60 under the current blocking layer not be activated effectively due to lack of current injection, the transparent conductive layer is used to increase current diffusion, and the N-type electrode and the P-type electrode can be in ohmic contact with the transparent conductive layer through the hole.

The UVLED chip provided by the invention adopts the UVLED epitaxial structure, so that the light-emitting efficiency is high.

It should be noted that the numerical values and numerical ranges referred to in this application are approximate values, and there may be some error due to the manufacturing process, and the error may be considered to be negligible by those skilled in the art.

In the description of the present invention, it is to be understood that the terms "center", "length", "width", "thickness", "top", "bottom", "upper", "lower", "left", "right", "front", "rear", "vertical", "horizontal", "inner", "outer", "axial", "circumferential", and the like, are used to indicate an orientation or positional relationship based on that shown in the drawings, merely to facilitate the description of the invention and to simplify the description, and do not indicate or imply that the position or element referred to must have a particular orientation, be of particular construction and operation, and thus, are not to be construed as limiting the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integral; may be mechanically coupled, may be electrically coupled or may be in communication with each other; either directly or indirectly through intervening media, such as through internal communication or through an interaction between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.