阅读说明：本技术 目标数据的解码方法、装置、电子设备和存储装置 (Target data decoding method and device, electronic equipment and storage device ) 是由 不公告发明人 于 2021-07-14 设计创作，主要内容包括：本申请提供了目标数据的解码方法、装置、电子设备和存储装置,属于数据解码技术领域。所述方法包括：从存储介质中读取目标数据,其中,所述存储介质中包括多个存储单元；在采用预设解码方式对所述目标数据解码失败的情况下,根据存储器中预先存储的位置信息确定目标存储单元,其中,所述位置信息包括特定存储单元的具体位置；将所述目标存储单元的初始可信度更改为目标可信度,其中,所述目标可信度的可信度值低于所述初始可信度的可信度值；采用软解码方式对更改可信度后的目标数据进行解码。本申请提高了目标数据解码成功的效率。(The application provides a target data decoding method and device, electronic equipment and a storage device, and belongs to the technical field of data decoding. The method comprises the following steps: reading target data from a storage medium, wherein the storage medium comprises a plurality of storage units; under the condition that the target data is decoded in a preset decoding mode and fails, determining a target storage unit according to position information prestored in a memory, wherein the position information comprises a specific position of a specific storage unit; changing an initial trustworthiness of the target storage unit to a target trustworthiness, wherein a trustworthiness value of the target trustworthiness is lower than a trustworthiness value of the initial trustworthiness; and decoding the target data with the changed credibility by adopting a soft decoding mode. The target data decoding success efficiency is improved.)

1. A method for decoding target data, the method comprising:

reading target data from a storage medium, wherein the storage medium comprises a plurality of storage units;

determining a target storage unit of target data according to position information pre-stored in a memory, wherein the position information comprises a specific position of a specific storage unit;

changing an initial trustworthiness of the target storage unit to a target trustworthiness, wherein a trustworthiness value of the target trustworthiness is lower than a trustworthiness value of the initial trustworthiness;

and decoding the target data with the changed credibility by adopting a soft decoding mode.

2. The method of claim 1, wherein changing the initial trustworthiness of the target storage unit to a target trustworthiness comprises:

changing the initial trustworthiness of the target storage unit to a minimum target trustworthiness of a plurality of trustworthiness.

3. The method of claim 1, wherein prior to said changing an initial trustworthiness of said target storage unit to a target trustworthiness, said method further comprises:

acquiring an association relation between a preset voltage band and credibility, wherein each voltage band corresponds to one credibility;

and determining the initial reliability corresponding to the target storage unit according to the incidence relation.

4. The method of claim 1, wherein prior to determining the target storage location based on pre-stored location information in the memory, the method further comprises:

erasing data in the storage medium to obtain target data, wherein the target data comprises the state of each storage unit;

and recording the position information of the specific storage unit in the abnormal state and storing the position information into the memory.

5. The method of claim 4, wherein before recording location information of a particular memory location in an abnormal state and storing the location information in the memory, the method further comprises:

calculating the target number of the specific storage units in the abnormal state in the target data;

determining that the target number is less than a preset number threshold.

6. The method of claim 1, wherein prior to determining the target storage location based on pre-stored location information in the memory, the method further comprises:

decoding the target data by adopting a preset decoding mode;

and determining that the preset decoding mode fails to decode the target data.

7. The method of claim 6, wherein the failure to decode the target data in the predetermined decoding manner comprises:

performing iterative decoding on the target data in a soft decoding mode, wherein the iterative decoding times reach a preset time threshold; or, the target data is failed to be decoded by adopting a hard decoding mode.

8. The method of claim 7, wherein the decoding the confidence-altered target data in a soft decoding manner comprises:

and decoding the target data with the changed credibility by adopting a soft decoding mode on the basis of the iterative decoding.

9. The method according to claim 1, wherein after the target data with the changed reliability is decoded by using a soft decoding method, the method further comprises:

outputting the decoded target data under the condition of successful decoding; alternatively, the first and second electrodes may be,

and under the condition of decoding failure, determining that the target flash memory block where the target storage unit is located is abnormal, and feeding back abnormal information, wherein the storage medium comprises a plurality of flash memory blocks.

10. An apparatus for decoding target data, the apparatus comprising:

the device comprises a reading module, a storage module and a processing module, wherein the reading module is used for reading target data from a storage medium, and the storage medium comprises a plurality of storage units;

the device comprises a determining module, a storage module and a processing module, wherein the determining module is used for determining a target storage unit according to position information prestored in a memory, and the position information comprises a specific position of a specific storage unit;

a change module for changing an initial confidence level of the target storage unit to a target confidence level, wherein a confidence level value of the target confidence level is lower than a confidence level value of the initial confidence level;

and the decoding module is used for decoding the target data with the changed credibility by adopting a soft decoding mode.

11. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus;

a memory for storing a computer program;

a processor for implementing the method steps of any of claims 1-9 when executing a program stored in the memory.

12. A storage device storing a computer program which, when executed by a processor, performs the method steps of any one of claims 1 to 9 or comprises a decoding device according to claim 10.

Technical Field

The present application relates to the field of data decoding technologies, and in particular, to a method and an apparatus for decoding target data, an electronic device, and a storage apparatus.

Background

NAND FLASH the structure of the memory cell package comprises a Control Gate (CG), a floating gate ((FG) and an Oxide layer (Oxide) from top to bottom, which is applied with a high voltage from two ends to perform the read or write action, when a high voltage is applied to the upper end, electrons are attracted to the floating gate to perform the read or write action (Program) to form Logic0, when a high voltage is applied to the lower end, electrons leave the floating gate to perform the Erase action (Erase), to form Logic 1. the NAND FLASH must be erased after Erase, then Erase is followed by Logic1, and then Logic0, and when writing or reading or Erase, the electrons will continuously move to make the lower Oxide layer become thin slowly and even be punched, the Oxide layer will be punched to cause a lack of isolation effect, possibly cell will break, and then the original Logic1 will become Logic 0.

In the prior art, the one-dimensional ECC decoding bits successfully processed by RAID may be decoded by horizontal and vertical ECC, but the ECC decoding adopts both horizontal and vertical modes, and may occupy NAND FLASH a large memory space.

Disclosure of Invention

An object of the embodiments of the present application is to provide a method and an apparatus for decoding target data, an electronic device, and a storage apparatus, so as to solve the problems that the current decoding efficiency is low, and the ECC decoding occupies NAND FLASH a large memory space. The specific technical scheme is as follows:

a method of decoding target data, the method comprising:

reading target data from a storage medium, wherein the storage medium comprises a plurality of storage units;

determining a target storage unit of target data according to position information pre-stored in a memory, wherein the position information comprises a specific position of a specific storage unit;

changing an initial trustworthiness of the target storage unit to a target trustworthiness, wherein a trustworthiness value of the target trustworthiness is lower than a trustworthiness value of the initial trustworthiness;

and decoding the target data with the changed credibility by adopting a soft decoding mode.

Optionally, the changing the initial credibility of the target storage unit to the target credibility comprises:

changing the initial trustworthiness of the target storage unit to a minimum target trustworthiness of a plurality of trustworthiness.

Optionally, before the changing the initial credibility of the target storage unit to the target credibility, the method further comprises:

acquiring an association relation between a preset voltage band and credibility, wherein each voltage band corresponds to one credibility;

and determining the initial reliability corresponding to the target storage unit according to the incidence relation.

Optionally, before determining the target storage unit according to the location information pre-stored in the memory, the method further includes:

erasing data in the storage medium to obtain target data, wherein the target data comprises the state of each storage unit;

and recording the position information of the specific storage unit in the abnormal state and storing the position information into the memory.

Optionally, before the recording the location information of the specific storage unit in the abnormal state and storing the location information in the memory, the method further includes:

calculating the target number of the specific storage units in the abnormal state in the target data;

determining that the target number is less than a preset number threshold.

Optionally, before determining the target storage unit according to the location information pre-stored in the memory, the method further includes:

decoding the target data by adopting a preset decoding mode;

and determining that the preset decoding mode fails to decode the target data.

Optionally, the failure to decode the target data in the preset decoding manner includes:

performing iterative decoding on the target data in a soft decoding mode, wherein the iterative decoding times reach a preset time threshold; or, the target data is failed to be decoded by adopting a hard decoding mode.

Optionally, the decoding, by using a soft decoding method, the target data with the changed reliability includes:

and decoding the target data with the changed credibility by adopting a soft decoding mode on the basis of the iterative decoding.

Optionally, after the target data with the reliability being changed is decoded in a soft decoding manner, the method further includes:

outputting the decoded target data under the condition of successful decoding; alternatively, the first and second electrodes may be,

and under the condition of decoding failure, determining that the target flash memory block where the target storage unit is located is abnormal, and feeding back abnormal information, wherein the storage medium comprises a plurality of flash memory blocks.

An apparatus for decoding target data, the apparatus comprising:

the device comprises a reading module, a storage module and a processing module, wherein the reading module is used for reading target data from a storage medium, and the storage medium comprises a plurality of storage units;

the device comprises a determining module, a storage module and a processing module, wherein the determining module is used for determining a target storage unit according to position information prestored in a memory, and the position information comprises a specific position of a specific storage unit;

a change module for changing an initial confidence level of the target storage unit to a target confidence level, wherein a confidence level value of the target confidence level is lower than a confidence level value of the initial confidence level;

and the decoding module is used for decoding the target data with the changed credibility by adopting a soft decoding mode.

The embodiment of the application has the following beneficial effects:

the embodiment of the application provides a target data decoding method, wherein a controller reads target data from a storage medium, a target storage unit is determined according to position information prestored in a memory, the position information comprises a specific position of a specific storage unit, then the initial reliability of the target storage unit is changed into target reliability, and finally the target data with the changed reliability is decoded in a soft decoding mode. In the application, after the controller changes the initial reliability corresponding to the abnormal state of the target storage unit into the target reliability with lower reliability, the least sum decoder can have higher probability to successfully decode the target storage unit, so that the probability of successful decoding of target data is improved, and the efficiency of successful decoding is also improved. In addition, transverse and longitudinal ECC decoding is not adopted simultaneously, only transverse ECC decoding is adopted, the space occupied by the ECC on the controller can be reduced, and the available memory of the controller is improved.

Of course, not all of the above advantages need be achieved in the practice of any one product or method of the present application.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.

Fig. 1 is a flowchart of a method for decoding target data according to an embodiment of the present application;

fig. 2 is a schematic flowchart of a target data decoding method according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of an apparatus for decoding target data according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the following description, suffixes such as "module", "component", or "unit" used to denote elements are used only for the convenience of description of the present application, and have no specific meaning in themselves. Thus, "module" and "component" may be used in a mixture.

To solve the problems mentioned in the background, according to an aspect of embodiments of the present application, an embodiment of a method for decoding target data is provided.

The embodiment of the application provides a target data decoding method, which can be applied to a controller and used for decoding data in a storage medium.

The following will describe a method for decoding target data provided in an embodiment of the present application in detail with reference to specific embodiments, as shown in fig. 1, the specific steps are as follows:

step 101: target data is read from a storage medium.

Wherein the storage medium comprises a plurality of storage units.

In the embodiment of the present application, the target data may be read from the storage medium by the controller. The storage medium includes a plurality of storage units therein, and the storage medium stores target data by the storage units. Normally, after data in the storage medium is erased, the state of the storage unit should be a normal state Logic 1. If the storage medium is used for a long time to cause electron loss of some memory cells, the reliability of the normal state of the memory cell with the electron loss is reduced, and even the state is changed to be the abnormal state Logic0, and in addition, the number of times of reading and writing of the storage medium is too large, so that the oxide layer of some memory cells is broken through, and the memory cell is also converted from the normal state Logic1 to the abnormal state Logic 0. In the embodiment of the present application, the abnormal state is logic0, and the normal state is logic 1.

The above-mentioned error belongs to an error of non-AWGN (Additive White Gaussian Noise), and an LDPC (Low Density Parity Check Code) decoder in the prior art is designed based on an AWGN error, and has insufficient error correction capability for non-AWGN.

The storage medium of the application can adopt a Nand-flash memory, the Nand-flash memory is one of flash memories, a nonlinear macro-unit mode is adopted in the Nand-flash memory, and a cheap and effective solution is provided for realizing a solid-state large-capacity memory.

Step 102: and determining a target storage unit of the target data according to the position information pre-stored in the memory.

Wherein the location information includes a specific location of the particular storage unit.

In the embodiment of the present application, the location information includes specific locations of specific storage units, for example: the specific location of the memory location exhibiting the abnormality, or the specific location of the memory location is specified, and then the controller determines a target memory location in the storage medium at the location information based on the location information.

Normally, the controller needs to write the target data into the storage medium before reading the target data from the storage medium, and the controller needs to erase the data from the storage medium of the block every time before writing the target data into the storage medium, and normally, the state of the storage unit after the data is erased should be the normal state Logic1, but the state of some storage units will be converted from the normal state Logic1 to the abnormal state Logic0, and the controller saves the positions of the storage units in the abnormal state Logic0 in the memory. Therefore, the specific memory cell can be a memory cell in an abnormal state after data erasure, and then the target memory cell at the position is also a memory cell in an abnormal state. The target data read from the storage medium must have a part of data stored in a specific storage unit, and the target storage unit of the part of data can be further determined by the stored position information.

Step 103: the initial trustworthiness of the target storage unit is changed to a target trustworthiness, wherein a trustworthiness value of the target trustworthiness is lower than a trustworthiness value of the initial trustworthiness.

In this embodiment of the application, the states of the storage units correspond to a plurality of degrees of reliability, and therefore the states of the target storage units correspond to an initial degree of reliability, and in step 102, the controller may select any one of the plurality of degrees of reliability that is lower than the initial degree of reliability as the target degree of reliability of the target storage units, that is, the degree of reliability of the target degree of reliability is lower than the degree of reliability of the initial degree of reliability, where the degree of reliability is in direct proportion to the degree of reliability, and the higher the degree of reliability is, and the lower the degree of reliability of the target storage units is after the target storage units are changed from the initial degree of reliability to the target degree of reliability.

Step 104: and decoding the target data with the changed credibility by adopting a soft decoding mode.

The reliability corresponding to the abnormal state of the target storage unit in the target data is changed from the initial reliability to the target reliability with lower reliability, the controller sends the target data with the changed reliability to an LDPC (Low Density Parity Check Code) decoder, and the target data with the changed reliability is decoded by adopting a soft decoding mode on the basis of iteration, wherein the LDPC decoder can be a minimum sum decoder specifically, and the soft decoding mode can be a minimum sum decoding algorithm. The LDPC decoder uses an ECC (Error Checking and Correcting) mechanism for Error correction.

The implementation process of the minimum sum decoding algorithm is as follows: the initialization probability of the variable nodes is determined firstly, and the initialization information of the check nodes is zero in the initialization stage. Then, the check nodes are updated through the change of the variable nodes, the probability of the variable nodes is updated based on the updated check nodes, and then each information bit is judged according to the probability of the updated variable nodes so as to determine whether the bit is 0 or 1. The minimum sum decoding algorithm only needs to select the minimum information value in the absolute values, does not need to estimate the noise variance of the channel, and directly uses the channel receiving value as decoding initialization information, thereby simplifying the updating algorithm of the variable node.

In the application, the abnormal state of the target storage unit corresponds to the initial reliability, the reliability of the initial reliability may be high, the LDPC decoder is difficult to successfully decode the target storage unit, and after the controller changes the initial reliability corresponding to the abnormal state of the target storage unit into the target reliability with low reliability, the LDPC decoder can successfully decode the target storage unit with high probability, so that the successful probability of decoding target data is improved, and the successful efficiency of decoding is improved. In addition, when the decoding success rate is improved, only transverse ECC decoding can be adopted, the space occupied by the ECC on the controller can be reduced, the available memory of the controller is improved, and the waste of redundant memory of the controller and the increase of a complex RS codec are avoided.

As an optional implementation manner, the process of decoding the target data by using the preset decoding manner is as follows: decoding the target data by adopting a hard decoding mode, and outputting the target data after the hard decoding if the decoding is successful; if the decoding fails, soft decoding is performed by reducing the reliability of the target memory cell. Or, if the decoding fails, performing iterative decoding on the target data by adopting a soft decoding mode, and if the iterative decoding times reach a preset time threshold value, then successfully decoding, outputting the target data after the soft decoding; if the decoding fails after the iterative decoding times reach the preset times threshold, the target storage unit with the initial reliability corresponding to the abnormal state exists, and at the moment, the decoding is difficult to succeed by adopting a soft decoding mode, and the target storage unit needs to be determined. Therefore, the failure to decode the target data by using the preset decoding method in the present application includes: and adopting a hard decoding mode to fail decoding or adopting a soft decoding mode to fail iterative decoding.

As an alternative embodiment, changing the initial reliability of the target storage unit to the target reliability, wherein the reliability value of the target reliability lower than the reliability value of the initial reliability comprises: the method comprises the following steps: the initial reliability of the target memory cell is changed to the minimum target reliability among the plurality of reliabilities, for example, 0 with reliability of +7, 0 with reliability of +1, or the like.

In the application, the controller can change the initial reliability corresponding to the state of the target storage unit into the target reliability with the minimum reliability value, so that the reliability value of the target reliability can be reduced to the minimum, and the probability of successful decoding of the target data by the minimum sum decoder is further improved.

As an optional implementation manner, before the target data is read from the storage medium, the method further includes: under the condition that the read-write times of the storage medium reach a preset time threshold, erasing data in the storage medium to obtain target data, wherein the target data comprise the state of each storage unit; determining a target number of specific memory cells in an abnormal state in the target material; and recording the position information of the specific storage unit and storing the position information into the memory under the condition that the target number is smaller than the preset number threshold.

In the embodiment of the application, a preset number threshold of the read-write times of the storage medium is set in the controller, the controller detects the PE times of the storage medium in real time, that is, the read-write times, when the controller detects that the read-write times reach the preset number threshold, it indicates that the read-write times are more, the probability of abnormality of the oxide layer of the storage unit is higher, and the situation that after erasing data, logic1 becomes logic0 is likely to occur, then the controller erases the data in the storage medium by using block as a unit to obtain target data, the target data includes the state of each storage unit, and the state is an abnormal state or a normal state.

The controller determines the target number of the specific storage units in the abnormal state in the target data, then judges whether the target number is smaller than a preset number threshold, if the controller judges that the target number is not smaller than the preset number threshold, the fact that the number of the abnormal specific storage units is too large is indicated, the quality of a target flash memory block where the specific storage units are located is poor, decoding of target data is not needed, and abnormal information is output. If the controller judges that the target number is smaller than the preset number threshold value, which indicates that the quality of the block where the specific storage unit is located is good, the controller records the position information of the specific storage unit and then stores the position information into the memory. For example, the Memory may be an SRAM (Static Random-Access Memory) or a DRAM (Dynamic Random-Access Memory), and the application does not specifically limit the type of the Memory.

After the controller erases the data of the storage medium, the controller needs to encode target data to be written, and then writes the encoded target data into the storage medium by taking page as a unit.

As an optional implementation, before changing the initial reliability of the target storage unit to the target reliability, the method further includes: acquiring an association relation between preset voltage bands and credibility, wherein each voltage band corresponds to one credibility, a controller determines an initial voltage band where the target storage unit is located through preset voltage, and then determines the initial credibility corresponding to the initial voltage band according to the association relation.

The controller can obtain the corresponding relation between the voltage band and the reliability by reading the voltage for multiple times, and then stores the corresponding relation. Illustratively, the storage unit used by the storage medium is TLC (triple-Level Cell), the triple-Level storage unit uses eight voltage bands, which are 000, 001, 010, 011, 100, 101, 110, and 111 respectively, each voltage band corresponds to a confidence Level, and the correspondence between the voltage bands and the confidence levels is shown in the following table.

Voltage band	000	001	010	011	100	101	110	111
									Degree of confidence	+7	+5	+3	+1	-1	-3	-5	-7

The confidence levels corresponding to the abnormal state logic0 are +7, +5, +3 and +1 from high to low, and the confidence levels corresponding to the normal state logic1 are-1, -3, -5 and-7 from low to high.

Before the storage medium erases data, the reliability of the state of the memory cells in the storage medium is-7, but since electrons are lost, -7 may become-5 or-3 or-1 or +3 or +5 or +7, i.e., the reliability of the normal state may be reduced or even converted into an abnormal state.

The confidence level of the abnormal state of the memory cell may be one of +1 or +3 or +5 or + 7. Illustratively, the controller selects a target memory cell with a confidence level of +7 in the abnormal state and then reduces the confidence level +7 to a confidence level +1, and the controller may also select a target memory cell with a confidence level of +5 and then reduces the confidence level +7 to a confidence level + 1. By reducing the reliability of the target storage unit, the LDPC decoder can have higher probability of successfully decoding the target storage unit, thereby improving the probability of successfully decoding target data and further improving the efficiency of successfully decoding.

As an optional implementation manner, decoding, by using a soft decoding manner, target data with changed reliability includes: determining sample storage units in the storage units except the target storage unit; and decoding the sample storage unit and the target storage unit with the changed credibility by adopting a soft decoding mode.

In the embodiment of the application, the controller determines that the storage units except the target storage unit in the storage units are sample storage units, the sample storage units may be in an abnormal state, the abnormal state corresponds to the minimum confidence level, and the sample storage units may also be in a normal state. The controller does not change the reliability and the normal state of the abnormal state of the sample storage unit, and decodes the sample storage unit and the target storage unit with the changed reliability by adopting a soft decoding mode.

As an optional implementation manner, after the target data with the changed reliability is decoded in a soft decoding manner, the method further includes: outputting the decoded target data under the condition of successful decoding; or, under the condition of decoding failure, determining that the target flash memory block where the target storage unit is located is abnormal, and feeding back abnormal information, wherein the storage medium comprises a plurality of flash memory blocks.

In the embodiment of the application, after the controller adopts a soft decoding mode for decoding, if the decoding is successful, the decoded target data is output; and if the decoding fails, determining that a target flash memory block where the target storage unit is located is abnormal, and feeding back abnormal information to a preset terminal, wherein the storage medium comprises a plurality of blocks, one block corresponds to a plurality of pages, and each page is provided with a plurality of storage unit cells.

Optionally, an embodiment of the present application further provides a processing flow chart of a target data decoding method, as shown in fig. 2, and the specific steps are as follows.

Step 201: and if the read-write times of the storage medium reach a preset time threshold, erasing the data in the storage medium.

Step 202: a target number of particular memory cells in an abnormal state after erasing data is determined.

Step 203: and judging whether the target quantity is smaller than a preset quantity threshold value, if so, executing the step 204, and if not, executing the step 214.

Step 204: the location information of the specific memory cell is written into the SRAM.

Step 205: and writing the encoded target data into the storage medium.

Step 206: target data is read from a storage medium.

Step 207: and judging whether the decoding is successful by adopting a hard decoding mode, if so, executing the step 213, and if not, executing the step 208.

Step 208: and performing iterative decoding by adopting a soft decoding mode.

Step 209: it is determined whether the iterative decoding is successful, if so, step 213 is performed, and if not, step 210 is performed.

Step 210: and changing the initial credibility corresponding to the abnormal state of the target storage unit into the minimum target credibility.

Step 211: and decoding the target data with the changed credibility on the basis of iteration by adopting a soft decoding mode.

Step 212: it is determined whether the decoding is successful, if so, step 213 is performed, and if not, step 214 is performed.

Step 213: and outputting the decoded target data.

Step 214: and determining that the block where the target storage unit is located has a fault.

Based on the same technical concept, an embodiment of the present application further provides an apparatus for decoding target data, as shown in fig. 3, the apparatus includes:

a reading module 301, configured to read target data from a storage medium, where the storage medium includes a plurality of storage units;

a determining module 302, configured to determine a target storage unit according to location information pre-stored in a memory, where the location information includes a specific location of a specific storage unit;

a changing module 303, configured to change the initial reliability of the target storage unit to a target reliability, where a reliability value of the target reliability is lower than a reliability value of the initial reliability;

and the decoding module 304 is configured to decode the target data with the changed reliability in a soft decoding manner.

Optionally, the altering module 303 is configured to:

the initial trustworthiness of the target storage unit is changed to a target trustworthiness that is the smallest of the plurality of trustworthiness.

Optionally, the changing module 303 is further configured to:

acquiring an association relation between preset voltage bands and credibility, wherein each voltage band corresponds to one credibility;

and determining the initial reliability corresponding to the target storage unit according to the incidence relation.

Optionally, the apparatus is further configured to:

erasing data in the storage medium to obtain target data, wherein the target data comprises the state of each storage unit;

and recording the position information of the specific storage unit in the abnormal state and storing the position information into the memory.

Optionally, the apparatus is further configured to:

calculating the target number of the specific storage units in the abnormal state in the target data;

determining that the target number is less than a preset number threshold.

Optionally, the apparatus is further configured to:

decoding the target data by adopting a preset decoding mode;

and determining that the preset decoding mode fails to decode the target data.

Optionally, the apparatus is further configured to:

performing iterative decoding on the target data in a soft decoding mode, wherein the iterative decoding times reach a preset time threshold; or, the target data is failed to be decoded by adopting a hard decoding mode.

And decoding the target data with the changed credibility by adopting a soft decoding mode on the basis of the iterative decoding.

Optionally, the apparatus is further configured to:

outputting the decoded target data under the condition of successful decoding; alternatively, the first and second electrodes may be,

and under the condition of decoding failure, determining that the target flash memory block where the target storage unit is located is abnormal, and feeding back abnormal information, wherein the storage medium comprises a plurality of flash memory blocks.

According to another aspect of the embodiments of the present application, there is provided an electronic device, as shown in fig. 4, including a memory 403, a processor 401, a communication interface 402, and a communication bus 404, where the memory 403 stores a computer program that is executable on the processor 401, the memory 403 and the processor 401 communicate through the communication interface 402 and the communication bus 404, and the processor 401 implements the steps of the method when executing the computer program.

The memory and the processor in the electronic equipment are communicated with the communication interface through a communication bus. The communication bus may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc.

The Memory may include a Random Access Memory (RAM) or a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.

The Processor may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component.

According to another aspect of the embodiment of the application, a storage device is also provided.

Optionally, in an embodiment of the present application, the storage device stores program codes for the processor to execute the above method.

Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and this embodiment is not described herein again.

When the embodiments of the present application are specifically implemented, reference may be made to the above embodiments, and corresponding technical effects are achieved.

It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or any combination thereof. For a hardware implementation, the Processing units may be implemented within one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units configured to perform the functions described herein, or a combination thereof.

For a software implementation, the techniques described herein may be implemented by means of units performing the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules is merely a logical division, and in actual implementation, there may be other divisions, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially implemented or make a contribution to the prior art, or may be implemented in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a controller, or a network device) to execute all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a U disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk. It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.