Light emitting device and method of manufacturing the same

文档序号:345165 发布日期:2021-12-03 浏览:34次 中文

阅读说明:本技术 发光器件及其制备方法 (Light emitting device and method of manufacturing the same ) 是由 高崙赫 李昌熙 郑然九 金德起 朴宗源 河在国 于 2021-05-26 设计创作,主要内容包括:提供了一种发光器件以及制备发光器件的方法。该发光器件可以包括:半导体区域,包括第一半导体层、第二半导体层以及在第一半导体层与第二半导体层之间的活性层;第一保护层,在半导体区域的表面的至少一部分上且包括III-V族化合物;以及第二保护层,在第一保护层上且包括金属氧化物。(A light emitting device and a method of manufacturing the light emitting device are provided. The light emitting device may include: a semiconductor region including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; a first protective layer on at least a portion of a surface of the semiconductor region and comprising a III-V compound; and a second protective layer on the first protective layer and including a metal oxide.)

1. A light emitting device, comprising:

a semiconductor region including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer;

a first protective layer located on at least a portion of a surface of the semiconductor region and comprising a III-V compound; and

a second protective layer on the first protective layer and comprising a metal oxide.

2. The light emitting device of claim 1, wherein the semiconductor region comprises a material having a chemical formula InxAlyGa1-x- yN, wherein x is 0. ltoreq. x.ltoreq.1, y is 0. ltoreq. y.ltoreq.1, and x + y is 0. ltoreq.1.

3. The light emitting device of claim 1, wherein the active layer comprises a single quantum well structure or a multiple quantum well structure.

4. The light emitting device of claim 1, wherein the group III element in the III-V compound included in the first protective layer comprises boron, aluminum, gallium, indium, or any combination thereof, and

the group V element in the group III-V compound included in the first protective layer includes nitrogen, phosphorus, arsenic, antimony, or any combination thereof.

5. The light emitting device according to claim 1, wherein the second protective layer is an insulating layer.

6. The light emitting device of claim 1, wherein the metal oxide comprises Al2O3、ZrO2、SiO2、TiO2ZnO, or any combination thereof.

7. The light emitting device of claim 1, wherein the first protective layer reduces lattice defects between the semiconductor region and the second protective layer.

8. The light emitting device of claim 1, wherein the first protective layer and the second protective layer are each formed by a wet chemical reaction.

9. A method of making a light emitting device, the method comprising the steps of:

forming a first protective layer comprising a III-V compound on at least a portion of a surface of the semiconductor region; and

forming a second protective layer comprising a metal oxide on the first protective layer,

the semiconductor region includes a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer.

10. The method of claim 9, wherein the step of forming the first protective layer is performed by a wet chemical reaction.

Technical Field

One or more embodiments of the present disclosure relate to a light emitting device, a method of manufacturing the light emitting device, an ink composition including the light emitting device, and an apparatus including the light emitting device.

Background

Light Emitting Devices (LEDs) have high light conversion efficiency, consume relatively very little energy, and are semi-permanent and eco-friendly. In order to use the LED as a lighting or display device, the LED may be incorporated between a pair of electrodes capable of applying power to the LED. A method of bonding an LED to electrodes may be classified into a method of directly growing an LED on a pair of electrodes and a method of arranging an LED after individually growing the LED. In the latter method, a solution process may be used as a method of inputting or disposing the LED on the electrode. For example, the LEDs may be input or disposed on the electrodes by using a slit coating method and/or an inkjet printing method.

When III-V semiconductor nanoparticles are used as LED materials, lattice defects may be generated at the interface between the semiconductor compound and the insulating film when the insulating film is formed on the surface of the semiconductor nanoparticles, thereby deteriorating the efficiency of the LED. In addition, since the insulating film is coated by using an Atomic Layer Deposition (ALD) process, a process of providing a precursor material of the insulating film and removing a residue may be repeatedly performed, and thus, a growth rate of a thin film may be slow and a manufacturing cost may increase.

Disclosure of Invention

One or more embodiments of the present disclosure include a light emitting device having reduced lattice defects and improved efficiency, a method of manufacturing the light emitting device, an ink composition including the light emitting device, and an apparatus including the light emitting device.

Additional aspects of the embodiments will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the disclosed embodiments.

According to one or more embodiments, a light emitting device may include:

a semiconductor region including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer;

a first protective layer located on at least a portion of a surface of the semiconductor region and comprising a III-V compound; and

and the second protective layer is positioned on the first protective layer and comprises metal oxide.

According to one or more embodiments, a method of manufacturing a light emitting device may include the steps of: wherein, the light emitting device may include: a semiconductor region including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; a first protective layer on at least a portion of a surface of the semiconductor region; and a second protective layer on the first protective layer,

forming a first protective layer comprising a III-V compound on at least a portion of a surface of the semiconductor region; and

a second protective layer including a metal oxide is formed on the first protective layer.

According to one or more embodiments, the ink composition may include a light emitting device.

According to one or more embodiments, the device may comprise a light emitting device.

Drawings

The above and other aspects and features of certain embodiments of the disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which fig. 1 is a schematic cross-sectional view of a light emitting device according to an embodiment.

Detailed Description

Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. In this regard, the present embodiments may have different forms and should not be construed as limited to the description set forth herein. Therefore, only the embodiments are described below to explain aspects of the embodiments of the present specification by referring to the figures. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression "at least one of a, b and c" means only a, only b, only c, both a and b, both a and c, both b and c, all or a variation thereof.

Since the subject matter of the present disclosure is susceptible to various modifications and embodiments, specific embodiments have been shown in the drawings and are described in greater detail in the written description. Effects, features and methods of implementing the embodiments of the present disclosure will be apparent to those of ordinary skill in the art by referring to the exemplary embodiments of the present disclosure with reference to the drawings. The subject matter of the present disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

In the embodiments described in the present specification, expressions used in the singular number encompass expressions of plural number unless they have a clearly different meaning in context.

In this specification, it will be understood that terms such as "comprising," "having," and "including" are intended to specify the presence of the features or components disclosed in the specification, and are not intended to preclude the possibility that one or more other features or components may be present or may be added. For example, unless otherwise limited, terms such as "comprising" or "having" may mean consisting of only the features or components described in the specification or further including other components.

Light emitting device

Hereinafter, a light emitting device and a method of manufacturing the light emitting device according to embodiments will be described with reference to the accompanying drawings. Fig. 1 is a schematic cross-sectional view of a light emitting device according to an embodiment.

The light emitting device 10 may include a semiconductor region 150, and the semiconductor region 150 may include a first semiconductor layer 110, a second semiconductor layer 130, and an active layer 120 between the first semiconductor layer 110 and the second semiconductor layer 130.

In addition, the light emitting device 10 may include: a first protective layer 180 on at least a portion of the semiconductor region 150 and comprising a III-V compound; and a second protective layer 190 on the first protective layer 180 and including a metal oxide.

The first semiconductor layer 110, the active layer 120, and the second semiconductor layer 130 may be sequentially stacked in a longitudinal direction of the light emitting device 10.

In some embodiments, the first semiconductor layer 110 may include an n-type semiconductor layer, and the second semiconductor layer 130 may include a p-type semiconductor layer. The semiconductor layer may include In having a chemical formula (or empirical formula)xAlyGa1-x-yN (wherein 0. ltoreq. x.ltoreq.1, 0. ltoreq. y.ltoreq.1, and 0. ltoreq. x + y. ltoreq.1), examples of the semiconductor compound may include GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN, for example.

In some embodiments, the first semiconductor layer 110 may be doped with n-type dopants such as Si, Ge, and/or Sn.

In some embodiments, the first semiconductor layer 110 may include GaN doped with an n-type dopant.

In some embodiments, the second semiconductor layer 130 may include p-type dopants such as Mg, Zn, Ca, Sr, and/or Ba.

In some embodiments, the second semiconductor layer 130 may include GaN doped with a p-type dopant.

In some embodiments, the first semiconductor layer 110 may include a p-type semiconductor, and the second semiconductor layer 130 may include an n-type semiconductor layer.

The active layer 120 may be between the first semiconductor layer 110 and the second semiconductor layer 130.

In some embodiments, the active layer 120 may include a single quantum well structure or a multiple quantum well structure.

In some embodiments, when the active layer 120 includes a material having a multi-quantum well structure, the active layer 120 may have a structure in which quantum layers and well layers are alternately stacked. In some embodiments, the active layer 120 may have a structure in which a semiconductor material having a high band gap energy and a semiconductor material having a low band gap energy are alternately stacked. In some embodiments, the active layer 120 may include different semiconductor materials depending on the wavelength of the emitted light.

The active layer 120 may be a region in which electrons and holes are recombined according to an electrical signal applied through the first and second semiconductor layers 110 and 130. When electrons and holes recombine, a transition from a higher energy level to a lower energy level may occur, thereby emitting light having a wavelength corresponding to the energy difference between the higher energy level and the lower energy level. The active layer 120 may be used without limitation as long as the active layer 120 is an active layer that may be included in an LED device for illumination, display, and the like in the art.

The light emitting device 10 may include: a first protective layer 180 on at least a portion of the semiconductor region 150 and comprising a group III-V compound (e.g., a compound comprising a group III element and a group V element); and a second protective layer 190 on the first protective layer 180 and including a metal oxide.

In some embodiments, the first protective layer 180 may surround (e.g., partially or completely surround) the semiconductor region 150, and the second protective layer 190 may surround (e.g., partially or completely surround) the first protective layer 180.

In some embodiments, the first protective layer 180 and/or the second protective layer 190 may surround the entire outer surface of the semiconductor region 150 or a portion of the outer surface of the semiconductor region 150.

The first protective layer 180 may include a group III-V compound (e.g., a compound including a group III element and a group V element).

In some embodiments, the group III element included In the III-V compound may be boron (B), aluminum (Al), gallium (Ga), indium (In), or any combination thereof.

In some embodiments, the group V element included in the III-V compound may be nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), or any combination thereof.

In some embodiments, the III-V compound may be selected from the group consisting of binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof, ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaP sb, AlNP, AlNAs, AlPAs, AlPSb, InGaP, InAlP, InNP, InNAs, InNSb, InNAs, ingaps, InP, and mixtures thereof, and quaternary compounds selected from the group consisting of GaAlNP, GaAlNAs, GaNSb, GaAlPAs, GaAlPSb, gainp, GaInNAs, gainsb, GaInPAs, gainpab, GaInPSb, gainpab, GaInPSb, GaInPAs, inalnnp, InAlNAs, and mixtures thereof.

The first protective layer 180 may be between the semiconductor region 150 and the second protective layer 190, thereby reducing lattice defects (e.g., reducing the likelihood or extent of lattice defects). Accordingly, the light emitting device 10 may have improved luminous efficiency.

In some embodiments, the lattice mismatch (or degree of lattice mismatch) between the semiconductor region 150 and the first protective layer 180 may be 3 percent (%) or less, or, for example, 1% or less.

In some embodiments, the lattice mismatch between the first protective layer 180 and the second protective layer 190 may be 5% or less, or, for example, 3% or less.

The second protective layer 190 may include a metal oxide.

In some embodiments, the metal oxide may include Al2O3、ZrO2、SiO2、TiO2ZnO, or any combination thereof.

In some embodiments, the second protective layer 190 may be an insulating layer.

In some embodiments, the thickness of the second protective layer 190 may be in a range of about 50 nanometers (nm) to about 1,000 nm.

In some embodiments, the thickness of the second protective layer 190 may be in a range from about 10nm to about 700nm, such as from about 20nm to about 500nm or such as from about 50nm to about 100 nm.

The second protective layer 190 may prevent or reduce a decrease in light emitting efficiency by protecting the outer surface of the light emitting device 10 including the outer surface of the semiconductor region 150.

In addition, when the nanorod pattern etching process is performed on the first and second protective layers 180 and 190, lattice defects at the surface of the light emitting device 10 may be reduced (e.g., the possibility or degree of lattice defects may be reduced).

In some embodiments, the light emitting device 10 may be various suitable shapes, such as a cylindrical shape, a rectangular parallelepiped shape, a wire, or a tube, for example, although the disclosure is not limited thereto. In some embodiments, the light emitting device 10 may be cylindrical in shape.

The light emitting device 10 may be a nano light emitting device (nano LED) which is a light emitting device having a nano-scale size, or a micro light emitting device (micro LED) which is a light emitting device having a micro-scale size.

For example, the diameter of the light emitting device 10 may be in a range of about 0.1 micrometers (μm) to about 1 μm, and the length of the light emitting device 10 may be in a range of about 1 μm to about 10 μm.

The light emitting device 10 may emit red, green, and/or blue light.

In some embodiments, the first protective layer 180 may be formed by a wet chemical reaction. Additionally, in some embodiments, the second protective layer 190 may be formed by a wet chemical reaction. The method of forming the first protective layer 180 and the second protective layer 190 may be understood by referring to the description of the method of forming the light emitting device 10 provided herein.

When the first protective layer 180 and/or the second protective layer 190 are formed using a wet chemical reaction, lattice defects on the semiconductor region 150 may be reduced (e.g., the possibility or degree of lattice defects may be reduced) while the protective layer is formed, thereby improving the efficiency of the light emitting device 10. In addition, it is possible to facilitate control of the growth rate of the thin film, thereby controlling the thickness of the protective layer and improving the process characteristics.

In some embodiments, the wet chemical reaction may be a sol-gel reaction.

In some embodiments, the light emitting device 10 may further include a phosphor layer, an active layer, a semiconductor layer, and/or an electrode layer on the first semiconductor layer 110 and under the second semiconductor layer 130.

Light generated from the active layer 120 may be emitted through the outer surface and/or the side surface of the light emitting device 10. For example, the directivity of light emitted from the active layer 120 is not limited to one direction.

According to one or more embodiments, the light emitting device 10 may further include a first electrode layer under the first semiconductor layer 110 and/or a second electrode layer on the second semiconductor layer 130.

The first electrode layer and the second electrode layer may each be an ohmic contact electrode. However, the first electrode layer and the second electrode layer are not limited thereto, and the first electrode layer and the second electrode layer may each be a schottky contact electrode (e.g., an electrode formed by a junction of a semiconductor and a metal). The first electrode layer and the second electrode layer may comprise, for example, at least one metal such as aluminum, titanium, indium, gold, and/or silver. The materials included in the first electrode layer and the second electrode layer may be the same as or different from each other.

Method for manufacturing light emitting device

According to one or more embodiments, when the light emitting device 10 includes: a semiconductor region 150 including the first semiconductor layer 110, the second semiconductor layer 130, and the active layer 120 between the first semiconductor layer 110 and the second semiconductor layer 130; a first protective layer 180 on at least a portion of a surface of the semiconductor region 150; and a second protective layer 190, while on the first protective layer 180, the method of manufacturing the light emitting device 10 may include the steps of,

forming a first protective layer 180 including a group III-V compound on at least a portion of a surface of the semiconductor region 150; and

a second protective layer 190 including a metal oxide is formed on the first protective layer 180.

The formation of the first protective layer 180 may be performed by a wet chemical reaction.

For example, the formation of the first protective layer 180 may be performed by a sol-gel reaction.

In some embodiments, forming the first protective layer 180 may include reacting a precursor including a group III element with a precursor including a group V element in a solution including a surfactant.

In some embodiments, forming the first protective layer 180 may include the steps of:

process (a): a structure in which the first semiconductor layer 110, the active layer 120 and the second semiconductor layer 130 are stacked is impregnated with a solution including a surfactant,

a process (b): adding a precursor comprising a group III element to the solution,

process (c): adding a precursor comprising a group V element to the solution and heating the solution to a temperature in the range of about 100 ℃ to about 400 ℃ to cause a reaction to occur, and

process (d): the solution was cooled to room temperature.

However, the processes (a), (b), (c), and (d) are only examples of forming the first protective layer 180, and the method of forming the first protective layer 180 is not limited thereto.

In some embodiments, the group III element-including precursor may be a halide of a group III element, an acetate of a group III element, an acetylacetonate of a group III element, or any combination thereof.

In some embodiments, the precursor comprising the group V element may comprise bis (trimethylsilyl) amine, Hexamethyldisilazane (HDMS), tris (trimethylsilyl) amine, N-bis (trimethylsilyl) methylamine, or any combination thereof.

In some embodiments, the surfactant may include oleylamine, oleic acid, hexadecylamine, dodecylamine, or any combination thereof.

In some embodiments, the formation of the first protective layer 180 may be performed at a temperature in a range of about 100 ℃ to about 400 ℃, or, for example, about 200 ℃ to about 300 ℃.

When the first protective layer 180 including the III-V group compound is formed using a wet chemical reaction, lattice defects on the semiconductor region 150 may be reduced (e.g., the possibility or degree of lattice defects may be reduced) while the protective layer is formed, thereby improving the efficiency of the light emitting device 10. In addition, it is possible to facilitate control of the growth rate of the thin film of the protective layer, thereby controlling the thickness of the protective layer and improving process characteristics.

The formation of the second protective layer 190 may be performed by a wet chemical reaction.

For example, the formation of the second protective layer 190 may be performed by a sol-gel reaction.

In some embodiments, the formation of the second protective layer 190 and the formation of the first protective layer 180 may be performed as a one-step process.

In some embodiments, after or subsequent to process (d), forming the second protective layer 190 may include the steps of,

process (e): in the solution, a metal oxide precursor is added to the surface of the structure on which the first protective layer 180 is formed, and

a process (f): the temperature of the solution is maintained in a range of room temperature to a temperature of 200 deg.c so that the reaction occurs and the second protective layer 190 including the metal oxide is formed.

However, the processes (e) and (f) are only examples of forming the second protective layer 190, and the method of forming the second protective layer 190 is not limited thereto.

In some embodiments, the formation of the second protective layer 190 may be performed at a temperature in a range of room temperature to about 300 ℃ or, for example, room temperature to about 200 ℃.

When the second protective layer 190 including the metal oxide is formed using a wet chemical reaction, lattice defects on the semiconductor region 150 may be reduced (e.g., the possibility or degree of lattice defects may be reduced) while the protective layer is formed, thereby improving the efficiency of the light emitting device 10. In addition, it is possible to facilitate control of the growth rate of the thin film, thereby controlling the thickness of the protective layer and improving the process characteristics.

Ink composition

According to one or more embodiments, the ink composition may include the light emitting device 10.

In some embodiments, the content of the light emitting device 10 in the ink composition may range from about 0.005 parts by weight to about 5 parts by weight, or for example, from about 0.01 parts by weight to about 1 part by weight, based on 100 parts by weight of the ink composition. When the content of the light emitting device 10 is within any of the foregoing ranges, a device having suitable or sufficient light emitting efficiency may be prepared by a solution process using the ink composition. When the content of the light emitting device 10 in the ink composition is less than 0.005 parts by weight and the light emitting apparatus is manufactured using the ink composition, the number of the light emitting devices 10 bonded to the electrode may be small, and thus, it may be difficult to obtain a suitable or sufficient light emitting efficiency, and a problem of multiple dropping may occur.

The ink composition may further include a solvent, a thickener, a dispersant, etc. as needed or desired, thereby having viscosity and dispersion stability suitable for the process.

The dispersant may be used to improve the de-agglomeration effect of the light emitting device 10 in the ink composition and serve as a protective layer for the light emitting device 10 in a solution process.

The dispersant may be a resin type dispersant such as a phosphate type dispersant, a urethane type dispersant, an acrylic dispersant, and the like. For example, examples of commercially available dispersants may include DISPER BYK-103, DISPER BYK-110, DISPER BYK-111, DISPER BYK-2000, DISPER BYK-2001, DISPER BYK-2011, DISPER BYK-2070, DISPER BYK-2150, DISPER BYK-160, DISPER BYK-161, DISPER BYK-162, DISPER BYK-163, DISPER BYK-164, and DISPER BYK-166, all available from Byk-Chemie GmbH.

The content of the dispersant may range from about 10 parts by weight to about 50 parts by weight, or for example, from about 15 parts by weight to about 30 parts by weight, based on 100 parts by weight of the light-emitting device 10. When the content of the dispersant is within any of the foregoing ranges, aggregation of the light-emitting device 10 in the ink composition may be substantially prevented or reduced, and the dispersant may be used as a protective layer for the light-emitting device 10 in a solution process.

In addition, the ink composition may further include an adhesion promoter for increasing adhesion to a substrate, a leveling agent for improving coating properties, an antioxidant, an ultraviolet absorber, and/or any combination thereof, as needed or desired.

Adhesion promoters may be added to enhance adhesion to the substrate. Examples of the adhesion promoter may include a silane coupling agent having a reactive substituent selected from a carboxyl group, a methacryl group, an isocyanate group, an epoxy group, and a combination thereof, but embodiments of the present disclosure are not limited thereto. For example, the silane coupling agent may be trimethoxysilylbenzoate, gamma-methacryloxypropyltrimethoxysilane, vinyltriacetoxysilane, vinyltrimethoxysilane, gamma-isocyanatopropyltriethoxysilane, gamma-glycidoxypropyltrimethoxysilane, beta- (3, 4-epoxycyclohexyl) ethyltrimethoxysilane, or any combination thereof.

Examples of the leveling agent include silicon-based compounds, fluorine-based compounds, siloxane-based compounds, nonionic surfactants, ionic surfactants, and titanate coupling agents, but embodiments of the present disclosure are not limited thereto. For example, the leveling agent may be a silicon-based compound and/or a fluorine-based compound.

Examples of the silicon-based compound include dimethylsilyl silicon, methylsilyl silicon, phenylsilyl silicon, methylphenylsilyl silicon, alkyl-modified silicon, alkoxy-modified silicon, and polyether-modified silicon, but embodiments of the present disclosure are not limited thereto. For example, the silicon-based compound may be dimethylsilyl silicon and/or methylphenylsilicon.

Examples of the fluorine-based compound include polytetrafluoroethylene, polyvinylidene fluoride, fluoroalkyl methacrylate, perfluoropolyether, and perfluoroalkyl ethylene oxide, but embodiments of the present disclosure are not limited thereto. For example, the fluorine-based compound may be polytetrafluoroethylene.

Examples of the siloxane-based compound include dimethyl siloxane compounds (for example, product numbers each available from Shinetsu Silicone: KF96L-1, KF96L-5, KF96L-10, or KF96L-100), but the embodiments of the present disclosure are not limited thereto.

The leveling agent may be used alone or in combination with two or more thereof.

The content of the leveling agent may vary depending on the desired properties, and may range from about 0.001 wt% to about 5 wt%, or for example, from about 0.001 wt% to about 1 wt%, based on the total weight of the ink composition. When the content of the leveling agent is within any of the above ranges, the fluidity and uniformity of the film in the ink composition may be improved.

In some embodiments, the ink composition may have excellent ink jet stability, and thus, the ink composition may be, for example, an ink composition for ink jet printing.

Device

According to one or more embodiments, the apparatus may comprise a light emitting device 10.

In some embodiments, an apparatus may comprise: a substrate; a first electrode and a second electrode which may be spaced apart from each other on the substrate; and a light emitting device 10 between the first electrode and the second electrode.

In some embodiments, the substrate may include a display area and a non-display area around the display area, and the first electrode and the second electrode may be spaced apart from each other on the display area.

For example, the device may be a lighting device, an authentication device, and/or an electronic device, although the embodiments are not limited thereto.

The light emitting device may be used in various suitable displays, light sources, etc.

The authentication device may be, for example, a biometric authentication device that identifies an individual from biometric information (e.g., fingertips, pupils, etc.).

The authentication device may further include a biometric information collection unit.

The electronic device may be suitable for use with a personal computer (e.g., a mobile personal computer), a cellular telephone, a digital camera, an electronic note (e.g., an electronic notebook), an electronic dictionary, an electronic game console, a medical device (e.g., an electronic thermometer, a sphygmomanometer, a blood glucose meter, a pulse measurement device, a pulse wave measurement device, an electrocardiograph, an ultrasonic diagnostic device, and/or an endoscopic display device), a fish finder, various suitable measurement devices, instruments (e.g., instruments of a vehicle, an airplane, and/or a ship), and/or a projector, although the embodiments are not limited thereto.

In an embodiment, the device may be a light emitting device.

In embodiments, the device may include a Liquid Crystal Display (LCD), an organic light emitting display device, and/or an inorganic light emitting display device.

The device may also include a thin film transistor.

Hereinafter, a light emitting device according to one or more embodiments will be described in more detail with reference to examples, but the present disclosure is not limited thereto.

Examples of the invention

Comparative example 1

The GaN nanorods are formed by sequentially depositing n-doped GaN, an emission layer, and p-doped GaN, and KOH etching. AlGaN is formed on the surface of the GaN nanorod as a protective layer to manufacture a light emitting device.

Comparative example 2

A light emitting device was fabricated in substantially the same manner as the formation of the GaN nanorods in comparative example 1, except that GaN was formed as a protective layer.

Comparative example 3

Except that Al is formed on the surface of the GaN nanorod by Atomic Layer Deposition (ALD)2O3Except for the protective layer, a light emitting device was fabricated in substantially the same manner as the formation of the GaN nanorods in comparative example 1.

Comparative example 4

Except that Al is formed on the surface of the GaN nanorod by a wet chemical reaction using 1, 2-ethanedithiol2O3Except for the protective layer, a light emitting device was fabricated in substantially the same manner as the formation of the GaN nanorods in comparative example 1.

Example 1

Except that a group III-V compound protective layer is formed on the surface of the GaN nanorod by a wet chemical reaction, and Al is formed on the surface of the group III-V compound protective layer by a wet chemical reaction2O3Except for the protective layer, a light emitting device was fabricated in substantially the same manner as the formation of the GaN nanorods in comparative example 1.

Evaluation example 1: evaluation of lattice defects

Lattice defects of the light emitting devices manufactured in example 1 and comparative examples 1 to 4 were evaluated using variable energy positron annihilation. The results are shown in table 1.

TABLE 1

Light emitting device Degree of lattice mismatch (%)
Example 1 0.36
Comparative example 1 0.56
Comparative example 2 -
Comparative example 3 13.8
Comparative example 4 10.8

Referring to the results of table 1, it was found that the light emitting devices according to one or more embodiments have a low lattice mismatch degree as compared to the light emitting devices of comparative example 1, comparative example 3, and comparative example 4. In the light emitting device of comparative example 2, the semiconductor region and the protective layer were formed using the same material, and thus, unlike the light emitting device of example 1, the protective layer did not alleviate lattice defects on the surface of the light emitting device generated during the nanorod pattern etching process. Therefore, when the light emitting device according to one or more embodiments is applied to a light emitting apparatus, high luminous efficiency may be obtained.

As is apparent from the foregoing description, since the first protective layer and the second protective layer are formed on the surface of the semiconductor region in the light emitting device, lattice defects may be reduced and efficiency may be improved.

It is to be understood that the embodiments described herein are to be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should generally be considered as available for other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the following claims and their equivalents.

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