阅读说明：本技术 光电器件 (Optoelectronic device ) 是由 约科·朗 马留卡·图奥米宁 约翰尼·达尔 维森特·阿隆索 于 2020-05-29 设计创作，主要内容包括：本发明涉及一种光电子器件(100、200、250、260、300),其包括具有第一表面平面(112、212、105)和与第一个表面平面相对并平行的第二平面(214)的衬底层(110,210,310,107)。该器件还包括布置在衬底层第一表面平面上的台面结构(120、220、320、820、103、123、133)。台面结构包括至少一层III-V族半导体材料；第一表面(101、131)与基底层第一表面平面呈夹角α,其中夹角α在0°和180°之间。该器件还包括布置在台面结构第一表面上的第一类型的第一终止氧化物层(130、230、330),并且在布置第一类型第一终止氧化物层之前,台面结构的第一表面已经被清洁,且除去了第一表面上的至少75％的天然氧化物。(The invention relates to an optoelectronic device (100, 200, 250, 260, 300) comprising a substrate layer (110,210,310,107) having a first surface plane (112, 212, 105) and a second plane (214) opposite and parallel to the first surface plane. The device further comprises a mesa structure (120, 220, 320, 820, 103,123,133) arranged in the plane of the first surface of the substrate layer. The mesa structure includes at least one layer of a III-V semiconductor material; the first surface (101, 131) is at an angle α to the plane of the first surface of the base layer, wherein the angle α is between 0 ° and 180 °. The device further includes a first termination oxide layer (130, 230, 330) of a first type disposed on the first surface of the mesa structure, and the first surface of the mesa structure has been cleaned and at least 75% of native oxide on the first surface has been removed prior to disposing the first termination oxide layer of the first type.)

1. An optoelectronic device (100, 200, 250, 260, 300) comprising

-the substrate layer (110,210,310,107) has a first surface plane (112, 212, 105) and a second surface plane (214) opposite and parallel to the first surface plane;

-a mesa structure (120, 220, 320, 820, 103,123,133) arranged on a first surface plane of the substrate layer, the mesa structure comprising

-at least one layer of a III-V material; and

-a first surface (101, 131) arranged at an angle a with respect to a first surface plane of the substrate layer, wherein the angle a is between 0 ° and 180 °;

-a first termination oxide layer of a first type (130, 230, 330) arranged on the first surface of the mesa structure, wherein the first surface of the mesa structure has been cleaned and at least 75% of native oxide on the first surface has been removed before the first termination oxide layer of the first type is arranged.

2. The optoelectronic device (100, 200, 250, 260, 300) according to claim 1, wherein the mesa structure (120, 220, 320, 820, 103,123,133) further comprises a second surface (132) parallel to the first surface plane (112, 212, 105) of the base layer (110,210,310,107) and a second termination oxide layer (132, 232, 332, 832) of a second type arranged on the second surface of the mesa structure.

3. An optoelectronic device (100, 200, 250, 260, 300) as claimed in claim 1 or 2, in the case of a micro light emitting diode, and having a mesa structure (120, 220, 320, 820, 103,123,133) with an area on the substrate of 1-250000 μm²。

4. An optoelectronic device (100, 200, 250, 260, 300) as claimed in claim 1 or 2, in the case of a photodetector, and having a mesa structure (120, 220, 320, 820, 103,123,133) with an area on the substrate of 1-100 μm²。

5. An optoelectronic device (100, 200, 250, 260, 300) as claimed in claim 1 or 2 in the case of a vertical cavity surface emitting laser and having a mesa structure (120, 220, 320, 820, 103,123,133) with an area on the substrate of 1-250000 μm²。

6. An optoelectronic device (100, 200, 250, 260, 300) according to any one of the preceding claims, wherein at least 50% of the total oxide of the first termination oxide layer (130, 230, 330, 840) is a group III oxide.

7. An optoelectronic device (100, 200, 250, 260, 300) according to any of claims 2-6, wherein at least 50% of the total oxide of the second termination oxide layer (132, 232, 332, 832) is a group III oxide.

8. An optoelectronic device (100, 200, 250, 260, 300) according to any of claims 2-7, wherein the second termination oxide layer (132, 232, 332, 832) is a crystallization termination oxide layer.

9. An optoelectronic device (100, 200, 250, 260, 300) according to any of the preceding claims, comprising a plurality of mesa structures (120, 220, 320, 820, 103,123,133), wherein the angle a is greater than 0 ° and less than 180 °, and the distance between the centres of two adjacent mesa structures is between 2 and 500 μm.

10. An optoelectronic device (100, 200, 250, 260, 300) according to claim 9, wherein a third termination oxide layer (134, 234, 334, 840) of a third type is arranged on the surface between two adjacent mesa structures (120, 220, 320, 820, 103,123, 133).

11. An optoelectronic device according to any one of the preceding claims further comprising an overcoat on the outermost termination oxide layer.

12. An optoelectronic device according to any one of the preceding claims, wherein the angle a is from 30 to 90 °.

13. A method of fabricating an optoelectronic device (100, 200, 250, 260, 300), the method comprising

-obtaining a mesa structure (120, 220, 320, 820, 103,123,133) arranged on a first surface plane (112, 212, 105) of a substrate layer (110,210,310,107), the mesa structure comprising

-at least one layer of a group III-V material, and

-arranging the first surface (101, 131) at an angle a with respect to a surface plane of the substrate layer, wherein the angle a is between 0 ° and 180 °;

-cleaning the first surface of the mesa structure by removing at least 75% of the native oxide on the first surface of the mesa structure; and

-forming a first termination oxide layer (130, 230, 330) of a first type on a first surface of the mesa structure.

14. The method of claim 13, wherein the mesa structure comprises a second surface (132) parallel to the first surface plane (112, 212, 105) of the substrate layer (110,210,310, 107); and the method further includes forming a second termination oxide layer (132, 232, 332, 832) of a second type on the second surface of the mesa structure (120, 220, 320, 820, 103,123, 133).

15. A method according to claim 13 or 14, which removes the substrate layer (110,210,310,107) after forming the first termination oxide layer (130, 230, 330) and the optional second termination oxide layer (132, 232, 332, 832).

16. The method of any of claims 14-15, further comprising depositing an overcoat layer on the termination oxide layer.

Technical Field

The present invention relates to an optoelectronic component and a method for producing an optoelectronic component. The optoelectronic device includes a mesa structure.

Background

Optoelectronic devices such as lasers, light emitting diodes, detectors, and photovoltaic devices are typically composed of epitaxially grown semiconductor heterostructures, including quantum well structures and more precisely structures based on compound semiconductor materials. A III-V compound semiconductor is a typical example of a compound semiconductor material, which is obtained by combining a group III element (mainly Al, Ga, In) with a group V element (mainly N, P, As, Sb). In opto-electronic devices, heterostructures are obtained by epitaxially growing a given semiconductor material on top of another. Furthermore, by using epitaxial growth fabrication techniques, III-V semiconductors may fabricate quantum wells and stack structures similar thereto, such as diode (LED) structures for achieving light emission. Specifically, quantum wells are formed in semiconductors by sandwiching a material such as indium gallium nitride (InGaN) between two layers of a material having a wider bandgap, such as gallium nitride (GaN). There are other possible combinations of materials that form quantum wells, including a layer of indium gallium aluminum phosphide (InGaAlP) sandwiched between two layers of indium gallium aluminum phosphide having a higher aluminum concentration, and the like. These structures may be formed by Molecular Beam Epitaxy (MBE) or Metal Organic Chemical Vapor Deposition (MOCVD) processes. Furthermore, the epitaxially grown III-V compound semiconductor structure may be formed as a mesa structure by vertically etching the semiconductor layer using photolithography techniques well known in the art. A mesa structure is a multi-layer semiconductor structure formed on top of a substrate layer having a surface plane and sloped sides.

As an example of an optoelectronic device, in a light emitting device, photon generation occurs during carrier recombination that is confined between potential energy barriers caused by band discontinuities. The wavelength of the photon depends on the energy difference between the conduction band minimum and the valence band maximum corresponding to the quantum well; i.e., the bandgap energy. Likewise, in a photon detector, photon detection occurs when a photon (having an energy higher than the bandgap energy of the active region) is absorbed to produce an electron-hole pair, which is then collected by a voltage difference applied across the device.

In general, in optoelectronic devices, and in particular in light emitting devices, there is a need to efficiently inject current into the active quantum well region of the optoelectronic device. A micro LED device is a typical example, and the device efficiency may be poor when driving a micro LED based display at low injection current levels. In general, it is desirable to transfer the injected current to the light generation of the active region of the device as high as possible, so that the injected electrons recombine with holes as much as possible and generate photons. This is defined as the Internal Quantum Efficiency (IQE) of the LED.

The reasons for the inefficiency are mainly due to the following factors: (i) electron/hole schottky-read-hall (SRH) recombination; (ii) auger recombination; (iii) electrons overflow from the quantum well. It is noteworthy that the main cause of IQE degradation when the device is operated at low current densities is non-radiative Shockley-Read-Hall recombination in the defect state, which in turn reduces light generation and output. In addition, the recombination process can generate excessive heat that can reduce the operational life of the photovoltaic device.

In miniature LED devices, the specific surface area of the LED increases as the size decreases, and thus the material surface quality will determine the final performance of the device. That is, due to the micro LED mesa structure processed using etching and photolithography techniques, the mesa sidewalls can produce a high density of atomic defects and disordered structures, which are sources of defect states, non-radiative schorly-read-hall (SRH) recombination and leakage currents. It is worth noting that in the example of a micro LED based display device, since the charge carrier diffusion length can be comparable to the micro LED size and pixel pitch, the effect of the defective sidewalls can extend over long distances and can affect the performance of the entire chip.

An inherent source of high density defects for typical compound semiconductor optoelectronic devices is uncontrolled oxidation of group III-V materials. The oxide of the compound semiconductor has characteristics of atomic bond disorder, bond breaking (dangling bond), and mixed group III and group V oxides. Such nm-thick oxide layers tend to produce a high density of electrically active defect states in the bandgap of the semiconductor material. In particular, group V oxides are more prone to high density defect states. Such detrimental oxides are readily formed during the processing of optoelectronic devices. Particularly in the fabrication of Micro-LED device mesas, the mesa surfaces are oxidized after the mesa structures are formed using photolithography and etching techniques.

Currently known semiconductor manufacturing equipment solves the above-mentioned problems in the manufacture of optoelectronic devices by employing some known techniques. One such technique is to chemically clean and passivate the mesa sidewall surfaces during fabrication of the optoelectronic device. This chemical passivation may be an ammonium sulfide based passivation or a SU-8 based passivation. But the passivation has a problem in that it is unstable and easily oxidized. Another technique is to overcoat a metal oxide (e.g., Al) using Atomic Layer Deposition (ALD), sputtering, or Plasma Enhanced Chemical Vapor Deposition (PECVD) techniques₂O₃、SiO₂) Deposited on the mesa sidewalls. These methods for fabricating opto-electronic devices can produce a layer of interface oxide of poor quality and associated defects because the overcoat material contains oxygen and chemical cleaning is often insufficient to remove the oxide, especially in aluminum-containing compound semiconductor materials.

Accordingly, in light of the foregoing discussion, there is a need to address the shortcomings associated with conventional semiconductor devices and conventional fabrication techniques.

Accordingly, the present invention is directed to a solution to the existing problem of poor mesa quality photovoltaic devices with native oxide layers and associated non-radiative recombination and leakage current. It is an object of the present invention to provide a solution which at least partly solves the problems encountered in the prior art and provides an optoelectronic device which is economical, easy to implement and precise.

Disclosure of Invention

The present invention is directed to an optoelectronic device and a method of manufacturing an optoelectronic device.

The present disclosure provides an optoelectronic device comprising a substrate layer having a first surface plane and a second surface plane opposite and parallel to the first surface plane. The optoelectronic device further comprises a mesa structure arranged in the plane of the first surface of the substrate layer. The mesa structure comprises at least one layer of a III-V material and a first surface arranged at an angle a with respect to the plane of the first surface of the substrate layer, the angle being between 0 ° and 180 °. The device further includes a first termination oxide layer of the first type disposed on the first surface of the mesa structure, the first surface of the mesa structure having been cleaned and at least 75% of the native oxide on the first surface of the mesa structure having been removed prior to disposing the first termination oxide layer of the first type.

The invention also provides a method of manufacturing an optoelectronic device, the method comprising

-obtaining a mesa structure arranged in the plane of the first surface of the substrate layer, which mesa structure comprises at least one layer of a III-V material and which first surface is at an angle α with respect to the plane of the surface of the substrate layer, wherein the angle α is between 0 ° and 180 °,

cleaning the first surface of the mesa structure by removing at least 75% of the native oxide on the first surface of the mesa structure,

-forming a first termination oxide layer of a first type on the first surface of the mesa structure.

Brief description of the drawings

The foregoing summary, as well as the following detailed description of illustrative embodiments, is better understood when read in conjunction with the appended drawings. In order to demonstrate the invention, exemplary configurations of the invention are given in the drawings. However, specific methods and apparatus are also disclosed herein. Furthermore, those skilled in the art will recognize that the drawings are not drawn to scale. Identical elements are denoted by the same reference numerals, where possible.

Embodiments of the invention will now be described, by way of example only, with reference to the following drawings, in which:

fig. 1A and 1B are schematic views of an optoelectronic device according to a first embodiment of the present invention.

Fig. 2A, 2B and 2C are schematic views of an optoelectronic device according to a second embodiment of the present invention.

Fig. 3A is a schematic of an optoelectronic device having a native oxide on the surface of a mesa structure.

Fig. 3B is a schematic of an optoelectronic device with an overcoat on top of the native oxide.

Fig. 3C is a schematic view of a photovoltaic device having a termination oxide layer according to a third embodiment of the present invention.

Fig. 3D is a schematic view of a fourth embodiment of an opto-electronic device of the present invention having a termination oxide layer and a dielectric capping layer.

FIG. 4 is a schematic process flow diagram of a fifth embodiment of the present invention.

Fig. 5 is a schematic view of a processing apparatus according to a sixth embodiment of the present invention.

Fig. 6 is a graph showing the carrier lifetime decay curves of a micro LED device with native oxide and a micro LED device processed according to a seventh embodiment of the present invention, measured by time-dependent single photon counting, respectively.

Fig. 7 is a graph showing photoluminescence spectra of typical micro LED devices without passivation and with a native oxide layer, micro LED devices passivated using prior art techniques, and micro LED devices treated with an eighth embodiment of the invention, respectively.

Fig. 8 is a schematic view of a vertical cavity surface emitting laser diode according to a ninth embodiment of the present invention.

FIG. 9A is a reflection high energy electron diffraction pattern of the cleaned InGaAlP material surface.

FIG. 9B is a reflection high energy electron diffraction pattern of a passivated InGaAlP material surface according to a tenth embodiment of the present invention.

Fig. 10A is an X-ray photoelectron spectrum of Ga2p on a micro LED device with a native oxide layer on the mesa surface.

Fig. 10B is an X-ray photoelectron spectrum of Ga2p on a micro LED device having a termination oxide layer according to the eleventh embodiment of the present invention.

Fig. 10C is an X-ray photoelectron spectrum of P2P on a micro LED device with a native oxide layer on the mesa surface.

FIG. 10D is an X-ray photoelectron spectrum of P2P on a micro LED device having a termination oxide layer according to the twelfth embodiment of the present invention.

Fig. 11 is a schematic view of a photoelectric device according to a thirteenth embodiment of the present invention.

Fig. 12 is a schematic view of a photovoltaic device according to a fourteenth embodiment of the present invention.

Fig. 13 is a schematic view of a photovoltaic device according to a fifteenth embodiment of the present invention.

In the drawings, underlined numerals are used to indicate an item in which the underlined numeral is located or an item adjacent to the underlined numeral. The non-underlined numbers are associated with the items identified by the line, linking the non-underlined numbers to the items.

Drawings

Fig. 1A is a schematic view of an optoelectronic device 100 from above in one embodiment. Fig. 1B is a diagram of cross-section a-a of the optoelectronic device 100. The optoelectronic device 100 of fig. 1A includes nine 120 mesas. Each mesa structure is arranged on top of substrate layer 110, i.e. in the plane of its first surface. The first surface plane 112 of the substrate layer 110 is given in fig. 1B. A first termination oxide layer 130 of a first type is disposed on a first surface of the mesa structure 120. Referring to fig. 1A, the first termination oxide layer 130 surrounds the mesa structure from all lateral directions. A second termination oxide layer 132 is disposed on the second surface of the mesa structure 120. Second stop oxide layer 132 is parallel to surface plane 112 of substrate layer 110. Additionally, a third termination oxide 134 layer has been formed on top of the base layer between the mesa structures.

Fig. 2A, 2B and 2C are schematic views of the photoelectric device of the second embodiment. In fig. 2A, the optoelectronic device 200 comprises a mesa structure 220 arranged on top of a substrate 210, i.e. in the plane of a first surface thereof. The first surface plane 212 is opposite and parallel to the second surface plane 214. Mesa 220 includes a first layer 202 (a buffer layer in the case where the optoelectronic device is an LED or micro-LED) epitaxially grown on top of the substrate, a second layer 204 grown on top of the first layer, an active region 206 grown on top of the second layer, and a third layer 208 grown on top of the active region. A first type first termination oxide layer 230 is disposed on a first surface of the mesa structure 220. A second type second termination oxide layer 232 is disposed on a second surface of the mesa structure 220. Fig. 2A is an explanatory enlarged view of the first surface. It can be seen that the thickness of the first stop oxide layer 230 varies according to the material of the mesa structure layer. As seen in the illustrative enlarged view, layer 206 includes a portion 240 of the termination oxide layer on a side thereof that is of a different thickness than the portion 242 disposed on epitaxial layer 204. And layer 208 includes a portion of termination oxide layer 244 on its sides that is similar in thickness to portion 240. In addition, a contact layer 222 is formed on top of the third layer 208, and a third termination oxide layer 234 is disposed on a surface of the substrate layer.

Fig. 2B is an optoelectronic device 250 in another embodiment. In this embodiment, the mesa structure 220 has been formed on the substrate 210, but only a first surface thereof has been treated and the termination oxide layer 230 has been generated. Fig. 2C shows another optoelectronic device 260 that includes a mesa structure 220, a first termination oxide 230, a second termination oxide 232, and a third termination oxide 234. In this embodiment, the mesa structure has been processed such that first layer 202 is not completely etched away from substrate layer 210.

Fig. 3A is a schematic diagram of an optoelectronic device 300 having native oxide on the surface of a mesa structure. Mesa structure 320 is disposed on top of substrate 310. Mesa structure 320 includes a contact layer 322 fabricated using photolithographic techniques on top of mesa structure 320 and a native oxide layer 370 on the surface of the crystalline semiconductor material 360 of mesa structure 320. The native oxide layer 370 is also shown in the enlarged partial view of fig. 3A.

Fig. 3B is a schematic illustration of a photovoltaic device 300 having an overcoat on top of a native oxide. Mesa structure 320 is disposed on top of substrate 310. The mesa structure 320 includes a native oxide layer 370 on the surface of the crystalline semiconductor material 360 of the mesa structure 320 and a dielectric layer 390 disposed on top of the native oxide layer, the dielectric layer 390 also being shown in a close-up view in fig. 3B. Fig. 3B also shows an enlarged view of an opto-electronic device fabricated according to a known method. As can be seen from fig. 3B, the oxide is disordered at the interface.

Fig. 3C is a schematic view of a photovoltaic device 300 having a termination oxide layer according to a third embodiment of the present invention. Mesa structure 320 is disposed on top of substrate 310. The mesa structure 320 includes a contact layer 322 fabricated on top of the mesa structure 320 using photolithographic techniques. Further included and disposed on the surface of the crystalline semiconductor material 360 of the mesa structure 320 is a first termination oxide layer 330 of a first type, a second termination oxide layer 332 of a second type, and a third termination oxide layer 334 disposed on the surface of the substrate layer 310. The first termination oxide layer 330 is also given in partial enlargement in fig. 3C. The magnified images show the ordering of the oxide at the interface. This schematically illustrates at least the substantial removal of native oxide before the final product terminates the formation of oxide layer.

Fig. 3D is a schematic representation of a fourth embodiment of an optoelectronic device 300 of the present invention having a termination oxide layer and a dielectric capping layer. Mesa structure 320 is disposed on top of substrate 310. The mesa structure 320 includes a contact layer 322 fabricated on top of the mesa structure 320 using photolithographic techniques and a first termination oxide layer 330 of a first type and an oxide layer 332 of a second type disposed on the surface of the crystalline semiconductor material 360 of the mesa structure 320. A third termination oxide layer 334 is disposed on a surface of the substrate layer 310. In this illustration, a dielectric cap layer 340 is disposed on top of termination oxide layers 330, 332, and 334. This is also shown in the enlarged detail view of fig. 3D.

FIG. 4 is a process flow diagram of an embodiment of the invention. The process flow describes the main process steps S1 (preparation), S2 (formation of a stop oxide layer) and S3 (overcoat). The process begins by forming a substrate having patterned mesa structures on substrate 400. Step S1 performs a series of processes such as 402, 404, and 406 to remove contaminants, carbon, and native oxides, respectively. In this embodiment, the contaminantThe removal step 402 includes a wet chemical treatment, such as an acetone-methanol-IPA treatment. In one embodiment, a wet chemical treatment, such as an acetone-methanol-isopropanol treatment or additionally RCA cleaning, is used in performing the carbon removal step 404. In another embodiment, the carbon removal step 404 may be performed using a dry cleaning process, such as oxygen plasma treatment. After the carbon removal step 404, the native oxide will be removed in step 406. In one embodiment of native oxide removal 406, a wet chemical treatment 410, such as a native oxide treatment based on hydrochloric acid or hydrofluoric acid, will be used. In another embodiment of native oxide removal 406, a dry clean process 408, such as an atomic hydrogen process or ion sputtering using an inert gas, would be used for the process. After the native oxide removal 406, the cleaned substrate with mesa structures is introduced into an ultra-high vacuum chamber for degassing at step 412 of S1. The degassing step is performed in a controlled manner by annealing the mesa structure between 200 ℃ and 600 ℃ to clean the mesa structure. After the degassing step 414, In one embodiment, a metal deposition step 416 is performed by evaporating 0.2-10 monolayers of In, Ga, or Sn metal on the surface of the mesa structure, resulting In a group III or group IV rich surface layer. Step 418 is to place a stop oxide layer, which may be after the degassing step 414 or after the metal deposition step 416. In one embodiment, in step 418, oxygen (in gaseous form, e.g., O) is introduced by introducing oxygen₂Or O₃Or in H₂O₂Where present) to the hot mesa surface. After step 418, the mesa structure may optionally be subjected to a post oxidation formation high temperature anneal step 420. In addition, the mesa structure may be subjected to a UV activation step 422. Step 424 is to cool the mesa to below 100 ℃ under ultra-high vacuum. After the mesa structure is subjected to the cooling process of step 424, the mesa structure is transferred to an overcoat apparatus in step 426 of S3. The transfer may be performed under ultra-high vacuum conditions or under high vacuum conditions in step 428, or directly in air or under an inert gas environment. In one embodiment, the ultra-high vacuum transfer further includes a degassing step 428. Subsequently, step 430 is toThe dielectric overcoat can be deposited using atomic layer deposition, plasma enhanced chemical vapor deposition, or by sputter deposition, among others. After the dielectric cap layer is deposited, a post anneal process may be performed in step 432.

FIG. 5 is a schematic view of a process apparatus according to an embodiment of the present invention. The process equipment includes a glove box 510 in which wet processes may be performed, which may be inert (N)₂) Under a controlled atmosphere, wherein the oxygen concentration is less than 100 ppm. The glove box 510 is connected to a transfer chamber 520 in which a transfer mechanism, such as a robot or, in another example, a linear transfer rod system, is mounted to move the devices from the glove box to different parts of the apparatus. The transfer chamber may enable transfer of samples between chambers at a desired vacuum level. The transfer chamber is connected to a buffer chamber 530, and the buffer chamber 530 is connected to an oxidation chamber 540, which enables the transfer of the sample to the terminating oxidation layer forming chamber 540 under a desired high vacuum level. The buffer chamber serves to compensate for the different pressure levels required for the different steps, e.g. the pressure in the oxidation chamber 540 may be at 10^-10A level of mbar and a pressure in the transfer line 520 of 10^-6mbar or so. By adjusting the pressure in the buffer chamber 530 to be significantly smaller in volume than the other chambers, the processing time is reduced. The transfer chamber 520 is also connected to an overcoat deposition chamber 550 where deposition of dielectric material can occur. The overcoat chamber 550 can be an atomic layer deposition chamber or a plasma enhanced chemical vapor deposition chamber.

Fig. 6 is a charge carrier lifetime decay curve for a standard micro LED device having a native oxide layer on the mesa surface and a micro LED device having a terminating oxide layer on the mesa surface, respectively, measured using time-correlated single photon counting. Both devices are InGaAlP-based micro LED arrays with dimensions smaller than 5 μm. Carrier lifetime is defined as the average time required for minority carriers to recombine. In the case of material systems with high defect densities, the minority carrier lifetime can be shortened due to carrier loss due to non-radiative recombination. As shown in fig. 6, the carrier lifetime of the device with the termination oxide layer is significantly improved. In the figure, lifetime (in nanoseconds) is shown on the abscissa and counts (in absolute units) are shown on the ordinate. The triangles show the results for a standard micro LED (< τ > about 2.8 ns) and the circles show the results for a micro LED with a terminating oxide layer of the invention (< τ > about 3.5 ns).

Fig. 7 is a photoluminescence spectrum of a standard micro LED device with a native oxide layer at the mesa surface (lowest curve), a photoluminescence spectrum of a micro LED device passivated with a prior art mesa surface (middle curve) and a photoluminescence spectrum of a micro LED device with a terminated oxide layer at the mesa surface of an embodiment of the invention (highest curve), respectively. The wavelength (in nm) is shown on the abscissa and the photoluminescence intensity (in counts) is shown on the ordinate. These are miniature LEDs of size 10 μm InGaAlP-based material, the middle of the figure being the reference for the three curves.

Fig. 8 is a schematic diagram of a Vertical Cavity Surface Emitting Laser (VCSEL) structure 800, according to an embodiment. Semiconductor layers 812 and 814 are disposed on top of substrate 810. In this example, the semiconductor layer 812 is contained in a bottom Distributed Bragg Reflector (DBR) and the layer 814 is an n-contact layer. A mesa structure is disposed on top of the n-contact layer 814. In this example, the mesa structure includes a plurality of semiconductor layers that make up an n-type DBR 826, an optical microcavity 824, an oxide aperture layer 816, a p-type DBR 822, and a top p-type contact layer 818. In this example, the top dielectric DBR 828 is formed from multiple layers of dielectric materials. A first termination oxide layer 830 of a first type is disposed on a first surface of the mesa structure 820. A second type second termination oxide layer 832 is disposed on the second surface of the mesa structure. A third termination oxide layer 840 is disposed on top of the n-contact layer 814.

Such a termination oxide layer increases the semiconductor device energy barrier and improves carrier confinement within a mesa structure formed by the stack of multiple semiconductor layers. The termination oxide layer provides a passivation effect that prevents uncontrolled oxidation of the surfaces 822, 826, 816, 818 and 824. The need to enclose such devices in a sealed package is avoided.

FIG. 9A is a reflection high energy electron diffraction pattern of the InGaAlP (001) material surface cleaned by the above cleaning process. The diffractogram shows the long range order of the surface with (2x4) surface symmetry (another azimuth angle not shown), indicating that the surface has been successfully cleaned of native oxides and other contaminants, and that the surface has been reconstructed from the graph to form a clean (2x4) surface symmetry.

FIG. 9B is a reflection high energy electron diffraction pattern of the surface of InGaAlP (001) material with a crystal stop oxide layer according to the present invention. The diffractogram shows the long range order of the surface with (3x1) surface symmetry in a planar (001) surface (another orientation not shown), i.e. the terminating oxide layer is crystalline.

Fig. 10A is a graph of the spectral emission spectrum of Ga2px radiation photoelectron (XPS) in InGaAlP-based material with a mesa structure having a native oxide layer. The deconvolved emission spectrum shows the characteristic component 1010 of the Ga-O bond. Further, 1012 is a characteristic component of the Ga bonding environment in the bulk semiconductor stack.

Fig. 10B is a graph of the emission spectrum of Ga2px radiation photoelectrons from a mesa structure of InGaAlP-based material with a termination oxide layer in accordance with an embodiment of the present invention. The deconvolved emission spectrum shows a characteristic component 1020 of the Ga-O bonds, which is much smaller than in the case with a native oxide layer. Further, 1022 is a characteristic component of the Ga bonding environment in the bulk semiconductor stack.

Fig. 10C is a graph of P2P x-ray photoelectron emission spectra from a mesa structure with a native oxide layer of InGaAlP-based material. The deconvolved emission spectrum shows a weaker P-bond component 1030 and a strong component 1032 representative of phosphorus oxide within the bulk semiconductor material.

Figure 10D is a graph of the P2P x-ray photoelectron emission spectrum of a mesa structure of InGaAlP-based material having a termination oxide layer in accordance with an embodiment of the present invention. The deconvolved emission spectrum clearly shows the characteristic components 1040 of the P-bonds in the bulk semiconductor material. The characteristic component 1042 of the phosphorus oxide is lower than the detection range of the XPS instrument.

Fig. 11 is a side view of an optoelectronic device similar to that shown in fig. 1A and 1B, according to an embodiment. It shows the angle alpha between the first surface 101 of the mesa 103 and the first surface plane 105 of the substrate layer 107. The line with reference numeral 109 gives the distance between the centers of two adjacent mesa structures.

Fig. 12 is a schematic view of a photovoltaic device according to a fourteenth embodiment of the present invention. In this embodiment, the first surface of mesa 123 is divided into two portions, 121a and 121b, which are arranged at an angle to each other. As shown, the angle α has been measured through the active region 125 along the mesa.

Fig. 13 is a schematic view of a photovoltaic device according to a fifteenth embodiment of the present invention. In the present embodiment, the first surface 131 of the mesa structure 133 is a partial spherical surface. As shown, the angle α has been measured through the active region 135 along the mesa.

Modifications may be made to the disclosed embodiments described above without departing from the scope of the invention as defined in the appended claims. The terms "comprising," "including," "containing," "having," "being," and the like, as used in describing and claiming the present invention, are intended to be interpreted in a non-exclusive manner, i.e., to allow for the presence of items, components, or elements that are not expressly described. Reference to the singular is also to be construed to relate to the plural.

Detailed Description

Examples of the present invention and their implementation are described in detail below. Although a few specific embodiments of the invention have been disclosed, those skilled in the art will recognize that other embodiments for practicing the invention are possible.

The invention provides an optoelectronic device comprising a substrate layer having a first surface plane and a second surface plane opposite and parallel to the first surface plane. The optoelectronic device further comprises a mesa structure arranged in the plane of the first surface of the substrate layer. The mesa structure comprises at least one layer of a III-V material and a first surface arranged at an angle a with respect to the plane of the first surface of the substrate layer, the angle being between 0 ° and 180 °. The device further includes a first termination oxide layer of the first type disposed on the first surface of the mesa structure, the first surface of the mesa structure having been cleaned and at least 75% of the native oxide on the first surface of the mesa structure removed prior to disposing the first termination oxide layer of the first type.

The invention also provides a method of manufacturing an optoelectronic device, the method comprising

-obtaining a mesa structure arranged in the plane of the first surface of the substrate layer, the mesa structure comprising at least one layer of a III-V material and the first surface being at an angle α with respect to the plane of the surface of the substrate layer, wherein the angle α is between 0 ° and 180 °;

-cleaning the first surface of the mesa structure by removing at least 75% of the native oxide on the first surface of the mesa structure;

-forming a first termination oxide layer of a first type on the first surface of the mesa structure.

The present invention therefore provides a novel method of passivating an optoelectronic semiconductor device by creating a termination oxide layer on the surface of the mesa structure of the optoelectronic device. Such a terminating oxide layer can improve the physical and electrical characteristics of the opto-electronic device well compared to native oxide layers or oxide layers formed or deposited by other methods known heretofore. Since such a termination oxide layer provides beneficial passivation properties, inhibits non-radiative recombination at the mesa surface, and improves interface quality for subsequent dielectric overcoat deposition. Thus, such a termination oxide layer improves carrier confinement within a mesa structure formed by the stack of multiple semiconductor layers by increasing the photovoltaic device energy barrier.

In an optoelectronic device, the first surface of the mesa structure has been cleaned and at least 75% of the native oxide on the first surface of the mesa structure has been removed prior to disposing the first termination oxide layer of the first type. The electrical properties of native oxides are very low and their presence can therefore degrade the performance of optoelectronic devices. Furthermore, in the final product, at least the main native oxide has been removed before the formation of the stop oxide layer. In fact, the structure of the termination oxide layer is ordered, and therefore, at the interface of the first surface of the mesa structure and the first termination oxide layer, the ordered arrangement of the oxides of the termination oxide layer may prove that the mesa structure has been cleaned before it forms the first termination oxide layer. The structure can be analyzed, for example, by using Transmission Electron Microscopy (TEM) or X-ray photoelectron spectroscopy (XPS). The difference between the uncleaned and cleaned mesa surfaces on the final product is also given in fig. 3, which will be described in more detail below.

It should also be noted that the conversion or formation of the first stop oxide layer is typically not 100%, even if at least 75% of the native oxide has been removed, not all locations where native oxide has been removed need be covered by the stop oxide layer. For example, the conversion of the terminating oxide may be 50%. In addition, the conversion of the termination oxide can be influenced intentionally or unintentionally. One example of deliberately reducing the conversion is masking or capping certain regions after the native oxide is removed and before the termination oxide layer is formed to prevent further modification of the underlying regions. One example of an inadvertent reduction in conversion is the presence of contamination, which prevents the formation of a stop oxide layer.

In this specification, the term "type" has been used in conjunction with a terminating oxide layer. The term "type" refers to the nature of the terminating oxide layer, i.e., its composition. The various termination oxide layers used may be the same or different from one another, as will be explained in more detail below. The type of termination oxide layer is determined by the semiconductor layer in which it is located.

An optoelectronic device may refer to a device that emits photons or is capable of detecting photons. Such optoelectronic devices may be Light Emitting Diodes (LEDs), micro LEDs, laser diodes, photovoltaic solar cells and photodetectors. The optoelectronic device in the present invention may also be part of an LED matrix, a photodetector matrix, or a multijunction solar cell. The optoelectronic device is thus a semiconductor device.

The optoelectronic device comprises a mesa structure arranged on top of a substrate layer having a surface plane. A mesa structure refers to an isolated semiconductor stack and includes at least one layer of a III-V material. Each isolated stack of semiconductor layers serves as an optoelectronic component of an optoelectronic device. For example, optoelectronic devices such as lasers, light emitting diodes, detectors and photovoltaic devices may consist of semiconductor heterostructures, more precisely structures based on compound semiconductor materials, comprising an active layer such as a quantum well structure. Semiconductor heterostructures are typically grown on top of a substrate layer by means of epitaxial growth. Wherein a GaAs wafer is an example of a substrate layer. Another example of a substrate layer is an epitaxial III-V layer on a wafer. The surface plane of the substrate layer refers, for example, to the (001) plane (in the case of a III-V layer epitaxial on GaAs or wafer) or the (0001) plane (in the case of GaN).

The mesa structure, i.e. the isolated semiconductor stack, comprises a first surface arranged at an angle alpha with respect to the first surface plane of the substrate layer. The angle between the surface plane and the first surface may be 30-90 degrees. The first surface is a surface surrounding the side of the mesa structure, i.e., the inclined portion. According to an embodiment, the mesa structure further comprises a second surface parallel to the plane of the first surface of the substrate layer. The second surface is the surface layer of the mesa furthest from the substrate. The surface layer refers to at least the first atomic layer of the structure.

The first surface is arranged at an angle alpha with respect to the plane of the first surface of the substrate layer, wherein the angle is between 0 deg. and 180 deg.. According to an embodiment, the angle α is 30-90 degrees. Thus, the angle α can be from 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 100, 105,110,115,120,125,130,135,140,145,150,155,160,165, or 170 degrees to 15, 20, 25, 30, 35, 40, 45, 50, 60, 65, 70, 75, 80, 85, 90, 95, 100, 105,110,115,120,125,130,135,140,145,150,155,160,165 degrees, or 175 degrees.

According to one embodiment, the optoelectronic device further comprises an overcoat on the outermost termination oxide layer. The function of such an overcoat may be to protect the termination oxide layer and the rest of the device. The overcoat can also be used to alter the refractive index of the outer surface or as an anti-reflective or highly reflective coating. Thus, the overcoat may have different thicknesses at different locations and may include spikes.

Further, the overcoat may be disposed on only a portion of the surface of the optoelectronic device. Indeed, when used, it is most often used to protect the termination oxide layer, but may also be used to protect the remainder of the optoelectronic device. The outer coating may thus be discontinuous and it may be made along a certain pattern.

The optoelectronic device further includes a first termination oxide layer of the first type disposed on the first surface of the mesa structure. In another embodiment, a second termination oxide layer of a second type is disposed on the second surface of the mesa structure.

The first termination oxide layer surrounds the mesa, i.e., the sides of the mesa. The first termination oxide layer is of a first type. The first type is preferably a termination oxide layer with a predominant portion of group III oxide. By predominantly group III oxide is meant that at least or more than 50% of the total oxide at the surface is group III oxide. It is noteworthy that group V oxides and their associated atomic bonds tend to produce a high density of defect states in the bandgap of the semiconductor, and thus the surface oxide is intentionally arranged as the group III predominant oxide. Furthermore, the first termination oxide layer formed by the method of the present invention preferably exhibits a thickness of less than 10 nm. According to an embodiment, the composition (e.g., the fractional level in percent) and thickness of the first termination oxide layer is dependent on the material present on the mesa sidewalls (i.e., the first surface).

When the second termination oxide layer is present, it is disposed on the second surface of the mesa structure. The second termination oxide layer is of a second type. In one embodiment, the second type is different from the first type. In another embodiment, the second type may be the same as the first type. The second stop oxide layer is preferably homogeneous in composition and thickness. In an alternative embodiment, the second termination oxide layer is a crystallization termination oxide layer.

Thus, according to one embodiment, at least 50% of the total oxide of the first termination oxide layer is a group III oxide. According to another embodiment, at least 50% of the total oxide of the second termination oxide layer is a group III oxide. Thus, both the first and second termination oxide layers or either of the first and second termination oxide layers may be formed primarily of group III oxides.

The mesa structure may be of any form, i.e. the mesa structure may have a square, rectangular, circular or oval shape, or any other suitable form, when seen from above (perpendicular to the first surface of the substrate layer). The mesa structure may have a linear form, a non-linear form, a combination of linear forms having different angles with respect to the first substrate plane, a combination of non-linear forms, or a combination of linear and non-linear forms, as viewed from the side.

In embodiments where the optoelectronic device comprises a plurality of mesa structures (e.g. 2-10 or 10-50 or 50-100 mesa structures), it is preferred that the mesa structures are arranged regularly, or according to a regular pattern (e.g. in a circle, the mesa structures near the center of the circle are closer to each other than the mesa structures at the outer circle). The distance between adjacent mesa structures is expressed as the distance between adjacent centers of the mesa structures. The distance between the centers of two adjacent mesa structures may be, for example, 2-500 μm. The distance may be 2, 4, 6, 10, 15, 20, 25, 30, 35, 40, 45, 50, 60, 70, 80, 90, 100, 120, 150, 200, 250, 300 or 350 μm to 10, 15, 20, 25, 30, 35, 40, 45, 50, 60, 70, 80, 90, 100, 120, 150, 200, 250, 300, 350, 400, 450, 500 μm. In one embodiment, the optoelectronic device comprises a plurality of mesa structures, wherein the angle α is greater than 0 ° and less than 180 °, and the distance between the centers of two adjacent mesa structures is 2-500 μm.

According to another embodiment, when the optoelectronic device comprises a plurality of mesa structures, a third termination oxide layer of a third type is arranged on the surface between two adjacent mesa structures. The third type of termination oxide layer may be the same as one of the first or optional second termination oxide layers, or it may be the same as both the first and optional second termination oxide layers, or it may be different from both the first and optional second termination oxide layers. And it is also possible that only the first and third termination oxide layers are present, without the second termination oxide layer. The third type of termination oxide layer may also be a group III oxide with at least 50% of the total oxidation. In this case, it is preferable to clean the surface before forming the third termination oxide layer by removing at least 75% of the native oxide on the surface thereof to form the third termination oxide layer.

Thus, the first, optional second and optional third termination oxide layers should each contain at least 50% group III oxide, and when multiple termination oxide layers are present, the group III oxide content can be independently selected according to the requirements of each termination oxide layer. According to one embodiment, the group III oxide content is at least 50, 55, 60, 65, 70, 75, 80, 85, 90 or 95%.

According to another embodiment, the first, optional second and optional third termination oxide layers may further comprise, independently of each other, an amount of group V oxide, such as 20% of the total oxide. Still alternatively, the amount of group V oxide is greater than 0% but below its detection limit (typically 0.1% or 1%). Thus, the amount of group V oxide may thus be 0.1, 0.5, 1, 1.5, 2, 5, 10, 15 or 20%. The amount of group V oxide may also be as high as 50%.

Thus, according to one embodiment, the first, optional second and optional third termination oxide layers independently of each other comprise at least 50% group III oxide and more than 0% group V oxide.

In one embodiment, the optoelectronic device may be a micro LED device. In practice, the optoelectronic device may also be a micro light emitting diode, wherein the mesa footprint on the base layer is between 1 and 250000 μm². The area may be 1, 10, 100, 500, 1000, 1500, 2000, 5000, 10000, 10500, 15000, 20000, 50000, 100000 or 150000 μm²To 500, 1000, 1500, 2000, 5000, 10000, 10500, 15000, 20000, 50000, 100000, 150000, 200000 or 250000 μm²。

The mesa footprint on the base layer is defined as the parallel projection of the mesa structure (i.e. the single mesa structure) onto the plane of the first surface of the base layer. The base layer in this specification represents the portion of the device not covered by the mesa structure.

The term "micro" as used herein refers to descriptive dimensions of the device, and may in some embodiments refer to lateral dimensions of individual features ranging from 1 μm to 500 μm. Defects and associated non-radiative recombination centers are characteristic of the mesa structure of a typical micro LED device, which can cause injected charge carriers to create optical dead zones around the micro LED device, reducing overall efficiency. The present application avoids this problem due to the nature of the termination oxide layer.

The micro LED device does convert the micro LED mesa surface and its sidewall surface by passivation into a termination oxide layer with a lower number of defects and less non-radiative recombination and carrier leakage characteristics.

In another embodiment, the optoelectronic device is a Vertical Cavity Surface Emitting Laser (VCSEL) with a lateral dimension that is selectable to be at least 1 μm. The optoelectronic device may indeed be a vertical cavity surface emitting laser, wherein the area of the mesa on the base layer is 1-250000 μm². For example, the area of the mesa may be from 1, 10, 100, 500, 1000, 1500, 2000, 5000, 10000, 10500, 15000, 20000, 50000, 100000 or 150000 μm²To 500, 1000, 1500, 2000, 5000, 10000, 15000, 20000, 50000, 100000, 150000, 200000 or 250000 μm². The mesa structure of the VCSEL may have a plurality of aluminum-containing III-V group layers (e.g., AlGaAs and AlAs layers). The aluminum-containing layer can be protected from the environment in the vertical direction by disposing one or more surface passivation layers above it, here a surface passivation layer and a stop oxide layer. The aluminum-containing layers of known VCSELs are typically exposed to the environment at the side surfaces of the mesa structures, especially after the wafer has been diced into individual dies. The native oxidation that occurs in the aluminum-containing oxide layer is uncontrolled, and the thickness of the native oxide layer increases from the edge of the aluminum-containing layer inward, eventually reaching even the active layer of the VCSEL, thereby degrading performance or even preventing operation. Vertical cavity surface emitting lasers are typically mounted in a hermetically sealed package, which is relatively expensive and may be relatively bulky. The present invention avoids packaging problems due to the use of the first and optional second termination oxide layers.

In another embodiment, the optoelectronic device is a lightAn electrical detector. In practice, the optoelectronic device may be a photodetector, wherein a mesa has an area of 1 μm on the base layer²To 100 μm²In the meantime. For example, the area may be 1, 5, 50, 100, 250, 500, 700, 1000 μm²0.01, 0.1, 1, 10, 15, 20, 30, 35, 40, 45, 50, 55, 665 or 70mm²To 50, 100, 250, 500, 700, 1000 μm²0.01, 0.1, 1, 10, 15, 20, 30, 35, 40, 45, 50, 55, 65, 70, 75, 80, 85, 90, 95 or 100mm²。

The photodetector typically comprises multiple layers of semiconductor materials, such as InP, InGaAs, InGaAsP, and GaAs, stacked in any combination. Photodetectors typically have at least one p-n junction that converts photons into electrical current that can be collected by applying a voltage across the p-n junction or by creating a voltage difference across the p-n junction after absorption of a photon. The absorbed photons form electron-hole pairs in the depletion region. Photodiodes and phototransistors are examples of photodetectors.

In addition, the present invention relates to a new structure for vertically etching an optoelectronic device, wherein a stop oxide layer covers the surface of the mesa structure.

In another aspect, the present invention provides a method of fabricating an optoelectronic device. The mesa structure is prefabricated (arranged) on top of the base layer. The mesa structure is further processed to form a first termination oxide layer of a first type on its first surface and optionally a second termination oxide layer of a second type on its second surface.

The method can be divided into three main steps; step S1 (preparation), step S2 (formation of the first and optional second termination oxide layers), and optional step S3 (overcoat). These will be discussed in more detail below.

In this manufacturing method, the material of the first surface and optionally the second surface exposed to air is prone to form a native oxide layer, which will be appreciated by a person skilled in the art to cause dark currents and leakage currents. Therefore, it is desirable to prevent such oxidation to avoid the decrease in the efficiency of the optoelectronic device due to dark current and leakage current phenomena caused by the native oxide layer.

The method also includes cleaning the first surface of the mesa structure by removing at least 75% of the native oxide on the first surface of the mesa structure. This is typically done in at least one cleaning step prior to forming the first stop oxide layer. A detailed description of the various possible cleaning steps in step S1 is given below.

According to an embodiment, the mesa structure comprises a second surface parallel to the plane of the first surface of the substrate layer, so the method further comprises forming a second termination oxide layer of the second type on the second surface of the mesa structure. In this case, it is preferable to clean the second surface by removing at least 75% of the native oxide on the second surface of the mesa structure before forming the second termination oxide layer.

The method may further include removing the substrate layer after forming the first termination oxide layer and the optional second termination oxide layer (and the optional third termination oxide layer). After processing, the resulting optoelectronic device no longer comprises a substrate layer. It can optionally be placed on another substrate layer and in case the angle alpha differs from 90 deg., the angle beta between the new substrate layer and the first surface of the mesa, i.e. the first surface comprising the first termination oxide layer, is naturally 90 deg. -alpha. The mesas may be transferred from one base layer to another base layer using methods known in the art. A new surface of the mesa structure may thus be exposed (by removing the substrate layer), this new surface may also be provided with a termination oxide layer (which may be the same or different from the other termination oxide layers).

Furthermore, mesa structures may be formed (not readily available). The formation of the mesa structure may be performed by methods known in the art, such as Reactive Ion Etching (RIE). The etch depth of the isolation mesa is preselected. In one example, the material may be etched all the way to the substrate. In yet another example, a portion of the material may be left on the substrate between the mesas.

Step S1

In step S1, contaminants, carbon, and native oxides are removed from the mesa structure. These have to be removed since these substances do not contribute to the formation of the first and optionally the second stop oxide layer. The substrate may be free of any contaminants and carbon, but if native oxides are present, at least 75% of the oxides should be removed. According to embodiments, at least 80%, 85%, 90%, 95%, 96%, 97%, 98%, 99% or more of the native oxide will be removed. Even a few thousandths of the native oxide may remain.

According to an embodiment, the process starts with obtaining or providing a substrate having a mesa structure. In step S1, a series of processes are performed to remove contaminants, carbon, and native oxides from the substrate layer and the mesa surfaces. In one embodiment, contaminant removal includes a wet chemical treatment, such as an acetone-methanol-isopropanol treatment. In other embodiments, contaminant removal may be performed under ultrasonic agitation.

In one embodiment, the carbon-related atomic species are removed from the surface of the mesa structure using a wet chemical treatment process. This process may be an acetone-methanol-isopropanol treatment or an additional RCA clean. The particulars of RCA cleaning are well known in the art. And this wet chemical treatment process may be performed under ultrasonic agitation. In another embodiment, the carbon removal step may be a dry cleaning process, for example using an oxygen plasma treatment. For example, an oxygen plasma generated in a downstream remote plasma configuration can effectively generate volatile carbon-related species that can be easily removed by a vacuum pump used in the plasma chamber configuration.

In one embodiment, the native oxide will be removed after the carbon removal step. Notably, native oxides of III-V semiconductors exhibit poor characteristics and contain a high density of defects and associated electronic states in the semiconductor bandgap. The native oxide consists of a mixture of group III and group V related oxides, dangling bonds, and dimeric bonds. In general, group V related oxides and their associated electronic states are believed to degrade the performance of optoelectronic devices. The effect of these oxides is given in figure 10 below.

In one embodiment, the native oxide may be removed using a wet chemical treatment. For example, different chemicals (e.g., hydrofluoric acid based solutions, citric acid based solutions, or sulfuric acid based solutions) may be used to remove native oxides from different materials. For example, to clean a mesa structure containing InGaAlP, GaAs, AlGaAs, InP, GaP, GaN, InGaN, etc., a hydrochloric acid solution may be used. The molar concentration of the solution may vary between 0.1M and 12M and the solvent may be deionized water, isopropanol or methanol. The etching time may vary from 1 second to 5 minutes depending on the chosen solution molar concentration and the material composition of the mesa structure. To avoid reoxidation of the mesa surfaces after the chemical treatment is performed, the etching process may be performed in an inert gas environment, wherein the oxygen content is at least less than 1000 parts per million (ppm). Other wet etch recipes, such as hydrofluoric acid solutions, may also be used. The hydrofluoric acid solution may be diluted with deionized water or may be buffered with a buffer such as ammonium fluoride. It is noted that in wet chemical etching techniques, the chemical recipe may vary depending on the material to be treated.

In another embodiment, the native oxide may be removed using a dry etch process. For example, atomic hydrogen flux can be used under vacuum conditions to remove dry native oxide from the mesa surface. Wherein the atomic hydrogen flux can be generated using a remote electron cyclotron resonance plasma source or by using a hydrogen thermal cracker. Thermal crackers can break molecular hydrogen down into atomic hydrogen. Another dry cleaning process for native oxides is ion sputtering of inert gases.

According to an alternative embodiment, the dry process for removing native oxide from the surface of the mesa structure is by ion bombardment, e.g. the inert gas species used for sputtering is helium, argon, neon or xenon. In such an example, the ion source may be an end hall type gridless ion source with sufficiently low ion energy (<200eV) but high current density, minimizing sputter damage and ion implantation to the mesa structure, but allowing for gentle removal of native oxide. In another example, the substrate may be biased to a negative voltage during ion bombardment to increase ion energy.

According to embodiments, as described aboveAfter cleaning (to remove contaminants, native oxides and carbon), the mesa is introduced to ultra high vacuum chamber conditions for processing at step S2. Ultra High Vacuum (UHV) is herein understood to mean a base pressure condition of 1x10^-7To 1x10^-11Vacuum in the mbar range.

Step S2

In the first sub-step of S2, the photoelectric device is heated to a high temperature in a degassing step under ultra-high vacuum conditions to evaporate volatile compounds remaining on the surface of the mesa structure in the previous cleaning step. In one embodiment of the degassing step, the degassing temperature may vary between 200 ℃ and 600 ℃, depending on the material of the mesa structure. It should be noted that the correct temperature and degassing time are required to facilitate the removal of volatile species from the cleaned mesa surfaces. In one embodiment, the temperature may be selected to achieve a slight removal of group V atoms such as arsenic and phosphorous such that the first atomic layer of the first surface of the mesa structure becomes enriched in the group III element.

After the degassing step is performed, the mesa is treated to form a first stop oxide layer. The mesa is controllably oxidized to form one or more termination oxide layers on the surface of the mesa structure.

When the oxygen dose and surface temperature are chosen correctly, oxygen is absorbed to the surface and promotes the transformation of the surface structure into a high quality terminating oxide layer.

Indeed, in one embodiment, the oxidation conditions are selected such that the process promotes the production of volatile group V oxides (which are readily removed from the surface at elevated temperatures), thereby starving the first atomic layer of the mesa surface of group V atoms and converting the surface to a good quality group III related oxide. During degassing, the effect of removing group V species can be monitored using, for example, Reflection High Energy Electron Diffraction (RHEED), X-ray photoelectron spectroscopy (XPS), or a mass spectrometer. Figure 9 gives a more detailed illustration of the effect of the treatment.

In one embodiment, the metal deposition is performed by evaporating 0.2-10 monolayers of a metal In, Ga or Sn on the surface of the mesa structure before forming the stop oxide layer, resulting In a group III or group IV rich surface layer. By performing such metal deposition, the resulting surface is more susceptible to forming a termination oxide layer that is devoid of group V.

According to an embodiment, the first termination oxide layer is of a first type. The first type is a compound semiconductor oxide layer rich in group III oxides and less than 10nm thick. Figures 9 and 10 give more detail.

The optional second termination oxide layer is of a second type. The second type depends on the conditions and geometry of the process. The second type is a compound semiconductor oxide layer rich in group III oxides and less than 10nm thick. Further, the second termination oxide layer may be a crystallization termination oxide layer if the planar surface of the structure has a (001) crystal orientation.

For example, the termination oxide layer may be fabricated by using an oxygen flux under vacuum conditions. The first and optional second termination oxide layers may be formed by passing oxygen (in gaseous form, e.g., O)₂Or O₃Or in the presence of H₂O₂In the case of) to a heated surface of the mesa structure. As for the oxygen gas, it may be generated at a plasma source that generates highly reactive atomic oxygen. Such a plasma source may be an electron cyclotron resonance plasma source mounted remotely from the sample being processed. When the oxygen dose and surface temperature are chosen correctly, oxygen is absorbed to the surface and promotes the transformation of the surface structure into a high quality terminating oxide layer. In one embodiment, the oxidation conditions are selected to promote the production of group V oxides that are highly volatile and that are easily removed from the surface at elevated temperatures, thereby starving the topmost atomic layer of the mesa surface of group V atoms and converting the surface to a good quality group III related oxide. Typically, only oxygen is used as a reagent in the process as compared to more conventional oxide layer formation processes, which typically involve the use of more than one elemental reaction and the growth of new oxide material on the surface rather than modifying an existing surface.

In another example, the outer surface of the mesa structure is heated to at least 200 ℃ and up to 750 ℃ to facilitate the oxidation process, depending on the material composition of the outer surface. The reaction is usually carried out under vacuum conditions, the pressure of the chamberTypically at 1x10^-11To 1x10^-7In the mbar range. Subsequently, the outer surface of the mesa structure is exposed to atomic, molecular, ozone or other oxidizing agents such as H at a selected temperature₂ O₂In the flux of (c). The oxygen partial pressure during oxidation is typically 5x10^-8To 5x10^-3In the mbar range, depending on the material composition of the processed mesa structure. Further, the oxidation time may be between 5 seconds and 60 minutes. In another embodiment, the termination oxide layer is formed under vacuum conditions under ultraviolet irradiation. During the oxidation process, ultraviolet radiation can promote the formation of more reactive singlet oxygen quantum states by oxygen molecules. In addition, ultraviolet irradiation of short wavelength has an effect of breaking surface atomic bonds to promote surface reaction. Wherein 172nm is an example of a surface reaction promoting wavelength.

In additional or alternative embodiments, indium atoms are deposited onto the mesa surface before the surface is converted to a termination oxide layer. Alternatively, the tin atoms may be deposited onto the mesa surface before converting the surface into a stop oxide layer. In another example, gallium atoms are deposited onto the mesa surface before converting the surface to a termination oxide layer. The deposition of metal atoms onto the cleaned mesa surfaces has the effect of forming a thin layer of group V defects on the mesa structure surface to promote the formation of group III or additional group IV (Sn) related oxides during the termination oxide layer formation process. In such embodiments, the metal is deposited in an amount between 0.2 monolayers and 10 monolayers. The deposition of such a metal layer may be performed using a thermal evaporator such as a effusion cell or additionally electron beam evaporation.

The termination oxide layer may be formed under ultra-high vacuum conditions whereby the process may occur in a free molecular flow regime where the mean free path of the molecules is greater than the size of the chamber in which the process occurs. The molecules easily collide with any surface in the chamber. This property allows the process to conform well to 3D surfaces.

After the oxide layer formation is terminated, the mesa structure is cooled to below 100 ℃ preferably under ultra-high vacuum conditions in a cooling step.

Step S3

As an optional step, after forming the termination oxide layer, the optoelectronic device can deposit an overcoat layer. The overcoat deposition may be performed, for example, using Chemical Vapor Deposition (CVD), ALD, or PECVD, or by sputtering, among other methods. The overcoat may be Al₂O₃、HfO₂、SiN_xOr SiO₂. During transfer, the transfer is preferably carried out by a vacuum transfer line to minimize contamination, although air transfer has also proven to provide good results. The transfer may also be carried out under ultra-high vacuum or high vacuum conditions, or in an air or inert gas environment.

The cleaning during fabrication also functions in that the capping layer can be formed without creating a disordered interface between the capping layer and the semiconductor, since the termination oxide layer is ordered.

In one embodiment, the vacuum transfer further comprises a degassing step. After the overcoat layer is deposited, an annealing process such as Rapid Thermal Annealing (RTA) may be performed to improve the layer quality.

Thus, according to an embodiment, the method further comprises depositing an overcoat layer on the termination oxide layer. The termination oxide layer is referred to herein as any termination oxide layer present on the mesa.

In such additional embodiments, the benefit of creating an oxygen-containing structure on the mesa surface (the sloped side surface of the mesa) is provided, the oxygen-containing structure of the surface may prevent further exposure of the material to oxygen, and is characterized by a low amount of atomic scale defects. The embodiments are applicable to photovoltaic and photovoltaic applications including mesa structures formed from Quantum Well (QW) semiconductor material structures. Semiconductor devices typically include a stacked structure of a plurality of semiconductor layers such that the plurality of semiconductor layers can accommodate charge carriers.

The gain effect of the termination oxide layer and its (their) passivation effect can be measured by evaluating the minority carrier lifetime of the device. This measurement can be done using a time-correlated single photon counting method to account for the time-resolved photoluminescence properties of the device. Carrier lifetime is defined as the average time required for minority carriers to recombine. In the case of typical material systems with high defect densities, the minority carrier lifetime is short due to carrier loss due to non-radiative recombination. Fig. 6 shows the effect of terminating the oxide layer.

Furthermore, the effect of the terminating oxide layer can also be characterized by Photoluminescence (PL) spectroscopy. In this technique, the surface of the micro led is excited by external laser, and the energy corresponding to the wavelength of the micro led should be larger than the energy of the band gap of the semiconductor material. Upon excitation, the generated charge carriers recombine, and in the case of radiative recombination, the semiconductor material emits light. The intensity of photoluminescence is particularly affected by the amount of surface state defects generated by poor quality oxides. At high defect densities, the schottky-read-hall recombination dominates, and the photoluminescence intensity emitted by the material is generally lower compared to low defect density materials. A specific example is given in fig. 7. The level of luminescence obtained using a micro device with a stop oxide layer is several times higher than that of the same device passivated using known passivation techniques.

In the manufacturing process, steps S1, S2, and S3 are typically completed in separate chambers. These and other chambers may be isolated from each other by a gate valve, which when in an open position may allow material to be transferred between the different chambers. In addition, the apparatus will have different components to monitor and implement steps S1, S2, and S3, such as pressure and temperature gauges, heaters, vacuum pumps, plasma sources, plasma guns, sputtering heads, gas lines, leak valves, and the like.

The present invention provides a method of passivating a semiconductor device comprising a stacked configuration of a plurality of semiconductor layers processed to form a mesa structure. The plurality of semiconductor layers may contain charge carriers. The method comprises first cleaning the surface of the material exposed to the environment for carbon and contaminants, then removing the native oxide (with poor electrical properties), and then generating the above-mentioned terminating oxide layer by a process of controlled conditions, such as UHV conditions, substrate temperature, time, gas partial pressure, etc., in a process conforming to a 3D shape.

In one embodiment, a substrate including a mesa structure is provided, and a first surface of the mesa structureComprises InAs. And removing pollutants and carbon on the surface of the table top by using a solvent. The solvents used were acetone, methanol and isopropanol. The samples were immersed in each solvent for 1 minute. The native oxide on the mesa structure is then removed by argon ion sputtering. The filament current of the ion gun is 15mA, the voltage is 2kV, and the partial pressure of argon is 3X 10^-6mbar, sputtering time 15 min. The mesa was then brought to a pressure of 1x10^-9An ultra-high vacuum chamber of mbar. The mesa was degassed under ultra high vacuum and annealed at 450 ℃ for 30 minutes. The treated surface showed (4x2) reconstruction as measured by low energy electron diffraction. Then oxidized with oxygen. Oxygen partial pressure of 3x 10^-6mbar and an oxidation time of 15 minutes. The results show that the first stop oxide layer contains an oxide layer of 90% group III oxide and 10% group V oxide.

Other aspects, advantages, features and objects of the present invention will be presented in the attached claims in conjunction with the accompanying drawings and detailed description of illustrative embodiments. It is noted that the invention is susceptible to being combined in various combinations without departing from the scope of the invention as defined in the appended claims.