阅读说明：本技术 一种非均匀码片实时延迟多普勒映像数据生成器 (Non-uniform chip real-time delay Doppler mapping data generator ) 是由 田羽森 王先毅 孙越强 杜起飞 刘黎军 王冬伟 李伟 白伟华 蔡跃荣 柳聪亮 孟 于 2019-11-26 设计创作，主要内容包括：本发明公开了一种非均匀码片实时延迟多普勒映像数据生成器,包括：控制器、码移位脉冲生成器、M个码生成器、M个码移位寄存器、M组相关器群和码延迟误差校正模块；所述码移位脉冲生成器用于生成不同脉冲间隔的码移位脉冲,分别输入M个码移位寄存器；所述M个码生成器,用于根据M个不同起始相位生成GNSS信号的M个伪随机码；所述M个码移位寄存器,用于根据码移位脉冲分别缓存M个伪随机码,然后输出至M组相关器群；所述M组相关器群,用于将反射中频信号、载波生成器输出的载波,和接收到的对应的码移位寄存器发送的伪随机码进行相关运算,生成延迟多普勒映像数据；所述码延迟误差校正模块用于将校正后的预测码相位误差分别输入M个码生成器。(The invention discloses a non-uniform chip real-time delay Doppler mapping data generator, which comprises: the device comprises a controller, a code shift pulse generator, M code generators, M code shift registers, M groups of correlators and a code delay error correction module; the code shift pulse generator is used for generating code shift pulses with different pulse intervals and respectively inputting the code shift pulses into M code shift registers; the M code generators are used for generating M pseudo-random codes of the GNSS signals according to M different initial phases; the M code shift registers are used for respectively caching M pseudo-random codes according to the code shift pulse and then outputting the M pseudo-random codes to the M groups of correlator groups; the M groups of correlator groups are used for carrying out correlation operation on the reflected intermediate frequency signals, the carrier waves output by the carrier wave generator and the received pseudo-random codes sent by the corresponding code shift register to generate delay Doppler mapping data; and the code delay error correction module is used for respectively inputting the corrected predicted code phase errors into the M code generators.)

1. A non-uniform chip real-time delay doppler mapping data generator, the data generator comprising: a carrier generator, wherein the data generator further comprises: the device comprises a controller, a code shift pulse generator with adjustable pulse intervals, M code generators, M code shift registers, M groups of correlator groups and a code delay error correction module;

the controller is used for setting the pulse interval of the code shift pulse generator and controlling the M groups of correlator groups;

the code shift pulse generator is used for generating code shift pulses with different pulse intervals and inputting the code shift pulses into the M code shift registers respectively;

the M code generators are used for generating M pseudo-random codes of the GNSS signals according to M different initial phases, and respectively inputting the M pseudo-random codes into the M code shift registers, wherein the values of the initial phases are related to predicted code phase errors and pulse intervals;

the M code shift registers are used for respectively caching M pseudo-random codes according to the code shift pulse and then outputting the M pseudo-random codes to the M groups of correlator groups;

the M groups of correlator groups are used for carrying out correlation operation on the reflected intermediate frequency signals, the carrier waves output by the carrier wave generator and the received pseudo-random codes sent by the corresponding code shift register to generate delay Doppler mapping data;

the code delay error correction module is used for searching the peak position in the delay Doppler mapping data, correcting the delay prediction code phase error and respectively inputting the corrected prediction code phase errors into the M code generators.

2. The non-uniform chip real-time delay doppler mapping data generator of claim 1, wherein said data generator is implemented by an FPGA.

3. The non-uniform chip real-time delay doppler mapping data generator of claim 1, wherein the controller sets an initial time interval of the code-shifted pulse generator to half a chip, the code-shifted pulse generator match-filters the signal to obtain N code delay units, and then the controller sets the time interval of the code-shifted pulse generator to a, a being 0.5, 0.25 or 0.125 chips.

4. The non-uniform chip real-time delay doppler mapping data generator of claim 3, wherein said M different start phases are:

setting the code start phase of the first group to

5. The non-uniform chip real-time delay doppler mapping data generator of claim 4, wherein the first and second sets of start code phase differences of the code shift register are set to be equal when the reflected signal code phase P is predicted

6. The non-uniform chip real-time delay doppler mapping data generator of claim 5, wherein the first bank of correlators comprises

7. The non-uniform chip real-time delay doppler mapping data generator of claim 6, wherein the code delay error correction module is configured to search for a peak location in the delay doppler mapping data to correct a delay predicted code phase error, specifically:

searching for a peak position in the delay doppler mapping data, the peak position being a position of a maximum value in the delay doppler mapping data, the maximum value position being capable of being used to correct the delay prediction code phase error when the maximum value exceeds a set threshold: if the maximum value of DDM data is in the r-th chip resolution unit, the predicted code phase error D is

Technical Field

The invention relates to the technical field of navigation satellite reflected signal remote sensing, in particular to a non-uniform chip real-time delay Doppler mapping data generator.

Background

The Navigation Satellite reflected signal remote sensing technology (GNSS-R) is a technology for performing inversion of physical parameters of the earth surface by using GNSS signals reflected by the earth surface. GNSS-R is a passive remote sensing technology. GNSS systems in operation today include beidou in china, GPS in the united states, galileo in europe and GLONASS in russia, in addition to some enhanced systems such as QZSS in japan and IRNSS in india. The satellites of the systems provide global rich signal sources for the GNSS-R technology, so that the GNSS-R becomes a remote sensing technology capable of providing global observation. The GNSS-R technology has all-weather observation capability because the GNSS-transmitted signals are in an L wave band and are slightly influenced by rainfall and cloud layers. In addition, the GNSS-R detector only passively receives the reflected signal and does not need to transmit a high-power detection signal, so that the GNSS-R detector is low in cost and can carry out networking observation, and data with high time resolution is provided. The method has important application prospect in the fields of sea surface height measurement, sea surface wind field measurement, typhoon monitoring, sea ice observation, soil humidity measurement and the like.

Delay Doppler Mapping (DDM) is a fundamental observation of GNSS-R techniques for inverting marine or terrestrial physical information, and is a two-dimensional map of chip-code Delay and carrier Doppler of the reflected signal. The code delay represents the phase offset of the locally generated pseudo-random code relative to the actual signal. The doppler shift then represents the frequency offset of the local carrier relative to the actual signal carrier. Figure 1 shows DDM data received in an airborne experiment. Sea surface height measurement can be carried out by measuring code delay of a DDM data peak value, the measured sea surface height data with the medium-scale and high time resolution has great research value in the field of ocean current change and oceanographic climate research, and tsunami can be forecasted by monitoring sea surface height change, so that loss caused by tsunami is reduced. Sea wind inversion can be carried out by measuring the power of the DDM, and the measured wind speed can be used for numerical weather forecast. Besides, the DDM data can be used for monitoring the evolution of sea ice, so that reliable data can be provided for the research of global climate. The DDM data in fig. 1 is processed on the ground, and the DDM with a large amount of redundant data is clipped, and actually the DDM data generated by the GNSS-R receiver contains a large amount of noise data.

As shown in fig. 2, to generate DDM data, a receiver is first located by using direct GNSS signals, and the positions of GNSS satellites are calculated by using satellite ephemeris in the GNSS signals; then, the position of a specular reflection point is predicted on an elliptical earth model of the WGS84 by utilizing the position information of the receiver and the GNSS satellite; then estimating code delay and carrier Doppler shift of the reflected signal according to the prediction result; generating a local pseudo-random code and a carrier signal according to the estimated code phase and carrier Doppler, and performing matched filtering; generating different code delay data through a shift register, and generating different Doppler shifts through FFT operation; and finally, obtaining DDM data through square operation.

Currently, the DDM data specifications generated by satellite-borne GNSS-R tasks such as TDS-1 in the united kingdom and CYGNSS in the united states are both 0.25 chip resolution, 122 chip resolution unit x 20 doppler resolution unit. Two main reasons for the longer sampling length in the code delay direction are that on one hand, signals reflected from an unsmooth ocean surface tend to expand greatly in the code delay direction; on the other hand, because the reflected GNSS signal power is weak, tracking can be performed only by using an open-loop algorithm, and in order to ensure that an effective signal can still be received when a prediction error is large, large redundancy is set in the code delay direction. Such a design may ensure that valid DDM data is received, but that a significant portion of the data is a useless noise signal. Meanwhile, in order to ensure sufficient redundancy in the chip direction, the resolution of the chip delay cannot be increased, because the high chip resolution is less tolerant to the open loop tracking error because of the same 122 chip resolution cells. But a lower chip resolution will have an impact on the inversion accuracy.

Disclosure of Invention

The present invention is directed to overcome the above technical defects, and a DDM data generator with high chip resolution is proposed to solve the existing limitation on the delay resolution of DDM data chips, and reduce the sampling of redundant data, and the calculation method can be implemented on an FPGA.

To achieve the above object, the present invention provides a non-uniform chip real-time delay doppler mapping data generator, comprising: a carrier generator, the data generator further comprising: the device comprises a controller, a code shift pulse generator with adjustable pulse intervals, M code generators, M code shift registers, M groups of correlator groups and a code delay error correction module;

the controller is used for setting the pulse interval of the code shift pulse generator and controlling the M groups of correlator groups;

the code shift pulse generator is used for generating code shift pulses with different pulse intervals and inputting the code shift pulses into the M code shift registers respectively;

the M code generators are used for generating M pseudo-random codes of the GNSS signals according to M different initial phases, and respectively inputting the M pseudo-random codes into the M code shift registers, wherein the values of the initial phases are related to predicted code phase errors and pulse intervals;

the M code shift registers are used for respectively caching M pseudo-random codes according to the code shift pulse and then outputting the M pseudo-random codes to the M groups of correlator groups;

the M groups of correlator groups are used for carrying out correlation operation on the reflected intermediate frequency signals, the carrier waves output by the carrier wave generator and the received pseudo-random codes sent by the corresponding code shift register to generate delay Doppler mapping data;

the code delay error correction module is used for searching the peak position in the delay Doppler mapping data, correcting the delay prediction code phase error and respectively inputting the corrected prediction code phase errors into the M code generators.

As an improvement of the above system, the data generator is implemented by an FPGA.

As an improvement of the above system, the controller sets the initial time interval of the code shift pulse generator to be half a chip, the code shift pulse generator performs matched filtering on the signal to obtain N code delay units, and then the controller sets the time interval of the code shift pulse generator to be a, where a is 0.5 chip, 0.25 chip or 0.125 chip.

As an improvement of the above system, the M different starting phases are:

setting the code start phase of the first group to

P is the predicted code phase, D is the predicted code phase error, the unit is a code chip, and the initial value is 0; v is the effective signal range, and the remaining initial phases of each group are set to

As an improvement of the above system, when the reflected signal is predicted, the phase difference between the first and second sets of start codes of the code shift register is set to be

The phase difference between the other two adjacent groups is set as

A code shift register having a start code phase always lagging a subsequent group than a previous group, the shift register having a first start code phase of

As an improvement of the above system, the first oneThe bank of correlators includes

The phase-to-phase converter is used for converting the phase-to-phase signal into a phase-to-phase signal,

indicating that rounding is to be done down, the remaining M-1 correlator banks all comprise

And a correlator.

As an improvement of the above system, the code delay error correction module is configured to search a peak position in the delay doppler mapping data, and correct a delay prediction code phase error, specifically:

searching for a peak position in the delay doppler mapping data, the peak position being a position of a maximum value in the delay doppler mapping data, the maximum value position being capable of being used to correct the delay prediction code phase error when the maximum value exceeds a set threshold: if the maximum value of DDM data is in the r-th chip resolution unit, the predicted code phase error D is

Otherwise, the predicted code phase error D is 0.

The invention has the advantages that:

1. compared with the existing DDM data generator with fixed resolution, the data generator can generate DDM data with any code delay resolution under ideal conditions, and the inversion precision can be improved by improving the chip resolution;

2. the data generator only improves the chip resolution ratio in the effective signal part, and simultaneously keeps a lower sampling rate in the noise part, thereby improving the proportion of the effective data in the whole data;

3. the data generator detects the open-loop prediction error through the code delay error correction module and corrects the open-loop prediction error so as to ensure the effective receiving of signals;

4. the data generator reduces the proportion of redundant data in a non-uniform sampling mode;

5. the data generator can adjust the resolution of the code delay direction according to the requirement of the inversion task, improve the resolution and sample the noise signal with lower resolution.

Drawings

FIG. 1 is an exemplary diagram of prior art DDM data;

FIG. 2 is a block diagram of a prior art DDM data generator;

FIG. 3 is a block diagram of the main part of a DDM data generator of the present invention;

FIG. 4 is a schematic diagram of overlapping code phase data.

Detailed Description

The invention is further illustrated with reference to the following figures and examples.

The invention provides a DDM (delay Doppler mapping) data generator based on an FPGA (field programmable gate array), in particular to a non-uniform chip DDM generator with adjustable code delay resolution. The DDM generator designed by the invention consists of M groups of correlators, open-loop prediction errors are corrected under coarse resolution through a code delay error correction module, then basic chip resolution is controlled by setting code shift pulses, and finally initial phases of the M groups of correlators are shifted to enable correlator output signals to be overlapped at effective signal parts so as to further improve code delay resolution.

The basic principle of DDM data generation is: and predicting parameters of a reflected signal by using positioning information of a receiver, and performing correlation operation and FFT (fast Fourier transform) square operation on locally generated pseudo-random codes and carrier waves with different phase delays and an input signal to finally obtain DDM (distributed data management) data. The code delay resolution-adjustable non-uniform chip real-time DDM generator has important application value in the field of GNSS-R research and application.

By grouping the correlators generating the DDM, the code delays of the correlators are uniformly controlled by the DPS, so that the correlator groups of different groups generate DDM data with different initial phases, and the data are overlapped on the effective data code delay, thereby generating higher-precision code resolution. To ensure that a valid signal is received, the signal code delay error is first calibrated with coarse chips before fine chip division is performed.

Parts 6 and 7 of fig. 2 are replaced by parts 14 and 15 of fig. 3, parts 10 and 11 of fig. 2 are replaced by the correlator 13 of fig. 3, and a code delay error correction module 16 is added in fig. 3.

An FPGA-based non-uniform chip real-time delay Doppler image generator with adjustable code delay resolution, comprising: the system comprises a carrier generator, a controller DSP, a code shift pulse generator with adjustable pulse intervals, M code generators, M code shift registers, M groups of correlator groups and a code delay error correction module; the resolution of the code delay direction can be adjusted according to the requirements of the inversion task, the resolution is improved, and meanwhile, the noise signals are sampled at a lower resolution.

And the carrier generator is used for generating a local carrier according to the carrier Doppler obtained by the reflected signal prediction and the signal standard intermediate frequency.

The controller DSP is used for setting the pulse interval of the code shift pulse generator and controlling the M groups of correlator groups;

the code shift pulse generator is used for generating code shift pulses with different pulse intervals and inputting the code shift pulses into the M code shift registers respectively;

the M code generators are used for generating M pseudo-random codes of the GNSS signals according to M different initial phases, and respectively inputting the M pseudo-random codes into the M code shift registers, wherein the values of the initial phases are related to predicted code phase errors and pulse intervals;

the M code shift registers are used for respectively caching M pseudo-random codes according to the code shift pulse and then outputting the M pseudo-random codes to the M groups of correlator groups;

the M groups of correlator groups are used for carrying out correlation operation on the reflected intermediate frequency signals, the carrier waves output by the carrier wave generator and the received pseudo-random codes sent by the corresponding code shift register to generate delay Doppler mapping data;

the code delay error correction module is used for searching the peak position in the delay Doppler mapping data, then correcting the delay prediction code phase error, and respectively inputting the corrected prediction code phase error D into M code generators.

Searching for a peak position in the delay doppler mapping data, the peak position being a position of a maximum value in the delay doppler mapping data, the maximum value position being capable of being used to correct the delay prediction code phase error when the maximum value exceeds a set threshold: if the maximum value of DDM data is in the r-th chip resolution unit, the predicted code phase error D is

Otherwise, the predicted code phase error D is 0.

As shown in FIG. 3, the correlator group 1 has M blocks in common, and M blocks of DDM data are formed by M sets of FPGA correlator groups, and the first set of correlator groups has

The phase-to-phase converter is used for converting the phase-to-phase signal into a phase-to-phase signal,

indicating rounding down, the remaining M-1 sets of correlator banks having

Correlator groups which are uniformly controlled by the DSP 17;

when the code phase P of the reflected signal is predicted, the difference between the initial code phases of the first and second groups of the code shift register 14 is first set by the DSP17 shown in fig. 3

The phase difference between the other two adjacent groups is set as

The code phase of the initial code of the chip and code shift register 14 always lags the former groupThe first set of start code phases of the memory 14 isThe time interval of the code shift pulse 15 is set to be half a chip, the signal is matched and filtered, at this time, N code delay units can be obtained, the code resolution is DDM data of half a chip, the data resolution is low, but the tolerance to the signal parameter prediction error is strong; through the peak value searching module 16, the offset of the actual reflection signal code phase relative to the predicted code phase is found and is corrected by the DSP 17; the code shift pulse generation interval of the M sets of correlator groups is then reduced by DSP17 control to increase chip resolution by noting a, while the code start phase of the first set is set to

Where P is the predicted code phase, D is the predicted code phase error, the unit is chip, v is the effective signal range, and the remaining set of start phases are set toBy setting such that the code delays in the vicinity of the effective signal overlap, the chip resolution in the vicinity of the effective signal is further improved while the sampling rate of the noise portion is kept low.

Since the number of delay units N is set to 122 and the number of correlator groups M is set to 2, each correlator group includes 61 correlators. The delay prediction error is corrected by setting the code phase difference of adjacent code shift registers to half a chip and then using a code delay error correction module. Then, the code phase difference between adjacent code shift registers is set to 8-th of a chip, the effective signal range v is set to 3 chips, the predicted code phase is 0, and the initial value of the delay prediction error D is 0, so that the initial phase of the code shift register of the first correlator group is set to 4.625 and the initial phase of the code shift register of the second correlator group is set to 2.9375. Thereby, DDM data with a code resolution of 16-th of a chip can be obtained while outside the effective signal area, the code resolution is 8-th of a chip.

Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. Although the present invention has been described in detail with reference to the embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention as defined in the appended claims.