阅读说明：本技术 数据的读取方法、装置、电子设备和存储介质 (Data reading method and device, electronic equipment and storage medium ) 是由 贺元魁 潘荣华 吴星星 于 2018-06-26 设计创作，主要内容包括：本发明实施例公开了一种数据的读取方法、装置、电子设备和存储介质。所述方法包括：在对选中字线对应的位线充电端充电至读取工作电压后,对选中字线及非选中字线的栅极施加第一设定时间的读取电压；根据位线的充电端的当前电压,从位线中筛选出擦除状态位线并确定擦除状态位线对应的存储单元所存储数据为1；对位线中除擦除状态位线以外的待确定位线的充电端充电至读取工作电压,不对擦除状态位线的充电端充电后,对选中字线以及非选中字线的栅极施加第二设定时间的读取电压；根据待确定位线的充电端当前电压,确定待确定位线对应的存储单元所存储数据。本发明实施例的技术方案实现了降低存储器的读取数据功耗,提高存储器读取数据的准确度。(The embodiment of the invention discloses a data reading method and device, electronic equipment and a storage medium. The method comprises the following steps: after the bit line charging end corresponding to the selected word line is charged to the reading working voltage, applying the reading voltage of a first set time to the grids of the selected word line and the unselected word line; screening an erasing state bit line from the bit lines according to the current voltage of the charging end of the bit line, and determining that the data stored in the storage unit corresponding to the erasing state bit line is 1; charging the charging ends of the bit lines to be determined except the bit line in the erasing state in the bit lines to a reading working voltage, and applying a reading voltage of a second set time to the gates of the selected word line and the unselected word line after the charging ends of the bit lines in the erasing state are not charged; and determining the data stored in the storage unit corresponding to the bit line to be determined according to the current voltage of the charging end of the bit line to be determined. The technical scheme of the embodiment of the invention realizes the reduction of the power consumption of the read data of the memory and improves the accuracy of the read data of the memory.)

1. A method for reading data, comprising:

after charging the charging end of each bit line corresponding to the selected word line to the reading working voltage, applying the reading voltage corresponding to the first set time to the grid of the selected word line and the grid of the unselected word line;

screening an erased bit line from the bit lines according to the current voltage of the charging end of each bit line, and determining that the data stored in the storage unit corresponding to the erased bit line is 1;

charging the charging end of the bit line to be determined except the bit line in the erasing state in each bit line to the reading working voltage again, and applying the reading voltages corresponding to the second set time to the grid of the selected word line and the grid of the unselected word line after not charging the charging end of the bit line in the erasing state;

and determining the data stored in the storage unit corresponding to the bit line to be determined according to the current voltage of the charging end of the bit line to be determined.

2. The method of claim 1, wherein the first set time is less than the second set time.

3. The method of claim 1, wherein the screening the bit lines for an erased state from the respective bit lines according to the current voltage of the charged terminal of the respective bit lines comprises:

and if the current voltage of the charging end is less than the set voltage threshold, determining that the bit line corresponding to the charging end is the bit line in the erasing state.

4. The method of claim 1, wherein the determining the data stored in the memory cell corresponding to the bit line to be determined according to the current voltage of the charging terminal of the bit line to be determined comprises:

if the current voltage of the charging end of the bit line to be determined is 0V, determining that the data stored in the storage unit corresponding to the bit line to be determined is 1;

and if the current voltage of the charging end of the bit line to be determined is greater than 0V, determining that the data stored in the storage unit corresponding to the bit line to be determined is 0.

5. An apparatus for reading data, comprising:

the first voltage applying module is used for applying reading voltages corresponding to a first set time to the grid of the selected word line and the grid of the unselected word line after the charging ends of the bit lines corresponding to the selected word line are charged to the reading working voltage;

the erasing state bit line determining module is used for screening the erasing state bit lines from the bit lines according to the current voltage of the charging end of each bit line and determining that the data stored in the storage unit corresponding to the erasing state bit line is 1;

a second voltage applying module, configured to charge the charging end of the bit line to be determined in each bit line except the bit line in the erase state to the read working voltage again, and apply, after the charging end of the bit line in the erase state is not charged, the read voltages corresponding to the gates of the selected word line and the gates of the unselected word lines for a second set time;

and the storage data determining module is used for determining the data stored in the storage unit corresponding to the bit line to be determined according to the current voltage of the charging end of the bit line to be determined.

6. The apparatus of claim 5, wherein the first set time is less than the second set time.

7. The apparatus of claim 5, wherein the erase state bit line determination module is specifically configured to:

and if the current voltage of the charging end is less than the set voltage threshold, determining that the bit line corresponding to the charging end is the bit line in the erasing state.

8. The apparatus of claim 5, wherein the stored data determination module comprises:

the first data determining unit is used for determining that the data stored in the storage unit corresponding to the bit line to be determined is 1 if the current voltage of the charging end of the bit line to be determined is 0V;

and the second data determination unit is used for determining that the data stored in the storage unit corresponding to the bit line to be determined is 0 if the current voltage of the charging end of the bit line to be determined is greater than 0V.

9. An electronic device, characterized in that the electronic device comprises:

one or more processors;

storage means for storing one or more programs;

when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-4.

10. A storage medium containing computer-executable instructions for performing the method of any one of claims 1-4 when executed by a computer processor.

Technical Field

The embodiment of the invention relates to the technical field of data reading of memories, in particular to a data reading method and device, electronic equipment and a storage medium.

Background

The Nand-flash memory is one of flash memories, has the advantages of large capacity, high rewriting speed and the like, is suitable for storing a large amount of data, and is widely applied in the industry, for example, embedded products comprise a digital camera, an MP3 walkman memory card, a small-sized U-disk and the like.

Disclosure of Invention

In view of this, embodiments of the present invention provide a method and an apparatus for reading data, an electronic device, and a storage medium, so as to optimize an existing method for reading data from a memory.

In a first aspect, an embodiment of the present invention provides a data reading method, including:

after charging the charging end of each bit line corresponding to the selected word line to the reading working voltage, applying the reading voltage corresponding to the first set time to the grid of the selected word line and the grid of the unselected word line;

screening an erased bit line from the bit lines according to the current voltage of the charging end of each bit line, and determining that the data stored in the storage unit corresponding to the erased bit line is 1;

charging the charging end of the bit line to be determined except the bit line in the erasing state in each bit line to the reading working voltage again, and applying the reading voltages corresponding to the second set time to the grid of the selected word line and the grid of the unselected word line after not charging the charging end of the bit line in the erasing state;

and determining the data stored in the storage unit corresponding to the bit line to be determined according to the current voltage of the charging end of the bit line to be determined.

In the above method, optionally, the first set time is less than the second set time.

In the foregoing method, optionally, the screening the bit lines in the erased state from the bit lines according to the current voltage of the charging terminal of the bit line includes:

and if the current voltage of the charging end is less than the set voltage threshold, determining that the bit line corresponding to the charging end is the bit line in the erasing state.

In the foregoing method, optionally, the determining, according to the current voltage of the charging terminal of the bit line to be determined, data stored in a memory cell corresponding to the bit line to be determined includes:

if the current voltage of the charging end of the bit line to be determined is 0V, determining that the data stored in the storage unit corresponding to the bit line to be determined is 1;

and if the current voltage of the charging end of the bit line to be determined is greater than 0V, determining that the data stored in the storage unit corresponding to the bit line to be determined is 0.

In a second aspect, an embodiment of the present invention provides an apparatus for reading data, including:

the first voltage applying module is used for applying reading voltages corresponding to a first set time to the grid of the selected word line and the grid of the unselected word line after the charging ends of the bit lines corresponding to the selected word line are charged to the reading working voltage;

the erasing state bit line determining module is used for screening the erasing state bit lines from the bit lines according to the current voltage of the charging end of each bit line and determining that the data stored in the storage unit corresponding to the erasing state bit line is 1;

a second voltage applying module, configured to charge the charging end of the bit line to be determined in each bit line except the bit line in the erase state to the read working voltage again, and apply, after the charging end of the bit line in the erase state is not charged, the read voltages corresponding to the gates of the selected word line and the gates of the unselected word lines for a second set time;

and the storage data determining module is used for determining the data stored in the storage unit corresponding to the bit line to be determined according to the current voltage of the charging end of the bit line to be determined.

In the above apparatus, optionally, the first set time is less than the second set time.

In the foregoing device, optionally, the erase state bit line determining module is specifically configured to:

and if the current voltage of the charging end is less than the set voltage threshold, determining that the bit line corresponding to the charging end is the bit line in the erasing state.

In the above apparatus, optionally, the stored data determining module includes:

the first data determining unit is used for determining that the data stored in the storage unit corresponding to the bit line to be determined is 1 if the current voltage of the charging end of the bit line to be determined is 0V;

and the second data determination unit is used for determining that the data stored in the storage unit corresponding to the bit line to be determined is 0 if the current voltage of the charging end of the bit line to be determined is greater than 0V.

In a third aspect, an embodiment of the present invention provides an electronic device, including:

one or more processors;

storage means for storing one or more programs;

when executed by the one or more processors, cause the one or more processors to implement a method according to any one of the embodiments of the invention.

In a fourth aspect, embodiments of the present invention provide a storage medium containing computer-executable instructions for performing a method according to any one of the embodiments of the present invention when executed by a computer processor.

The embodiment of the invention provides a data reading method, a data reading device, electronic equipment and a storage medium, wherein a data reading process is divided into two data reading processes with different time lengths, most of bit lines in an erasing state are screened out in the first data reading process through a short first set time, and conventional data reading is performed on the rest of the bit lines for a second set time in the second data reading process, so that the technical defects that in the prior art, a memory is high in power consumption and easy to have data reading errors in the data reading process are overcome, the data reading power consumption of the memory is reduced, and the data reading accuracy of the memory is improved.

Drawings

Fig. 1 is a flowchart of a data reading method according to an embodiment of the present invention;

fig. 2 is a flowchart of a data reading method according to a second embodiment of the present invention;

fig. 3 is a structural diagram of a data reading apparatus according to a third embodiment of the present invention;

fig. 4 is a structural diagram of an electronic device according to a fourth embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in further detail below with reference to the accompanying drawings. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention.

It should be further noted that, for the convenience of description, only some but not all of the relevant aspects of the present invention are shown in the drawings. Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the operations (or steps) as a sequential process, many of the operations can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.