阅读说明：本技术 层叠陶瓷电子部件及其制造方法和电路板 (Multilayer ceramic electronic component, method for manufacturing same, and circuit board ) 是由 松下邦博 笹木隆 于 2021-04-23 设计创作，主要内容包括：本发明提供能够没有问题地高密度安装的层叠陶瓷电子部件、高密度地安装有该层叠陶瓷电子部件的电路板和层叠陶瓷电子部件的制造方法。本发明的一个方式所涉及的层叠陶瓷电子部件包括陶瓷主体和外部电极。上述陶瓷主体具有朝向第1方向的端面和从上述端面露出并在与上述第1方向正交的第2方向上层叠的内部电极。上述外部电极设置于上述端面,具有2个凸部,该2个凸部在上述端面的与上述第1方向和上述第2方向正交的第3方向上的2个周缘部分别形成并向上述第1方向突出。(The invention provides a laminated ceramic electronic component which can be mounted at high density without any problem, a circuit board on which the laminated ceramic electronic component is mounted at high density, and a method for manufacturing the laminated ceramic electronic component. A laminated ceramic electronic component according to an embodiment of the present invention includes a ceramic body and an external electrode. The ceramic body has an end face facing a 1 st direction and internal electrodes exposed from the end face and laminated in a 2 nd direction orthogonal to the 1 st direction. The external electrode is provided on the end surface, and has 2 convex portions, and the 2 convex portions are formed on 2 peripheral portions of the end surface in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction, and protrude in the 1 st direction.)

1. A laminated ceramic electronic component, comprising:

a ceramic body having an end face facing a 1 st direction and internal electrodes exposed from the end face and laminated in a 2 nd direction orthogonal to the 1 st direction; and

and an external electrode provided on the end surface, the external electrode having 2 convex portions, the 2 convex portions being formed on 2 peripheral portions of the end surface in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction and protruding in the 1 st direction, respectively.

2. The laminated ceramic electronic component according to claim 1, wherein:

the dimension of each of the 2 projections in the 3 rd direction is 15 μm or more and 60 μm or less.

3. The laminated ceramic electronic component according to claim 1 or 2, wherein:

the 2 projections each have a dimension in the 1 st direction of 10 to 20 μm.

4. The laminated ceramic electronic component according to any one of claims 1 to 3, wherein:

the 2 convex portions respectively include a top portion that protrudes most toward the 1 st direction in a cross section viewed from the 2 nd direction,

the distance between the tops of the 2 projections in the 3 rd direction is 250 [ mu ] m or more and 285 [ mu ] m or less.

5. A circuit board, comprising:

a mounting substrate having a mounting surface;

2 laminated ceramic electronic components arranged side by side in a 1 st direction, each of the laminated ceramic electronic components including a ceramic body having an end face facing the 1 st direction and internal electrodes exposed from the end face and laminated in a 2 nd direction orthogonal to the 1 st direction, and external electrodes connected to the mounting face and provided on the end face; and

a solder that bonds a surface of the external electrode to the mounting surface,

the external electrode has a convex portion formed along a peripheral edge portion of the end surface and protruding in the 1 st direction.

The distance between the external electrodes of the 2 laminated ceramic electronic components in the 1 st direction is 100 [ mu ] m or less.

6. The circuit board of claim 5, wherein:

the external electrode has 2 convex portions, and the 2 convex portions are formed on 2 peripheral edge portions in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction of the end surface, respectively, and protrude in the 1 st direction.

7. A method for manufacturing a laminated ceramic electronic component, characterized in that:

producing a ceramic body having an end face facing a 1 st direction and internal electrodes exposed from the end face and laminated in a 2 nd direction orthogonal to the 1 st direction,

an external electrode having 2 convex portions is formed on the end face, wherein the 2 convex portions are formed respectively on 2 peripheral portions in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction of the end face and protrude in the 1 st direction.

8. The method of manufacturing a laminated ceramic electronic component according to claim 7, wherein:

a recessed portion formed in a central portion in the 3 rd direction and 2 protruding portions respectively located outside the recessed portion in the 3 rd direction and protruding in the 1 st direction are formed on the end surface,

the 2 convex portions of the external electrode are formed on the 2 convex portions of the end surface, respectively.

Technical Field

The present invention relates to a laminated ceramic electronic component, a circuit board on which the laminated ceramic electronic component is mounted, and a method for manufacturing the laminated ceramic electronic component.

Background

As shown in patent document 1, for example, a laminated ceramic electronic component such as a laminated ceramic capacitor is electrically connected to an electrode pad on a printed circuit board by solder. The solder bonds the surface of the external electrode of the laminated ceramic electronic component to the electrode pad.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open No. 2014-197572 (paragraphs [0101] [0102], FIGS. 4 and 5)

Disclosure of Invention

Technical problem to be solved by the invention

In recent years, multilayer ceramic electronic components are sometimes mounted on a substrate at high density. When the mounting density is high, there is a possibility that the solders formed on the external electrodes of the adjacent laminated ceramic electronic components are fused to each other, causing a problem such as a short circuit.

In view of the above circumstances, an object of the present invention is to provide a laminated ceramic electronic component that can be mounted at high density without any problem, a circuit board on which the laminated ceramic electronic component is mounted at high density, and a method for manufacturing the laminated ceramic electronic component.

Technical solution for solving technical problem

In order to achieve the above object, a laminated ceramic electronic component according to one embodiment of the present invention includes a ceramic body and an external electrode.

The ceramic body has an end face facing a 1 st direction and internal electrodes exposed from the end face and laminated in a 2 nd direction orthogonal to the 1 st direction.

The external electrode is provided on the end surface, and has 2 convex portions, and the 2 convex portions are formed on 2 peripheral portions of the end surface in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction, and protrude in the 1 st direction.

The multilayer ceramic electronic component is mounted on the substrate by soldering the external electrodes to the substrate. In the above configuration, since the outer electrode has the convex portions along 2 peripheral portions in the 3 rd direction, the surface area of the outer electrode is larger than that in the configuration in which the central portion is convex. Since the solder wets the surface of the external electrode, the solder wets the surfaces of the 2 convex portions, and the thickness of the solder can be made thinner as compared with a structure in which the central portion is convex. Therefore, even when soldering is performed in a state where the external electrodes of the plurality of laminated ceramic electronic components are close to each other in the 1 st direction, the thickness of the solder on both external electrodes can be restricted, and the solder can be prevented from being fused with each other. This enables high-density mounting without any problem.

For example, the dimension of each of the 2 projections in the 3 rd direction may be 15 μm or more and 60 μm or less.

For example, the dimension of each of the 2 projections in the 1 st direction may be 10 μm or more and 20 μm or less.

For example, the 2 projections may each include a peak portion that protrudes most in the 1 st direction in a cross section viewed from the 2 nd direction,

the distance between the tops of the 2 projections in the 3 rd direction is 250 [ mu ] m to 285 [ mu ] m.

A circuit board according to another aspect of the present invention includes a mounting substrate having a mounting surface, 2 laminated ceramic electronic components, and solder.

The 2 laminated ceramic electronic components are arranged in the 1 st direction, and each have a ceramic body having an end face facing the 1 st direction and internal electrodes exposed from the end face and laminated in the 2 nd direction orthogonal to the 1 st direction, and an external electrode connected to the mounting surface and provided on the end face.

The solder bonds the surface of the external electrode to the mounting surface.

The external electrode has a convex portion formed along a peripheral edge portion of the end surface and protruding in the 1 st direction.

The distance between the external electrodes of the 2 laminated ceramic electronic components in the 1 st direction is 100 μm or less.

In the above configuration, since the outer electrode has the convex portion along the peripheral portion, the surface area of the outer electrode is larger than that in the configuration in which the central portion is convex. Since the solder wets the surface of the external electrode, the solder wets the surface of the convex portion, and thus the thickness of the solder can be made thinner as compared with a structure in which the central portion is convex. Therefore, even when the external electrodes of 2 laminated ceramic electronic components are soldered at a distance of 100 μm or less in the 1 st direction, the thickness of the solder on both external electrodes can be limited, and the solder can be prevented from being bonded to each other. This enables high-density mounting.

For example, the external electrode may have 2 convex portions, and the 2 convex portions may be formed on 2 peripheral portions of the end surface in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction and protrude in the 1 st direction.

A method for manufacturing a laminated ceramic electronic component according to still another aspect of the present invention includes a step of manufacturing a ceramic body having an end face facing a 1 st direction and internal electrodes exposed from the end face and laminated in a 2 nd direction orthogonal to the 1 st direction.

An external electrode having 2 convex portions formed on the end surface, the 2 convex portions being formed on 2 peripheral portions of the end surface in a 3 rd direction orthogonal to the 1 st direction and the 2 nd direction and protruding in the 1 st direction, respectively.

In addition, a concave portion formed at a central portion in the 3 rd direction and 2 convex portions respectively located outside the concave portion in the 3 rd direction and protruding in the 1 st direction may be formed on the end surface,

the 2 convex portions of the external electrode are formed on the 2 convex portions of the end surface, respectively.

Effects of the invention

As described above, according to the present invention, it is possible to provide a laminated ceramic electronic component which can be mounted at high density without problems, a circuit board on which the laminated ceramic electronic component is mounted at high density, and a method for manufacturing the laminated ceramic electronic component.

Drawings

Fig. 1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention.

Fig. 2 is a sectional view of the laminated ceramic capacitor taken along line a-a' of fig. 1.

Fig. 3 is a sectional view of the laminated ceramic capacitor taken along line B-B' of fig. 1.

Fig. 4 is a plan view of the laminated ceramic capacitor.

Fig. 5 is a sectional view showing a circuit board on which the multilayer ceramic capacitor is disposed.

Fig. 6 is a plan view of the circuit board.

Fig. 7 is a plan view of the circuit board according to the comparative example of the above embodiment.

Fig. 8 is a flowchart showing the method for manufacturing the multilayer ceramic capacitor.

Fig. 9 is a perspective view showing a process of manufacturing the multilayer ceramic capacitor.

Fig. 10 is a plan view showing a process of manufacturing the multilayer ceramic capacitor.

Fig. 11 is a plan view showing a process of manufacturing the multilayer ceramic capacitor.

Fig. 12 is a perspective view showing a process of manufacturing the multilayer ceramic capacitor.

Fig. 13 is a perspective view of a multilayer ceramic capacitor according to another embodiment of the present invention.

Description of the reference numerals

10. 20 … … laminated ceramic capacitor (laminated ceramic electronic component)

11 … … ceramic body

11a … … end face

14. 24 … … external electrode

18. 28 … … convex part

50 … … mounting substrate

51 … … mounting surface

60 … … solder.

Detailed Description

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

In the figure, X, Y, and Z axes orthogonal to each other are appropriately shown. The X, Y and Z axes are the same in all figures.

1. Structure of multilayer ceramic capacitor 10

Fig. 1 to 3 show a multilayer ceramic capacitor 10 according to an embodiment of the present invention. Fig. 1 is a perspective view of a multilayer ceramic capacitor 10. Fig. 2 is a sectional view of the laminated ceramic capacitor 10 taken along line a-a' of fig. 1. Fig. 3 is a sectional view of the laminated ceramic capacitor 10 taken along line B-B' of fig. 1.

The laminated ceramic capacitor 10 includes a ceramic main body 11 and an external electrode 14.

The ceramic body 11 has 2 end faces 11a facing the X-axis direction, 2 side faces 11b facing the Y-axis direction, and 2 main faces 11c facing the Z-axis direction. An external electrode 14 is provided on the end face 11 a. The edge portions connecting the respective surfaces of the ceramic body 11 may be chamfered. Each surface of the ceramic body 11 is not limited to a flat surface, and may be a curved surface or a surface having irregularities. For example, the end surface 11a may have a shape in which a peripheral edge portion in the Y-axis direction protrudes in the X-axis direction, as will be described later.

The ceramic body 11 has a capacitance forming portion 16 and a protection portion 17. The capacitor-forming portion 16 has a plurality of 1 st internal electrodes 12 and a plurality of 2 nd internal electrodes 13, which are alternately laminated in the Z-axis direction via a plurality of ceramic layers 15. The protective portion 17 covers the surface of the capacitance forming portion 16 on the side of the main surface 11c facing the Z-axis direction and the surface on the side of the side surface 11b facing the Y-axis direction.

The 1 st internal electrode 12 is drawn out to one end face 11a with a space from the other end face 11 a. The 2 nd internal electrode 13 is drawn out to the other end face 11a with a space from the end face 11a from which the 1 st internal electrode 12 is drawn out.

The internal electrodes 12 and 13 are typically made of nickel (Ni) as a main component, and function as internal electrodes of the multilayer ceramic capacitor 10. The internal electrodes 12 and 13 may contain copper (Cu), silver (Ag), palladium (Pd), or the like as a main component in addition to nickel.

The ceramic layer 15 is formed of a dielectric ceramic. In order to increase the capacitance of the capacitance forming portion 16, the ceramic layer 15 is formed of a dielectric ceramic having a high dielectric constant.

Barium titanate (BaTiO) is used as the high-dielectric-constant dielectric ceramic₃) Polycrystalline body of the material-like, i.e., polycrystalline body of perovskite structure containing barium (Ba) and titanium (Ti). This makes it possible to obtain a multilayer ceramic capacitor 10 having a large capacitance.

The ceramic layer 15 may be made of strontium titanate (SrTiO)₃) Calcium titanate (CaTiO)₃) Magnesium titanate (MgTiO)₃) Calcium zirconate analog (CaZrO)₃) Class i, calcium zirconate titanate (Ca (Zr, Ti) O₃) Barium zirconate like (BaZrO)₃) Titanium oxide (TiO)₂) Class, etc.

The protection portion 17 is also formed of a dielectric ceramic. The material forming the protective portion 17 may be any insulating ceramic, but by using the same dielectric ceramic as the ceramic layer 15, internal stress in the ceramic main body 11 can be suppressed.

The protection portion 17 covers the surface of the capacitance forming portion 16 other than the end surface 11 a. The protective portion 17 mainly protects the periphery of the capacitor forming portion 16, and has a function of ensuring insulation of the internal electrodes 12 and 13. Hereinafter, the region on the main surface 11c side of the protective portion 17 is referred to as a cover region, and the region on the side surface 11b side is referred to as a side edge region.

The external electrode 14 is provided on the end face 11a and extends to the main face 11c and the side face 11 b. One external electrode 14 is connected to the 1 st internal electrode 12 at one end surface 11a, and the other external electrode 14 is connected to the 2 nd internal electrode 13 at the other end surface 11 a.

Hereinafter, the detailed structure of the external electrode 14 will be described.

2. Detailed structure of external electrode 14

Fig. 4 is a plan view of the multilayer ceramic capacitor 10 viewed from the Z-axis direction.

As shown in fig. 1 and 4, the external electrode 14 has a first surface 14a facing the X-axis direction, a second surface 14b facing the Y-axis direction, and a third surface 14c facing the Z-axis direction. The first surface 14a is formed on the end surface 11 a. The second surface 14b is formed on the side surface 11b in the present embodiment. The third surface 14c is formed on the main surface 11c in the present embodiment.

As shown in fig. 1 and 4, the external electrode 14 has 2 convex portions 18 which are formed along 2 peripheral portions of the end surface 11a in the Y-axis direction, respectively, and which protrude in the X-axis direction. The peripheral edge portion in the Y-axis direction of the end surface 11a is a portion that is located at the peripheral edge in the Y-axis direction of the end surface 11a and extends in the Z-axis direction along the outer edge of the end surface 11 a. The 2 projections 18 are also configured to extend in the Z-axis direction on the first surface 14 a.

Each of the projections 18 includes a peak 18a that protrudes most in the X-axis direction in a cross section viewed from the Z-axis direction. Each apex portion 18a is also configured to extend in the Z-axis direction. The shape of the top portion 18a is not particularly limited, and for example, the top portion 18a may be a curved surface having a convex shape, or the top portion 18a may be a sharp projection. The position of the apex 18a is not limited to the center of the projection 18 in the Y axis direction, and may be shifted in the Y axis direction.

In the present embodiment, the external electrode 14 further has a central portion 19 on the first surface 14a, which is located between 2 convex portions 18 spaced apart in the Y-axis direction. The central portion 19 has a substantially flat structure in the present embodiment, but may have minute irregularities having a projection amount of 1 μm or less in the X-axis direction, for example.

Since the external electrode 14 has 2 convex portions 18 spaced apart from each other in the Y-axis direction, the surface area of the external electrode 14 can be increased. This can reduce the thickness of the solder covering the surface of the external electrode 14 when mounted on a mounting board, as will be described later.

The width D1 of each projection 18 in the Y-axis direction can be, for example, 15 μm or more. This can sufficiently secure the width D1 of each projection 18, and can sufficiently secure the surface area of the projection 18. The width D1 of each projection 18 is the dimension of the largest portion of each projection 18 in the Y-axis direction.

The ratio D1/W of the width D1 to the width W of the multilayer ceramic capacitor 10 can be, for example, 0.02 or more. The width W of the multilayer ceramic capacitor 10 is the largest dimension in the Y-axis direction of the multilayer ceramic capacitor 10.

The width D1 can be 60 μm or less, for example, and the ratio D1/W of the width D1 to the width W of the multilayer ceramic capacitor 10 can be 0.20 or less, for example.

The distance D2 in the Y-axis direction between the top portions 18a of the 2 projections 18 can be 250 μm or more, for example. This makes it possible to sufficiently space the tops 18a of the projections 18 in the Y-axis direction, thereby suppressing local concentration of solder. The distance D2 is the distance between the tops 18a of the 2 projections 18, which is the portion with the largest distance in the Y-axis direction.

The ratio D2/W of the distance D2 to the width W of the multilayer ceramic capacitor 10 can be, for example, 0.30 or more. The distance D2 can be, for example, 285 μm or less, and the ratio D2/W of the distance D2 to the width W of the multilayer ceramic capacitor 10 can be, for example, 0.95 or less.

The height dimension D3 of the top portion 18a in the X-axis direction can be, for example, 10 μm or more. This allows the projection 18 to sufficiently project, and the surface area of the projection 18 to be sufficiently ensured. The height dimension D3 of the apex portion 18a is the height dimension in the X-axis direction from the portion of the central portion 19 having the thinnest thickness in the X-axis direction to the apex portion 18 a.

The ratio D3/D4 of the height D3 to the thickness D4 of the central portion 19 can be, for example, 0.25 or more. Referring to fig. 2, a thickness dimension D4 of the central portion 19 is a thickness dimension of a portion of the central portion 19 having the thinnest thickness in the X-axis direction.

The height D3 may be 20 μm or less, for example, and the ratio D3/D4 of the height D3 to the thickness D4 of the central portion 19 may be 0.50 or less, for example.

The external electrode 14 having the above structure is connected to the mounting substrate by solder, whereby a circuit board having the multilayer ceramic capacitor 10 can be configured.

3. Structure of circuit board 100

Fig. 5 and 6 are diagrams showing the circuit board 100 according to the present embodiment. Fig. 5 is a sectional view of the circuit board 100 at a position corresponding to fig. 2. Fig. 6 is a plan view of the circuit board 100 viewed from the Z-axis direction.

The circuit board 100 includes a mounting substrate 50 having a mounting face 51, at least 2 laminated ceramic capacitors 10, and solder 60. Fig. 5 is a cross-sectional view of a portion of the circuit board 100 where 1 multilayer ceramic capacitor 10 is mounted. Fig. 6 shows a case where 2 laminated ceramic capacitors 10 are arranged side by side, but the circuit board 100 may have 3 or more laminated ceramic capacitors 10.

The mounting surface 51 includes pads 52 connected to the external electrodes 14. The pad 52 is a metal terminal in the shape of a spacer disposed on the mounting surface 51, and is, for example, rectangular. The pads 52 are provided, for example, 1 for each of the external electrodes 14. Although not shown, the mounting surface 51 is covered with an insulating solder resist (solder resist), for example.

The multilayer ceramic capacitor 10 is disposed on the mounting surface 51 in a posture in which, for example, the one principal surface 11c faces the mounting surface 51. As shown in fig. 6, 2 laminated ceramic capacitors 10 are arranged side by side in the X-axis direction. The distance D5 in the X-axis direction between the external electrodes 14 of the 2 multilayer ceramic capacitors 10 is, for example, 100 μm or less, and more preferably 80 μm or less. The distance D5 is the distance between the external electrodes 14 of the adjacent 2 laminated ceramic capacitors 10 at the narrowest portion in the X-axis direction.

The solder 60 bonds the surface of the external electrode 14 to the mounting surface 51. The solder 60 is disposed between the pad 52 and the third surface 14c of the external electrode 14, and is formed to extend to the second surface 14b of the external electrode 14 and the first surface 14a having the convex portion 18.

The circuit board 100 is manufactured, for example, as follows. First, a solder paste is applied to the pad 52 of the mounting substrate 50, and the multilayer ceramic capacitor 10 is disposed on the solder paste. In this state, the solder paste is heated and melted in a reflow furnace. As the solder paste melts, the multilayer ceramic capacitor 10 sinks toward the pad 52. Thereby, the solder paste wets from the third surface 14c of the external electrode 14 to the first surface 14a and the second surface 14 b. After that, the solder paste is cooled and solidified to form the solder 60 connecting the external electrodes 14 and the mounting substrate 50, and the circuit board 100 shown in fig. 5 and 6 is manufactured.

Here, when the molten solder paste reaches the first surface 14a, the molten solder paste flows from a portion having small undulations in the X-axis direction to a convex portion. That is, the solder paste is branched from the central portion 19 to the 2 convex portions 18, and covers the convex portions 18. Thus, with the multilayer ceramic capacitor 10, local concentration of the solder paste can be suppressed. In addition, the surface area on the external electrode 14 can be increased by the 2 projections 18. Therefore, the thickness of the solder 60 on the first surface 14a can be suppressed.

Fig. 7 is a diagram showing the circuit board 300 according to the comparative example of the present embodiment, and is a plan view of the circuit board 300 viewed from the Z-axis direction. In the circuit board 300, the same components as those of the circuit board 100 are denoted by the same reference numerals, and description thereof is omitted.

The circuit board 300 includes a mounting substrate 50 having a mounting face 51, at least 2 laminated ceramic capacitors 30, and solder 70. The circuit board 300 has the same mounting substrate 50 as the circuit board 100, but the laminated ceramic capacitor 30 has a different structure from the circuit board 100.

The laminated ceramic capacitor 30 includes a ceramic main body 31 and 2 external electrodes 34. The external electrode 34 has a first surface 34a facing the X-axis direction, a second surface 34b facing the Y-axis direction, and a third surface 34c facing the Z-axis direction. The first surface 34a is formed to have a Y-axis center portion projecting in the X-axis direction.

In the circuit board 300, since the arrangement of the pads 52 on the mounting surface 51 is the same as that of the circuit board 100, the distance D6 in the X-axis direction between the adjacent external electrodes 34 is substantially the same as the distance D5 on the circuit board 100. The amount of solder paste applied to form solder 70 is substantially the same as the amount of solder paste applied to form solder 60.

When the molten solder paste reaches the first surface 34a during the production of the circuit board 300, the solder paste flows from the Y-axis direction peripheral edge portion of the first surface 34a toward the convex Y-axis direction central portion. Thus, the solder paste is easily concentrated in the center portion in the Y axis direction, and the solidified solder 70 has a shape that is raised thickly in the center portion in the Y axis direction. When the distance D6 is smaller than 100 μm, the solder 70 formed on the adjacent multilayer ceramic capacitors 30 is likely to be fused at the center portion in the Y axis direction, as shown in fig. 7. When the solders 70 of the different multilayer ceramic capacitors 30 are fused, electrical problems such as short-circuiting may occur in addition to problems in appearance.

On the other hand, in the present embodiment, since the molten solder paste flows so as to cover the surfaces of 2 convex portions 18, the amount of protrusion of the solder 60 of 1 convex portion 18 is small when the amount of solder paste used is substantially the same as the amount of solder 70. That is, in the present embodiment, the surface area of the first surface 14a can be increased, and the solder 60 can be prevented from being locally concentrated, and the thickness of the solder 60 can be suppressed. Thus, even when the multilayer ceramic capacitor 10 is mounted at a high density so that the distance D5 becomes 100 μm or less, it is possible to prevent problems such as fusion of the adjacent solders 60.

Therefore, in the present embodiment, the problem of the solder 60 formed on the adjacent multilayer ceramic capacitors 10 being fused together can be suppressed, and the problem of the appearance and the electrical problem such as short circuit can be suppressed.

Such a multilayer ceramic capacitor 10 can be manufactured, for example, as follows.

4. Method for manufacturing multilayer ceramic capacitor 10

Fig. 8 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor 10. Fig. 9 to 12 show a process for manufacturing the multilayer ceramic capacitor 10. Hereinafter, a method for manufacturing the multilayer ceramic capacitor 10 will be described with reference to fig. 8 and fig. 9 to 12 as appropriate.

4.1 step S01: ceramic sheet lamination

In step S01, a laminated sheet 104 is formed by laminating the 1 st ceramic sheet 101, the 2 nd ceramic sheet 102, and the 3 rd ceramic sheet 103 as shown in fig. 9.

The ceramic sheets 101, 102, 103 are formed as unfired dielectric green sheets containing a dielectric ceramic as a main component. In the 1 st ceramic sheet 101, the 1 st unfired internal electrode 112 is formed. In the 2 nd ceramic sheet 102, the 2 nd internal electrode 113 is formed unfired. In the 3 rd ceramic sheet 103, no internal electrode was formed.

Fig. 10 is a top view of the ceramic sheets 101, 102. At this stage, the ceramic sheets 101 and 102 are formed as large-sized sheets that are not singulated. Fig. 10 shows cutting lines Lx, Ly1, Ly2 when the monolithic ceramic multilayer capacitor 10 is divided into individual pieces. The cut line Lx is parallel to the X axis and the cut lines Ly1 and Ly2 are parallel to the Y axis.

The internal electrodes 112 and 113 can be formed by applying an arbitrary conductive paste to the ceramic sheets 101 and 102. The method of applying the conductive paste can be arbitrarily selected from known techniques. For example, in the application of the conductive paste, a screen printing method or a gravure printing method can be used.

Each of the internal electrodes 112, 113 on the ceramic sheets 101, 102 is formed in a substantially rectangular shape extending in the X-axis direction across 1 cutting line Ly1 or Ly 2. The internal electrodes 112 and 113 are cut at the cutting lines Ly1, Ly2, and Lx to form the internal electrodes 12 and 13 of the multilayer ceramic capacitor 10. The cut lines Ly1, Ly2 correspond to the end surfaces 11a of the laminated ceramic capacitors 10. The cutting line Lx corresponds to the side face 11b of each laminated ceramic capacitor 10.

In the 1 st ceramic sheet 101, the 1 st column and the 2 nd column are alternately arranged in the Y axis direction, wherein the 1 st column is a column in which the internal electrodes 112 extending across the cutting line Ly1 are arranged in the X axis direction, and the 2 nd column is a column in which the internal electrodes 112 extending across the cutting line Ly2 are arranged in the X axis direction. In column 1, the internal electrodes 112 adjacent to each other in the X-axis direction face each other with the cut line Ly2 interposed therebetween. In column 2, the internal electrodes 112 adjacent to each other in the X-axis direction face each other with the cut line Ly1 interposed therebetween. That is, in the 1 st and 2 nd columns adjacent to each other in the Y axis direction, the internal electrodes 112 are arranged so as to be shifted by 1 chip in the X axis direction.

The internal electrode 113 on the 2 nd ceramic sheet 102 is also configured in the same manner as the internal electrode 112. However, in the 2 nd ceramic sheet 102, the internal electrode 113 of the column corresponding to the 1 st column of the 1 st ceramic sheet 101 extends across the cutting line Ly2, and the internal electrode 113 of the column corresponding to the 2 nd column of the 1 st ceramic sheet 101 extends across the cutting line Ly 1. That is, the internal electrodes 113 and the internal electrodes 112 are formed to be offset by 1 chip in the X-axis direction or the Y-axis direction.

As shown in fig. 9, the 1 st ceramic sheet 101 and the 2 nd ceramic sheet 102 are alternately laminated in the Z-axis direction. The laminated body of the ceramic sheets 101 and 102 corresponds to the capacitor-forming portion 16 that is not fired. The 3 rd ceramic sheet 103 is laminated on the upper and lower surfaces in the Z-axis direction of the laminated body of the ceramic sheets 101 and 102. The laminated body of the 3 rd ceramic sheet 103 corresponds to the coverage area of the unfired protective portion 17.

The laminated ceramic sheets 101, 102, 103 are pressed and integrated. Thereby, a large-sized laminate sheet 104 can be produced.

4.2 step S02: formation of through-hole H

In step S02, through holes H penetrating in the Z-axis direction are formed in the dicing lines Ly1 and Ly2 of the laminate sheet 104.

Fig. 11 is a plan view of the laminate sheet 104 as viewed from the Z-axis direction. As shown in fig. 11, the through-holes H extend over the dicing lines Ly1 and Ly2 of the laminate sheet 104, and are formed so as not to straddle the dicing line Lx. That is, the through hole H is formed in the Y-axis direction center portion of the region of the laminated sheet 104 corresponding to the end face 11a of each laminated ceramic capacitor 10.

The through hole H is formed by cutting with a drill or the like, for example. Alternatively, the through hole H may be formed by laser processing. The shape of the through hole H is not limited to the oblong shape shown in the drawing, and can be appropriately adjusted according to the shape of a projection 111d of the end surface 111a described later, and the like.

4.3 step S03: cutting of

In step S03, the laminate sheet 104 obtained in step S02 is cut along the cutting lines Lx, Ly1, Ly2, thereby producing an unfired ceramic body 111.

Fig. 12 is a perspective view of the ceramic main body 111 obtained in step S03.

As shown in the figure, the unfired ceramic body 111 has 2 end faces 111a facing the X-axis direction, 2 side faces 111b facing the Y-axis direction, and 2 main faces 111c facing the Z-axis direction. Further, the unfired ceramic body 111 has: an unfired capacitor forming portion 116 in which unfired internal electrodes 112, 113 are alternately laminated in the Z-axis direction; and an unfired protective portion 117 around the capacitance forming portion 116.

The end surface 111a has: a concave portion 111e formed at the center in the Y-axis direction; and 2 projections 111d which are located outside the recesses 111e in the Y-axis direction and project in the X-axis direction, respectively. The concave portion 111e is a concave portion formed by the through hole H in the present embodiment. In the present embodiment, the convex portion 111d is a portion protruding in the X axis direction from the concave portion 111e, corresponding to a region on the cutting lines Ly1 and Ly2 where the through hole H is not formed.

The projecting top portion of the projection 111d is not limited to the substantially flat configuration shown in fig. 12, and may be a curved surface having a convex shape or may project sharply. The dimensions of the projections 111d can be appropriately set according to the dimensions of the projections 18 of the external electrode 14.

4.4 step S04: firing

In step S04, the unfired ceramic body 111 obtained in step S03 is fired to produce the ceramic body 11 shown in fig. 1 to 4. The firing can be performed, for example, in a reducing atmosphere or in an atmosphere with a low oxygen partial pressure. The ceramic body 11 after firing may be chamfered by barrel polishing or the like. Thus, the convex portion of the fired end face 11a also has a rounded shape.

4.5 step S05: external electrode 14 formation

In step S05, the external electrodes 14 are formed on the ceramic body 11 obtained in step S04, thereby producing the multilayer ceramic capacitor 10 shown in fig. 1 to 4.

In step S05, first, the conductive paste is applied so as to cover one end surface 11a of the ceramic body 11, and the conductive paste is applied so as to cover the other end surface 11a of the ceramic body 11. The conductive paste applied to the ceramic body 11 is subjected to a baking treatment in a reducing atmosphere or a low oxygen partial pressure atmosphere, for example, to form a base film on the ceramic body 11. Then, a plating film is formed on the base film baked on the ceramic body 11 by plating treatment such as electroplating, thereby completing the external electrode 14.

The conductive paste for forming the external electrode 14 is applied in a shape conforming to the end surface 11a including the convex portion. Thus, the base film to which the conductive paste is fired also has a shape having convex portions formed along 2 peripheral portions in the Y-axis direction of the end surface 11 a. The plating film on the base film is also formed to have a convex shape following the base film. That is, 2 convex portions 18 of the external electrode 14 are formed on 2 convex portions of the end surface 11 a.

Further, a part of the processing in step S05 may be performed before step S04. For example, an unfired electrode material may be applied to both end surfaces 111a of the unfired ceramic body 111 before step S04, and the unfired electrode material may be fired at step S04 simultaneously with firing of the unfired ceramic body 111 to form the base layer of the external electrode 14. Alternatively, the ceramic body 111 after binder removal treatment may be fired simultaneously with application of an unfired electrode material.

5. Other embodiments

For example, the external electrode 14 is not limited to the shape having 2 projections 18.

Fig. 13 is a perspective view showing a multilayer ceramic capacitor 20 according to another embodiment of the present invention. Note that, in the laminated ceramic capacitor 20, the same components as those in embodiment 1 are denoted by the same reference numerals, and description thereof is omitted.

The multilayer ceramic capacitor 20 includes a ceramic body 11 and external electrodes 24, and the structure of the external electrodes 24 is different from that of the external electrodes 14 of the above embodiment.

The external electrode 24 has a convex portion 28 formed along the peripheral edge portion of the end surface 11a and protruding in the X-axis direction. Specifically, the convex portion 28 includes: a 1 st convex portion 28a formed along 2 peripheral edge portions in the Y-axis direction of the end surface 11 a; and a 2 nd convex portion 28b formed along 2 peripheral edge portions in the Z-axis direction of the end face 11 a. The 1 st projection 28a and the 2 nd projection 28b of the projections 28 are connected and configured in a ring shape.

The surface area of the external electrode 24 is larger than that of the external electrode 34 of the multilayer ceramic capacitor 30 shown in fig. 7 due to the annular convex portion 28. Thus, the area of the solder paste to be wetted is increased when the solder paste is mounted on the mounting board, and the thickness of the solder can be suppressed. Therefore, even when the multilayer ceramic capacitor 20 is mounted on the mounting substrate at high density, such a problem as fusion of adjacent solders can be prevented.

While the embodiments of the present invention have been described above, it is needless to say that the present invention is not limited to the above-described embodiments, and various modifications can be added within a range not departing from the gist of the present invention.

For example, the method for manufacturing the multilayer ceramic capacitor 10 is not limited to the above-described method. For example, the external electrodes 14 shown in fig. 1 to 4 can be formed by applying the conductive paste only to the peripheral edge portion in the Y axis direction of the end face 11a after forming the substantially rectangular parallelepiped ceramic body 11 having no convex portion 111d, and then applying the conductive paste to the entire end face 11 a. Alternatively, the external electrodes 14 shown in fig. 1 to 4 may be formed by applying the conductive paste to the entire end surface 11a after forming the substantially rectangular parallelepiped ceramic body 11 without the convex portion 111d, and then applying the conductive paste only to the peripheral edge portion in the Y-axis direction of the end surface 11 a.

In addition, although the laminated ceramic capacitors 10 and 20 have been described as an example of the laminated ceramic electronic component in the above embodiments, the present invention can be applied to all laminated ceramic electronic components having a pair of external electrodes. Examples of such a multilayer ceramic electronic component include a chip varistor, a chip thermistor, and a multilayer inductor.