Light emitting diode and preparation method thereof, display device

文档序号:1760484 发布日期:2019-11-29 浏览:7次 中文

阅读说明:本技术 发光二极管及其制作方法、显示装置 (Light emitting diode and preparation method thereof, display device ) 是由 孟虎 于 2019-06-25 设计创作,主要内容包括:一种发光二极管及其制作方法、显示装置,其中,发光二极管包括:第一半导体层;第二半导体层;发光层,设置于第一半导体层和第二半导体层之间;阻挡层,设置于第一半导体层和第二半导体层中的至少一者的侧面的至少部分区域上,阻挡层被配置为在阻挡层与所述侧面的至少部分区域之间形成电荷耗尽区。(A kind of light emitting diode and preparation method thereof, display device, wherein light emitting diode includes: the first semiconductor layer;Second semiconductor layer;Luminescent layer is set between the first semiconductor layer and the second semiconductor layer;Barrier layer is set on at least partly region of the side of at least one of the first semiconductor layer and the second semiconductor layer, and barrier layer is configured as forming charge depletion area between barrier layer and at least partly region of the side.)

1. a kind of light emitting diode, comprising:

First semiconductor layer;

Second semiconductor layer;

Luminescent layer is set between first semiconductor layer and second semiconductor layer;

Barrier layer is set at least portion of the side of at least one of first semiconductor layer and second semiconductor layer On subregion, the barrier layer is configured as forming charge consumption between the barrier layer and at least partly region of the side Area to the greatest extent.

2. light emitting diode according to claim 1, wherein first semiconductor layer is p type semiconductor layer, described the Two semiconductor layers are n type semiconductor layer;

The barrier layer includes the first barrier layer being covered on at least partly region of the side of the p type semiconductor layer, institute The work function for stating the first barrier layer is less than the work function of the p type semiconductor layer.

3. light emitting diode according to claim 2, wherein first barrier layer includes:

First main part is covered on the side of the p type semiconductor layer;

The first extension connecting with first main part close to the side of the luminescent layer, first extension are covered on In the side of the luminescent layer on the partial region of the p type semiconductor layer;In a master perpendicular to the luminescent layer On the direction on surface, there is gap between first extension and the n type semiconductor layer.

4. light emitting diode according to claim 3, wherein first barrier layer further include:

The second extension connecting with first main part far from the side of the luminescent layer, second extension are covered on On the fringe region of main surface of the p type semiconductor layer far from the luminescent layer.

5. light emitting diode according to claim 2, wherein a main table of first barrier layer in the luminescent layer Orthographic projection on face is in closed frame shape.

6. light emitting diode according to claim 2, wherein the workfunction range on first barrier layer be 4.0eV~ 5.5eV。

7. light emitting diode according to claim 2, wherein the work function on first barrier layer is partly led with the p-type The absolute value of difference between the work function of body layer is greater than or equal to 0.3eV.

8. light emitting diode according to claim 2, wherein the material on first barrier layer includes metal, conduction At least one of metal oxide, graphene and metallic carbon nanotubes.

9. light emitting diode according to claim 1 or 2, wherein first semiconductor layer is p type semiconductor layer, institute Stating the second semiconductor layer is n type semiconductor layer;

The barrier layer includes the second barrier layer being covered on at least partly region of the side of the n type semiconductor layer, institute The work function for stating the second barrier layer is greater than the work function of the n type semiconductor layer.

10. light emitting diode according to claim 9, wherein second barrier layer is determined by the luminescent layer Orthographic projection in plane is in closed frame shape.

11. light emitting diode according to claim 9, wherein the workfunction range on second barrier layer be 4.5eV~ 5.1eV。

12. light emitting diode according to claim 9, wherein the work function on second barrier layer is partly led with the N-type The absolute value of difference between the work function of body layer is greater than or equal to 0.3eV.

13. light emitting diode according to claim 9, wherein the material on second barrier layer includes metal, conduction At least one of metal oxide, graphene and metallic carbon nanotubes.

14. light emitting diode according to claim 1, wherein first semiconductor layer is p type semiconductor layer, described Second semiconductor layer is n type semiconductor layer;

The barrier layer includes the first barrier layer being covered on at least partly region of the side of the p type semiconductor layer, with And be covered on the n type semiconductor layer side at least partly region on the second barrier layer;

On the direction of a main surface perpendicular to the luminescent layer, between first barrier layer and second barrier layer With gap.

15. light emitting diode according to claim 1, wherein second semiconductor layer has body region and second Electrode settings area, the part in the body region of second semiconductor layer and the luminescent layer and described the first half Conductor layer overlapping, the part in the second electrode setting area of second semiconductor layer not with the luminescent layer and institute State the overlapping of the first semiconductor layer;

The light emitting diode further include:

Substrate is set to the side of second semiconductor layer far from the luminescent layer;

First electrode is set in the main surface of first semiconductor layer far from the luminescent layer;

Second electrode is set in the second electrode setting area of second semiconductor layer.

16. a kind of production method of light emitting diode, comprising:

Substrate is provided;

The second semiconductor layer, luminescent layer and the first semiconductor layer are sequentially formed over the substrate;

First semiconductor layer is patterned, the light emitting region in the light emitting diode of first semiconductor layer is removed Edge part;

There is the side of patterned first semiconductor layer to form the first barrier film in the formation of the substrate;

First barrier film is patterned, the side for being covered on patterned first semiconductor layer in first barrier film is made The part in face is retained, and forms the first barrier layer;Wherein, the first barrier layer is configured as on first barrier layer and described the Charge depletion area is formed between semi-conductor layer.

17. production method according to claim 16, wherein the patterning first semiconductor layer the step of it Afterwards, further includes:

It carries out patterning used exposure mask using to first semiconductor layer, the luminous zone is in the luminescent layer The part at the edge in domain performs etching, and etching depth is less than the thickness of the luminescent layer.

18. production method according to claim 17, wherein in the step of the patterning first barrier film, institute It states and is covered on the main surface fringe region that patterned first semiconductor layer is in the light emitting region in the first barrier film Part be retained.

19. production method according to claim 16, wherein before forming the luminescent layer, further includes:

Second semiconductor layer is patterned, the portion at the edge in the light emitting region of second semiconductor layer is removed Point;

There is the side of patterned second semiconductor layer to form the second barrier film in the formation of the substrate;

Second barrier film is patterned, the side for being covered on patterned second semiconductor layer in first barrier film is made Part is retained, and forms the second barrier layer;Wherein, second barrier layer is configured as on second barrier layer and described the Charge depletion area is formed between two semiconductor layers.

20. a kind of display device, comprising:

Drive substrate;

Be installed on multiple light emitting diodes of the drive substrate side, each light emitting diode be as claim 1~ Light emitting diode described in any one of 15, and each light emitting diode is electrically connected with the drive substrate.

Technical field

This disclosure relates to field of display technology more particularly to a kind of light emitting diode, light emitting diode production method and Display device with light emitting diode.

Background technique

In recent years, self-luminous display technology micro-led (Micro LED) novel as one kind, by extensive Concern.However, the external quantum efficiency of light emitting diode will occur when the size of light emitting diode smaller (being, for example, less than 10 μm) Apparent relaxation phenomenon, and size is smaller, external quantum efficiency is lower.

Summary of the invention

On the one hand, a kind of light emitting diode is provided, comprising: the first semiconductor layer;Second semiconductor layer;Luminescent layer, if It is placed between the first semiconductor layer and the second semiconductor layer;Barrier layer is set in the first semiconductor layer and the second semiconductor layer The side of at least one at least partly region on, barrier layer is configured as at least partly area on barrier layer and the side Charge depletion area is formed between domain.

In some embodiments, the first semiconductor layer is p type semiconductor layer, and the second semiconductor layer is n type semiconductor layer;Resistance Barrier includes the first barrier layer being covered on at least partly region of the side of p type semiconductor layer, the work content on the first barrier layer Number is less than the work function of p type semiconductor layer.

In some embodiments, the first barrier layer includes: the first main part, is covered on the side of p type semiconductor layer;With The first extension that first main part is connected close to the side of luminescent layer, the first extension is covered on close in the side of luminescent layer On the partial region of p type semiconductor layer;In the direction perpendicular to a main surface of luminescent layer, the first extension and N-type half There is gap between conductor layer.

In some embodiments, the first barrier layer further include: connect with the first main part far from the side of luminescent layer Two extensions, the second extension are covered on fringe region of the p type semiconductor layer far from the main surface of luminescent layer.

In some embodiments, orthographic projection of first barrier layer in a main surface of luminescent layer is in closed frame shape.

In some embodiments, the workfunction range on the first barrier layer is 4.0eV~5.5eV.

In some embodiments, the difference between the work function on the first barrier layer and the work function of p type semiconductor layer is exhausted 0.3eV is greater than or equal to value.

In some embodiments, the material on the first barrier layer includes metal, conductive metal oxide, graphene and metal At least one of property carbon nanotube.

In some embodiments, the first semiconductor layer is p type semiconductor layer, and the second semiconductor layer is n type semiconductor layer;Resistance Barrier includes the second barrier layer being covered on at least partly region of the side of n type semiconductor layer, the work content on the second barrier layer Number is greater than the work function of n type semiconductor layer.

In some embodiments, the orthographic projection in the plane determined by luminescent layer of the second barrier layer is in closed frame shape.

In some embodiments, the workfunction range on the second barrier layer is 4.5eV~5.1eV.

In some embodiments, the difference between the work function on the second barrier layer and the work function of n type semiconductor layer is exhausted 0.3eV is greater than or equal to value.

In some embodiments, the material on the second barrier layer includes metal, conductive metal oxide, graphene and metal At least one of property carbon nanotube.

In some embodiments, the first semiconductor layer is p type semiconductor layer, and the second semiconductor layer is n type semiconductor layer;Resistance Barrier includes the first barrier layer being covered on at least partly region of the side of p type semiconductor layer, and, it is covered on N-type half The second barrier layer on at least partly region of the side of conductor layer;In the direction perpendicular to a main surface of luminescent layer, There is gap between first barrier layer and the second barrier layer.

In some embodiments, the second semiconductor layer has body region and second electrode setting area, the second semiconductor The part in body region of layer is Chong Die with luminescent layer and the first semiconductor layer, and the second semiconductor layer is set in second electrode The part for setting region is not Chong Die with luminescent layer and the first semiconductor layer.Light emitting diode further include: substrate is set to the second half and leads Side of the body layer far from luminescent layer;First electrode is set to the first semiconductor layer far from the main surface of luminescent layer;Second electricity Pole is set in the second electrode setting area of the second semiconductor layer.

On the other hand, a kind of production method of light emitting diode is provided, comprising: provide substrate;Successively shape on substrate At the second semiconductor layer, luminescent layer and the first semiconductor layer;Patterned first semiconductor layer, the first semiconductor layer of removal are in The part at the edge of the light emitting region of light emitting diode;There is the side of patterned first semiconductor layer to be formed in the formation of substrate First barrier film;The first barrier film is patterned, the side for being covered on patterned first semiconductor layer in the first barrier film is made Part is retained, and forms the first barrier layer;Wherein, the first barrier layer be configured as the first barrier layer and the first semiconductor layer it Between formed charge depletion area.

In some embodiments, after the patterned first semiconductor layer the step of, further includes: use is to the first semiconductor Layer carries out patterning used exposure mask, performs etching to the part at the edge in light emitting region of luminescent layer, etching depth Less than the thickness of luminescent layer.

In some embodiments, in the step of patterning the first barrier film, patterned the is covered in the first barrier film The part that semi-conductor layer is in the main surface fringe region of light emitting region is retained.

In some embodiments, before forming luminescent layer, further includes: the second semiconductor layer of patterning, removal the second half The part at the edge in light emitting region of conductor layer;There is the side of patterned second semiconductor layer to be formed in the formation of substrate Second barrier film;The second barrier film is patterned, the side for being covered on patterned second semiconductor layer in the first barrier film is made Part is retained, and forms the second barrier layer;Wherein, the second barrier layer be configured as the second barrier layer and the second semiconductor layer it Between formed charge depletion area.

In another aspect, providing a kind of display device, comprising: drive substrate;The multiple of drive substrate side are installed on to shine Diode, each light emitting diode are and each light emitting diode and driving such as the light emitting diode in above-mentioned any embodiment Substrate electrical connection.

Detailed description of the invention

In order to illustrate more clearly of the technical solution in the embodiment of the present disclosure, will make below to required in embodiment description Attached drawing is briefly described.It should be evident that the accompanying drawings in the following description is only some embodiments of the present disclosure, for For those of ordinary skill in the art, it is also possible to obtain other drawings based on these drawings.

Fig. 1 is provides a kind of top view of light emitting diode according to some embodiments of the present disclosure;

Fig. 2 is the sectional view along A-A of light emitting diode in Fig. 1;

Fig. 3 is provides the schematic cross-sectional view of another light emitting diode according to some embodiments of the present disclosure;

Fig. 4 is provides the schematic cross-sectional view of another light emitting diode according to some embodiments of the present disclosure;

Fig. 5 is provides a kind of flow diagram of the production method of light emitting diode according to some embodiments of the present disclosure;

Fig. 6~Figure 14 is that each step of the production method of the light emitting diode provided according to some embodiments of the disclosure is illustrated Figure;

Figure 15~Figure 18 is each step schematic diagram on the second barrier layer of production provided according to some embodiments of the disclosure;

Figure 19 is provides a kind of structural schematic diagram of display device according to some embodiments of the present disclosure;

Figure 20 is provides the structural schematic diagram of another display device according to some embodiments of the present disclosure.

Specific embodiment

Below in conjunction with attached drawing, some embodiments of the present disclosure are described.Obviously, described embodiment is only Disclosure a part of the embodiment, instead of all the embodiments.Based on the embodiment in the disclosure, those of ordinary skill in the art Every other embodiment obtained belongs to the range of disclosure protection.

Term " first ", " second " be used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or Implicitly indicate the quantity of indicated technical characteristic." first " is defined as a result, the feature of " second " can be expressed or imply Ground includes one or more of the features.In the description of the embodiment of the present disclosure, unless otherwise indicated, the meaning of " plurality " is Two or more.

In the description of the embodiment of the present disclosure, it should be noted that unless otherwise clearly defined and limited, term " peace Dress ", " connected ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integrally Connection;It can be directly connected, the connection inside two elements can also be can be indirectly connected through an intermediary.For For those skilled in the art, the concrete meaning of above-mentioned term in the disclosure can be understood with concrete condition.

After the size reduction of light emitting diode, the ratio that the leakage current of the side wall of light emitting diode accounts for total current rises, Most of carrier carries out transition by the non-radiative recombination mechanism of sidewall surfaces, thus when the size of light emitting diode compared with Hour, when being, for example, less than 10 μm, apparent relaxation phenomenon will occur in the external quantum efficiency of light emitting diode, and size is smaller, outside Quantum efficiency is lower.

In the related art, prepared using the dry etch process of mitigation it is micro-led, or it is miniature shine Passivation film is prepared on the side wall of diode, to reduce the defect of micro-led side and the density in complex centre. However, the dry etch process mitigated will cause to micro-led film layer carry out patterned process uniformity and Line width is deteriorated, and prepares passivation film and usually requires to carry out high-temperature annealing process, this causes to micro-led side The reducing effect of defect and complex centre density is poor, causes sidewall surfaces leakage current still larger, micro-led External quantum efficiency cannot be obviously improved.

Referring to Fig. 1 and Fig. 2, some embodiments of the present disclosure provide a kind of light emitting diode 100, including the first semiconductor Layer 10, luminescent layer 20, the second semiconductor layer 30 and barrier layer 40.

Wherein, luminescent layer 20 is set between the first semiconductor layer 10 and the second semiconductor layer 30.Illustratively, the first half One of conductor layer 10 and the second semiconductor layer 30 are p type semiconductor layer, and another one is n type semiconductor layer.When to luminous two After pole pipe 100 adds voltage, the electronics in n type semiconductor layer will be migrated to luminescent layer 20, and enter luminescent layer 20;P-type half The hole of conductor layer is also migrated to luminescent layer 20, and enters luminescent layer 20.Occur into the electronics in luminescent layer 20 with hole It is compound, to generate spontaneous emission light.Herein, illustratively, luminescent layer 20 is multiple quantum well layer (MQW, Multiple Quantum Well)。

(such as scheme the side that barrier layer 40 is set at least one of the first semiconductor layer 10 and the second semiconductor layer 30 The side 10A of first semiconductor layer shown in 2) at least partly region on, and barrier layer 40 is configured as on barrier layer Charge depletion area 70 is formed between 40 and at least partly region of the side.In this way, due to there are charge depletion area 70, the first half The carrier (hole and/or electronics) moved in conductor layer 10 and/or the second semiconductor layer 30 will be far from at least portion of the side Subregion makes at least partly region of the side be less prone to electric leakage to realize the transverse current limitation of light emitting diode Stream, improves the external quantum efficiency of light emitting diode.

It should be noted that charge depletion area 70 is a high resistance area.Since there are charge depletion areas 70, so that first At least partly region of carrier (hole and/or electronics) in semiconductor layer 10 and/or the second semiconductor layer 30 to the side When movement, need to overcome Schottky barrier.To which the carrier for moving these is concentrated mainly on at least portion far from the side Subregional position, therefore may be implemented to inhibit the transverse direction of Injection Current, carrier is reduced in at least partly area of the side The non-radiative recombination that domain is formed by defect and complex centre helps to improve the luminous efficiency of light emitting diode 100.

There are many structures and set-up mode on barrier layer 40, including but not limited to following multiple barrier layers for implementing to exemplify 40 structure and set-up mode.

In some embodiments, as shown in Fig. 2, the first semiconductor layer 10 is p type semiconductor layer 101, the second semiconductor layer 30 be n type semiconductor layer 301.Barrier layer 40 includes on at least partly region for the side 10A for being covered on p type semiconductor layer 101 The first barrier layer 40A, the work function of the first barrier layer 40A is less than the work function of p type semiconductor layer 101.

It designs in this way, during the first barrier layer 40A and p type semiconductor layer 101 reach thermally equilibrated, the first barrier layer Electronics in 40A will be moved into p type semiconductor layer 101, to form built in field and semiconductor energy gap bending.And when the After one barrier layer 40A and p type semiconductor layer 101 reach thermal balance, the two fermi level is consistent, in the first barrier layer 40A Between p type semiconductor layer 101, the electronics in the first barrier layer 40A forms electricity in conjunction with the hole in p type semiconductor layer 101 Lotus depletion region 70, that is, form high resistance area.

Since there are charge depletion area 70, the hole current distribution in p type semiconductor layer 101 will change, i.e. hole Electric current is concentrated mainly on the interior body region of p type semiconductor layer 101, therefore the lateral of injection hole current may be implemented and inhibit, and prevents Only hole current forms non-radiative recombination because of defect and complex centre in the side 10A of p type semiconductor layer 101, reduces this At least partly region of side 10A generates the phenomenon that leakage current, to improve the external quantum efficiency of light emitting diode, that is, improves The luminous efficiency of light emitting diode.

Illustratively, as shown in Fig. 2, the first barrier layer 40A includes the first main part 401 and the first extension 402.

Wherein, the first main part 401 is covered on the side 10A of p type semiconductor layer 101.In such manner, it is possible in the first main body Charge depletion area 70 is formed between portion 401 and the entire side 10A of p type semiconductor layer 101, so as to preferably realize injection Lateral the phenomenon that inhibiting, improving the side 10A leakage current of p type semiconductor layer 101 of electric current.

First extension 402 is connected with the first main part 401 close to the side of luminescent layer 20, and the first extension 402 covers It covers in the side in luminescent layer 20 on the partial region of p type semiconductor layer 101.It designs in this way, makes side 10A close to luminous One end of layer 20 is less prone to leakage phenomenon, and advantageously reduces the difficulty of processing of the first barrier layer 40A.

On the direction (X-direction shown in Fig. 2) of a main surface perpendicular to luminescent layer 20, the first extension 402 and N There is gap d between type semiconductor layer 3011.The first barrier layer 40A and the mutual shadow of n type semiconductor layer 301 can be prevented in this way It rings, makes to can produce reliable and stable charge depletion area between the first barrier layer 40A and p type semiconductor layer 101.

On this basis, illustratively, as shown in Fig. 2, the first barrier layer 40A further includes separate with the first main part 401 Second extension 403 of the side connection of luminescent layer 20, the second extension 403 are covered on p type semiconductor layer 101 far from luminescent layer On the fringe region of 20 main surface 10B.It designs in this way, side 10A is made to be less prone to leakage current close to one end of main surface 10B Phenomenon, and advantageously reduce the difficulty of processing of the first barrier layer 40A.

Illustratively, as depicted in figs. 1 and 2, the first barrier layer 40A on a main surface 20A of luminescent layer 20 just Projection is in closed frame shape.In such manner, it is possible to the shape between the first barrier layer 40A and the entire side 10A of p type semiconductor layer 101 Improve the side of p type semiconductor layer 101 at charge depletion area 70 so as to preferably realize that the lateral of Injection Current inhibits The phenomenon that 10A leakage current, improves the luminous efficiency of light emitting diode 100.

Herein, it should be noted that orthographic projection of the first barrier layer 40A on a main surface 20A of luminescent layer 20 is simultaneously It is not limited in closed frame shape.For example, the first barrier layer 40A includes at least two parts, at least two parts are partly led around p-type for this The side of body layer 101 is successively spaced setting and arrangement one week.

Illustratively, the material of the first barrier layer 40A includes metal, conductive metal oxide, graphene and metallicity At least one of carbon nanotube etc..For example, the first barrier layer 40A is the metal layer of 200nm~300nm thickness or the metal of conduction Oxide skin(coating);In another example the first barrier layer 40A is one or two layers graphene.

In some possible designs, the workfunction range of the first barrier layer 40A is 4.0eV~5.5eV.Within the scope of this Material includes but is not limited to titanium, aluminium, silver, indium, molybdenum, copper, chromium, gold etc..Workfunction range by the first barrier layer 40A is 4.0eV~5.5eV allows the work function of the first barrier layer 40A to be less than the work function (P-type semiconductor of p type semiconductor layer 101 The workfunction range of layer 101 is usually 6eV~7eV), therefore can be in the side of the first barrier layer 40A and p type semiconductor layer 101 Charge depletion area 70 is formed between the 10A of face, realizes the leakage phenomenon for improving the side 10A of p type semiconductor layer 101.

On this basis, illustratively, between the work function of the first barrier layer 40A and the work function of p type semiconductor layer 101 Difference absolute value be greater than or equal to 0.3eV.In this way, make to be formed between the first barrier layer 40A and p type semiconductor layer 101 The Schottky barrier with higher of charge depletion area 70, so as to effectively prevent the hole current in p type semiconductor layer 101 From its side, 10A is leaked out, stability and reliability with higher.

In further embodiments, as shown in figure 3, barrier layer 40 includes the side 30A for being covered on n type semiconductor layer 301 At least partly region on the second barrier layer 40B, the work function of the second barrier layer 40B is greater than the work content of n type semiconductor layer 301 Number.

It designs in this way, during the second barrier layer 40B and n type semiconductor layer 301 reach thermally equilibrated, N-type semiconductor Electronics in layer 301 will be moved into the second barrier layer 40B, to form built in field and semiconductor energy gap bending.And work as After second barrier layer 40B and n type semiconductor layer 301 reach thermal balance, the two fermi level is consistent, on the second barrier layer Between 40B and n type semiconductor layer 301, the electronics in n type semiconductor layer 301 is formed in conjunction with the hole in the second barrier layer 40B Charge depletion area 70, that is, form high resistance area.

Since there are charge depletion area 70, the electronic current distribution in n type semiconductor layer 301 will change, i.e. electronics Electric current is concentrated mainly on the interior body region of n type semiconductor layer 301, therefore the lateral of injection electronic current may be implemented and inhibit, and prevents Only electronic current forms non-radiative recombination because of defect and complex centre in the side 30A of n type semiconductor layer 301, reduces this At least partly region of side 30A generates the phenomenon that leakage current, to improve the external quantum efficiency of light emitting diode, that is, improves The luminous efficiency of light emitting diode.

Illustratively, as shown in figure 3, the second barrier layer 40B is covered on the entire side 30A of n type semiconductor layer 301. Charge depletion area 70 can be formed between the second barrier layer 40B and the entire side 30A of n type semiconductor layer 301 in this way, thus It can preferably realize lateral the phenomenon that inhibiting, improving the side 30A leakage current of n type semiconductor layer 301 of Injection Current.

On this basis, illustratively, as shown in figure 3, close to N in the side of the second barrier layer 40B covering luminescent layer 20 On the partial region of type semiconductor layer 301.It designs in this way, side 30A is made to be less prone to leakage current close to one end of luminescent layer 20 Phenomenon, and advantageously reduce the difficulty of processing of the second barrier layer 40B.

On the direction (X-direction shown in Fig. 3) of a main surface perpendicular to luminescent layer 20, the second barrier layer 40B and P There is gap d between type semiconductor layer 1012.The second barrier layer 40B and the mutual shadow of p type semiconductor layer 101 can be prevented in this way It rings, makes to can produce reliable and stable charge depletion area between the second barrier layer 40B and n type semiconductor layer 301.

Illustratively, as shown in figure 3, orthographic projection of the second barrier layer 40B on a main surface 20A of luminescent layer 20 is in Closed frame shape.In such manner, it is possible to form charge between the second barrier layer 40B and the entire side 30A of n type semiconductor layer 301 Depletion region 70 improves the side 30A electric leakage of n type semiconductor layer 301 so as to preferably realize that the lateral of Injection Current inhibits The phenomenon that stream, improves the luminous efficiency of light emitting diode 100.

Herein, it should be noted that orthographic projection of the second barrier layer 40B on a main surface 20A of luminescent layer 20 is simultaneously It is not limited in closed frame shape.For example, the first barrier layer 40A includes at least two parts, at least two parts are partly led around N-type for this The side 30A of body layer 301 is successively spaced setting and arrangement one week.

Illustratively, the material of the second barrier layer 40B includes metal, conductive metal oxide, graphene and metallicity At least one of carbon nanotube.For example, the second barrier layer 40B is the metal layer of 200nm~300nm thickness or the metal oxygen of conduction Compound layer;In another example the second barrier layer 40B is one or two layers graphene.

Illustratively, the workfunction range of the second barrier layer 40B is 4.5eV~5.1eV.Material within the scope of this include but It is not limited to molybdenum, copper, chromium, gold, nickel etc..It is 4.5eV~5.1eV by the workfunction range of the second barrier layer 40B, makes the second blocking The work function of layer 40B can be greater than the work function of n type semiconductor layer 301, and (workfunction range of n type semiconductor layer 301 is usually 4.0eV~4.2eV), therefore charge consumption can be formed between the second barrier layer 40B and the side 30A of n type semiconductor layer 301 Area 70 to the greatest extent realizes the leakage phenomenon for improving the side 30A of n type semiconductor layer 301.

On this basis, illustratively, between the work function of the second barrier layer 40B and the work function of n type semiconductor layer 301 Difference absolute value be greater than or equal to 0.3eV.In this way, make to be formed between the second barrier layer 40B and n type semiconductor layer 301 The Schottky barrier with higher of charge depletion area 70, so as to effectively prevent the electronic current in n type semiconductor layer 301 From its side, 30A is leaked out, stability and reliability with higher.

In further embodiments, as shown in figure 4, barrier layer 40 includes the side 10A for being covered on p type semiconductor layer 101 At least partly region on the first barrier layer 40A, and, be covered on the side 30A of n type semiconductor layer 301 at least partly The second barrier layer 40B on region.In this way, can be realized simultaneously at least partly region and the side for reducing the side 10A At least partly region of face 30A generates the phenomenon that leakage current, to improve the external quantum efficiency of light emitting diode, is shone with improving The luminous efficiency of diode.

Illustratively, as shown in figure 4, in the direction (side X shown in Fig. 4 of a main surface perpendicular to luminescent layer 20 To) on, there is gap d between the first barrier layer 40A and the second barrier layer 40B3.For example, can be by luminescent layer 20 by first Barrier layer 40A is separated with the second barrier layer 40B.At this moment, the second barrier layer 40B is not covered in the side of luminescent layer 20 close to N The partial region of type semiconductor layer 301.It designs in this way, the first barrier layer 40A and the second mutual shadow of barrier layer 40B can be prevented It rings, makes between the first barrier layer 40A and p type semiconductor layer 101, and, between the second barrier layer 40B and n type semiconductor layer 301 It can produce reliable and stable charge depletion area.

Referring to figs. 1 to 4, in some embodiments, the second semiconductor layer 30 has body region M1It is set with second electrode Set region M2, the second semiconductor layer 30 be in body region M1Part it is Chong Die with luminescent layer 20 and the first semiconductor layer 10, Two semiconductor layers 30 are in second electrode setting area M2Part it is not Chong Die with luminescent layer 20 and the first semiconductor layer 10.

As shown in Figure 1 to 4, light emitting diode 100 further includes substrate 80, first electrode 50 and second electrode 60.

Wherein, substrate 80 is set to the second side of the semiconductor layer 30 far from luminescent layer 20.By the way that substrate 80 is arranged, it is convenient for Form the second semiconductor layer 30, luminescent layer 20 and the first semiconductor layer 10 being sequentially overlapped.Illustratively, such as Fig. 2~Fig. 4 institute Show, substrate includes Sapphire Substrate 801 and the buffer layer 802 between Sapphire Substrate 801 and the second semiconductor layer 30.

First electrode 50 is set to the first semiconductor layer 10 far from the main surface 10B of luminescent layer 20, and second electrode 60 is set It is placed in the second electrode setting area M of the second semiconductor layer 302It is interior.In this way, can be by first electrode 50 to the first semiconductor Carrier (one of hole and electronics) is injected in layer 10, and load is injected into the second semiconductor layer 30 by second electrode 60 Flow sub (the other of hole and electronics).

Wherein, illustratively, as shown in Figure 2 to 4, when the first semiconductor layer 10 is p type semiconductor layer 101, the second half When conductor layer 30 is n type semiconductor layer 301, first electrode 50 is anode, and second electrode 60 is cathode.

It should be noted that herein, the first semiconductor layer 10 is in p type semiconductor layer 101 and n type semiconductor layer 301 One, the second semiconductor layer 30 are the other of p type semiconductor layer 101 and n type semiconductor layer 301.When the first semiconductor layer 10 be n type semiconductor layer 301, and when the second semiconductor layer 30 is p type semiconductor layer 101, referring to fig. 2~Fig. 4 is covered on N-type half The second barrier layer 40B of the side 30A of conductor layer 301, including similar with the second extension 403 of the first barrier layer 40A Structure.

Referring to Fig. 5, some embodiments of the disclosure provide a kind of production method of light emitting diode, which includes step Rapid 901~step 905.

Step 901, as shown in fig. 6, providing substrate 80.

Wherein, substrate 80 plays a supportive role, each layer that can make to be subsequently formed (such as the first semiconductor layer, the second half Conductor layer and luminescent layer etc.) stability and reliability with higher.Illustratively, substrate 80 includes 801 He of Sapphire Substrate Buffer layer 802 positioned at 801 side of Sapphire Substrate.

Step 902, as shown in fig. 7, sequentially forming the second semiconductor layer 30, luminescent layer 20 on substrate 80 and the first half leading Body layer 10.

Wherein, the first semiconductor layer 10 is one of p type semiconductor layer 101 and n type semiconductor layer 301, and the second half lead Body layer 30 is the other of p type semiconductor layer 101 and n type semiconductor layer 301.For example, showing the first semiconductor layer in Fig. 7 10 be p type semiconductor layer 101, and the second semiconductor layer 30 is n type semiconductor layer 301.Illustratively, step 902 includes but unlimited N type semiconductor layer 301, luminescent layer 20 and P-type semiconductor are successively grown in the side of substrate 80 in use epitaxial growth technology Layer 101.

Step 903, as shown in Figure 8 and Figure 9, patterned first semiconductor layer 10, the first semiconductor layer 10 of removal are in The light emitting region P of light emitting diode 1001Edge part.

Wherein, using patterning processes patterned first semiconductor layer 10.For example, first in the first semiconductor layer 10 far from hair The side of photosphere 20 forms photoresist layer;Then the photoresist layer is exposed and is developed, obtain patterned photoresist layer, First semiconductor layer 10 of patterned photoresist layer exposure is in light emitting region P1The surface of the part at edge;Finally, making The first semiconductor layer 10 is performed etching with the patterned photoresist layer, the first semiconductor layer 10 of removal is in light-emitting diodes The light emitting region P of pipe 1001Edge part.

Illustratively, patterned first semiconductor layer 10, can only remove the first semiconductor layer 10 is in light-emitting diodes The light emitting region P of pipe 1001Edge part (as shown in Figure 8);It can also shine removing being in for the first semiconductor layer 10 The light emitting region P of diode 1001Edge part while, by first semiconductor layer 10 in light emitting diode 100 Non-luminous region P2Part remove (as shown in Figure 9) together.Here non-luminous region P2It refers on light emitting diode 100 Except light emitting region P1Region in addition.

As shown in figure 8, in the light emitting region P in light emitting diode for only removing the first semiconductor layer 101Edge Part will form groove 10C on the first semiconductor layer 10.Illustratively, a main surface 20A of the groove 10C in luminescent layer 20 On orthographic projection be in closed frame shape;Alternatively, the quantity of groove 10C be it is multiple, multiple groove 10C surround the first semiconductor layer 10 It is sequentially arranged at intervals one week.

Step 904, as shown in Figure 10, the side of patterned first semiconductor layer 10 forms the in the formation of substrate 80 One barrier film 404.

Wherein, formed the first barrier film 404 when, can using physical gas-phase deposition, sputtering technology, evaporation technology and Any one in shifting process.For example, when the material of the first barrier film 404 be conductive metal oxide or metal (such as Molybdenum, aluminium, copper etc.) when, the first barrier film can be prepared using physical gas-phase deposition or sputtering technology or evaporation technology 404.When the material of the first barrier film 404 is graphene, shifting process can be used chemical vapor deposition growth on copper The formation that single layer or few layer graphene (such as 1 layer~2 layers) are transferred to substrate 80 has the one of patterned first semiconductor layer 10 Side, to form the first barrier film 404.

Step 905, referring to Figure 11, the first barrier film 404 is patterned, makes to be covered in the first barrier film 404 patterned The part of the side 10A of first semiconductor layer 10 is retained, and forms the first barrier layer 40A.

Wherein, the first barrier film 404 is patterned using patterning processes, can removes and does not need to protect in the first barrier film 404 The part stayed, for example, being in non-luminous region P in the first barrier film 404 of removal2Part, and be in the first semiconductor layer position In light emitting region P1Main surface 10B on part, to realize that making to be covered on patterned the first half in the first barrier film 404 leads The part of the side 10A of body layer 10 is retained, and forms the first barrier layer 40A.

First barrier layer 40A is configured as forming charge depletion between the first barrier layer 40A and the first semiconductor layer 10 Area 70.In this way, the carrier (hole or electronics) moved in first semiconductor layer 10 will be far from due to there are charge depletion area 70 Side 10A makes side 10A be less prone to leakage phenomenon, improves hair to realize the transverse current limitation of light emitting diode The external quantum efficiency of optical diode 100, and then improve the luminous efficiency of light emitting diode 100.

In some embodiments, after step 903, the production method further include:

As shown in figure 12, it carries out patterning used exposure mask using to the first semiconductor layer 10, to the place of luminescent layer 20 In light emitting region P1The part at edge perform etching, etching depth is less than the thickness of luminescent layer.In this way, in subsequent production first When barrier film 404, it can make in the side of the first barrier film covering luminescent layer 20 close to the part area of the first semiconductor layer 101 Domain.To advantageously reduce the difficulty of processing of the first barrier layer 40A;Also, as shown in figure 13, keep the first barrier layer 40A effective The first semiconductor layer of covering 101 entire side 10A, the side 10A of the first semiconductor layer 101 is close to one end of luminescent layer 20 It is less prone to leakage phenomenon.

In some embodiments, as illustrated in figures 11 and 13, in the step of patterning the first barrier film 404, first stops It is covered on patterned first semiconductor layer 10 in film 404 and is in light emitting region P1Main surface 10B fringe region part quilt Retain.In this way, design in this way, makes side 10A be less prone to leakage phenomenon close to one end of main surface 10B, and be conducive to Reduce the difficulty of processing of the first barrier layer 40A formed.

In some embodiments, as shown in figure 14, which further includes following steps:

Luminescent layer 20 is patterned, removal luminescent layer 20 is in non-luminous region P2Part, make the second semiconductor layer 30 Be in non-luminous region P2The surface of part be exposed.Then, the shape on the surface of the first semiconductor layer 30 exposed At second electrode 60, first electrode 50 is formed on patterned surface of first semiconductor layer 10 far from luminescent layer 20.

In some embodiments, before forming luminescent layer, which further includes step 1~step 3.

Step 1: as shown in Figure 15 and Figure 16, patterning the second semiconductor layer 30, the second semiconductor layer 30 of removal is in Light emitting region P1Edge part.

Wherein, using patterning the second semiconductor layer 30 the step of with phase the step of above-mentioned patterned first semiconductor layer 10 Together, details are not described herein again.

Illustratively, patterned first semiconductor layer 30, can only remove the second semiconductor layer 30 is in light-emitting diodes The light emitting region P of pipe 1001Edge part (as shown in figure 15);It can also be sent out removing being in for the second semiconductor layer 30 The light emitting region P of optical diode 1001Edge part while, by the second semiconductor layer 30 be in light emitting diode 100 Non-luminous region P2Part remove (as shown in figure 16) together.Here non-luminous region P2Refer to light emitting diode 100 It is upper to remove light emitting region P1Region in addition.

As shown in figure 15, in the light emitting region P in light emitting diode 100 for only removing the second semiconductor layer 301Side The part of edge will form groove 30B on the second semiconductor layer 30.Illustratively, orthographic projection of the groove 30B on substrate 80 is in envelope The frame shape closed;Alternatively, the quantity of groove 30B be it is multiple, multiple groove 30B are sequentially arranged at intervals one around the second semiconductor layer 30 Week.

Step 2: as shown in figure 17, thering is the side of patterned second semiconductor layer 30 to form second in the formation of substrate Barrier film 405.

Wherein, formed the second barrier film 405 when, can using physical gas-phase deposition, sputtering technology, evaporation technology and Any one in shifting process.For example, when the material of the second barrier film 405 be conductive metal oxide or metal (such as Molybdenum, aluminium, copper etc.) when, the second barrier film can be prepared using physical gas-phase deposition or sputtering technology or evaporation technology 405.When the material of the second barrier film 405 is graphene, shifting process can be used chemical vapor deposition growth on copper The formation that single layer or few layer graphene (such as 1 layer~2 layers) are transferred to substrate 80 has the one of patterned second semiconductor layer 30 Side, to form the first barrier film 405.

Step 3: as shown in figure 18, pattern the second barrier film 405, make to be covered on patterned the in the first barrier film The part of the side of two semiconductor layers is retained, and forms the second barrier layer;Wherein, the second barrier layer is configured as stopping second Charge depletion area is formed between floor and the second semiconductor layer.

Wherein, the second barrier film 405 is patterned using patterning processes, can removes and does not need to protect in the second barrier film 405 The part stayed, for example, being in non-luminous region P in the second barrier film 405 of removal2Part, and be in the second semiconductor layer position In light emitting region P1Main surface 30C on part, to realize that making to be covered on patterned the second half in the second barrier film 405 leads The part of the side 30A of body layer 30 is retained, and forms the second barrier layer 40B.

Second barrier layer 40B is configured as forming charge depletion between the second barrier layer 40B and the second semiconductor layer 30 Area 70.In this way, the carrier (hole or electronics) moved in second semiconductor layer 30 will be far from due to there are charge depletion area 70 Side 30A makes side 30A be less prone to leakage phenomenon, improves hair to realize the transverse current limitation of light emitting diode The external quantum efficiency of optical diode 100, and then improve the luminous efficiency of light emitting diode 100.

After forming the second barrier layer 40B, said one or multiple steps can be used to form luminescent layer 20 and first Semiconductor layer 10 is subsequently formed the first barrier layer, first electrode and second electrode, to produce as illustrated in FIG. 4 luminous two Pole pipe 100.

Referring to Figure 19 and Figure 20, some embodiments of the disclosure provide a kind of display device 200, and display device 200 includes driving Dynamic substrate 300 and the multiple light emitting diodes 100 for being installed on 300 side of drive substrate, each light emitting diode 100 are above-mentioned Light emitting diode 200 in one embodiment, and each light emitting diode 100 is electrically connected with drive substrate 300.Wherein, base is driven Plate 300 is active matrix driving substrate or passive drive substrate.The light emitting diode 100 being mounted in drive substrate 300 do not include Substrate.That is, the light emitting diode 100 to be completed by above-mentioned production method needs before installing to drive substrate 300 First remove substrate.

Illustratively, as shown in figure 19, one of the second semiconductor layer 30 far from luminescent layer 20 is arranged in drive substrate 300 Side.At this moment, the first electrode 50 of each light emitting diode 100 and second electrode 60 can be made to connect by making connecting line 400 It is connected in drive substrate 300.

Illustratively, as shown in figure 20, one of the first semiconductor layer 10 far from luminescent layer 20 is arranged in drive substrate 300 Side.At this moment, the first electrode 50 of each light emitting diode 100 and second electrode 60 can be made to be connected to drive by solder joint 500 On dynamic substrate 300.

Herein, it should be noted that one of the first semiconductor layer 10 and the second semiconductor layer 30 are p type semiconductor layer 101, another one is n type semiconductor layer 301.For example, it is p type semiconductor layer 101 that the first semiconductor layer 10 is shown in Figure 19, the Two semiconductor layers 30 are the example of n type semiconductor layer 301.

Referring to Figure 19 and Figure 20, light emitting diode 200 in display device 200, due in the first semiconductor layer 10 and Barrier layer 40 is provided on at least partly region of the side of at least one of two semiconductor layers 30 (such as to show in Figure 19 The side 10A of first semiconductor layer 10 is provided with the first barrier layer 40A), and barrier layer 40 is configured as on barrier layer 40 Charge depletion area is formed between at least partly region of the side.In this way, since there are charge depletion area, the first semiconductor layers 10 and/or second the carrier (hole and/or electronics) that moves in semiconductor layer 30 will be far from at least partly region of the side, To realize the transverse current limitation of light emitting diode, at least partly region of the side is made to be less prone to leakage phenomenon, The external quantum efficiency of light emitting diode is improved, that is, improves the luminous efficiency of light emitting diode.

The above, the only specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, this public affairs The protection scope opened should be based on the protection scope of the described claims.

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