阅读说明：本技术 一种氮化镓基发光二极管外延片的复合n型阻挡层、一种氮化镓基发光二极管外延片 (Compound N type barrier layer of gallium nitride-based light emitting diode epitaxial wafer and gallium nitride-based light emitting diode epitaxial wafer ) 是由 蔡武 康建 陈向东 于 2021-09-10 设计创作，主要内容包括：本发明属于半导体技术领域,尤其涉及一种氮化镓基发光二极管外延片的复合N型阻挡层、一种氮化镓基发光二极管外延片。本发明提供的氮化镓基发光二极管外延片的复合N型阻挡层,包括低温氮化镓层和设置在所述低温氮化镓层表面的循环层,所述循环层包括至少一层氮化硅层和至少一层氮化铝层,所述氮化硅层和氮化铝层间隔层叠设置,所述氮化硅层和氮化铝层的层数相同。本发明提供的氮化镓基发光二极管外延片的复合N型阻挡层能够有效形成高阻隔绝,阻挡电子向高缺陷密度的非掺层泄露,不仅能够提升了电子注入效率,且减小漏电,提升抗静电能力。(The invention belongs to the technical field of semiconductors, and particularly relates to a composite N-type barrier layer of a gallium nitride-based light emitting diode epitaxial wafer and the gallium nitride-based light emitting diode epitaxial wafer. The composite N-type barrier layer of the epitaxial wafer of the gallium nitride-based light-emitting diode comprises a low-temperature gallium nitride layer and a circulating layer arranged on the surface of the low-temperature gallium nitride layer, wherein the circulating layer comprises at least one silicon nitride layer and at least one aluminum nitride layer, the silicon nitride layer and the aluminum nitride layer are arranged in a stacking mode at intervals, and the silicon nitride layer and the aluminum nitride layer are the same in number. The composite N-type barrier layer of the epitaxial wafer of the gallium nitride-based light-emitting diode can effectively form high-resistance isolation and prevent electrons from leaking to the non-doped layer with high defect density, so that the electron injection efficiency can be improved, the electric leakage is reduced, and the antistatic capability is improved.)

1. The composite N-type blocking layer of the GaN-based light-emitting diode epitaxial wafer is characterized by comprising a low-temperature GaN layer (41) and a circulating layer arranged on the surface of the low-temperature GaN layer (41), wherein the circulating layer comprises at least one silicon nitride layer (42) and at least one aluminum nitride layer (43), the silicon nitride layer (42) and the aluminum nitride layer (43) are arranged in a stacking mode at intervals, and the number of layers of the silicon nitride layer (42) and the aluminum nitride layer (43) is the same.

2. The composite N-type barrier layer according to claim 1, wherein the number of layers of the silicon nitride layer (42) is 2-10.

3. The composite N-type barrier layer according to claim 1, wherein the total thickness of all silicon nitride layers (42) is 0.5 to 5 nm; the total thickness of all the aluminum nitride layers (43) is 0.5 to 5 nm.

4. The composite N-type barrier layer according to claim 1, wherein the thickness of the low temperature gallium nitride layer (41) is 50 to 500 nm.

5. The composite N-type barrier according to claim 1, wherein the surface of the composite N-type barrier (40) has a tapered pit structure.

6. The composite N-type barrier according to claim 5, wherein the density of the tapered pits of the surface of the composite N-type barrier (40) is 2 × e⁸～5×e⁸Per cm²。

7. The composite N-type barrier layer according to claim 5 or 6, wherein the depths of the individual pyramid-shaped pits are independently 50 to 500nnm, and the diameters of the bottom surfaces of the individual pyramid-shaped pits are independently 50 to 500 nm.

8. A gan-based led epitaxial wafer, comprising a substrate (10), and a buffer layer (20), a non-doped layer (30), a composite N-type barrier layer (40) according to claim 1, an N-type conductive layer (50), a stress release layer (60), an active layer (70), a P-type barrier layer (80), a P-type conductive layer (90) and a metal contact layer (100) sequentially stacked on the surface of the substrate (10); the surface of the non-doped layer (30) is in contact with a low-temperature gallium nitride layer (41) in the composite N-type barrier layer (40).

9. A gan-based led epitaxial wafer, comprising a substrate (10), and a buffer layer (20), a first undoped layer (301), a composite N-type barrier layer (40) according to claim 1, a second undoped layer (302), an N-type conductive layer (50), a stress release layer (60), an active layer (70), a P-type barrier layer (80), a P-type conductive layer (90), and a metal contact layer (100) sequentially stacked on the surface of the substrate (10), wherein the surface of the first undoped layer (301) is in contact with the low-temperature gan layer (41) in the composite N-type barrier layer (40).

10. A GaN-based light emitting diode epitaxial wafer is characterized by comprising a substrate (10), and a buffer layer (20), a non-doped layer (30), a first N-type conducting layer (501), a composite N-type barrier layer (40) according to claim 1, a second N-type conducting layer (502), a stress release layer (60), an active layer (70), a P-type barrier layer (80), a P-type conducting layer (90) and a metal contact layer (100) which are sequentially stacked on the surface of the substrate (10), wherein the surface of the first N-type conducting layer (501) is in contact with the low-temperature GaN layer (41) in the composite N-type barrier layer (40).

Technical Field

The invention belongs to the technical field of semiconductors, and particularly relates to a composite N-type barrier layer of a gallium nitride-based light emitting diode epitaxial wafer and the gallium nitride-based light emitting diode epitaxial wafer.

Background

A Light Emitting Diode (LED) is a semiconductor electronic component capable of Emitting Light. Gallium nitride (GaN) -based materials are an important third-generation semiconductor material, and have a wide application prospect in the fields of semiconductor illumination, power electronics, high-frequency communication and the like. Since the nineties of the twentieth century, gallium nitride-based light emitting diodes were gradually commercialized, and the gap of the conventional light emitting diodes in the blue light band was filled.

The epitaxial wafer is a primary finished product in the manufacturing process of the light-emitting diode. The conventional gallium nitride-based LED epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially laminated on the substrate. The P-type semiconductor layer is used for providing holes for carrying out compound luminescence, the N-type semiconductor layer is used for providing electrons for carrying out compound luminescence, the active layer is used for carrying out radiation compound luminescence of the electrons and the holes, and the substrate is used for providing a growth surface for the epitaxial material.

Although the gallium nitride-based light emitting diode is commercialized, the current commercially available gallium nitride-based light emitting diode still has the defect of large electric leakage when in use.

Disclosure of Invention

In view of the above, the present invention provides a composite N-type barrier layer of a gan-based led epitaxial wafer and a gan-based led epitaxial wafer, which have the characteristics of small leakage current, static electricity resistance, and high electron injection efficiency.

In order to achieve the above object, the present invention provides the following technical solutions:

the invention provides a composite N-type blocking layer 40 of a gallium nitride-based light-emitting diode epitaxial wafer, which comprises a low-temperature gallium nitride layer 41 and a circulating layer arranged on the surface of the low-temperature gallium nitride layer 41, wherein the circulating layer comprises at least one silicon nitride layer 42 and at least one aluminum nitride layer 43, the silicon nitride layer 42 and the aluminum nitride layer 43 are arranged in a stacked mode at intervals, and the layers of the silicon nitride layer 42 and the aluminum nitride layer 43 are the same.

Preferably, the number of the silicon nitride layers 42 is 2 to 10.

Preferably, the total thickness of the silicon nitride layer 42 is 0.5 to 5 nm; the total thickness of the aluminum nitride layer 43 is 0.5-5 nm.

Preferably, the thickness of the low-temperature gallium nitride layer 41 is 50 to 500 nm.

Preferably, the surface of the composite N-type barrier layer 40 has a tapered pit structure.

Preferably, the density of the conical pits on the surface of the composite N-type barrier layer 40 is 2 × e⁸～5×e⁸Per cm²。

Preferably, the depths of the single conical pits are independently 50-500 nnm, and the diameters of the bottoms of the single conical pits are independently 50-500 nm.

The invention provides a gallium nitride-based light-emitting diode epitaxial wafer, which comprises a substrate 10, and a buffer layer 20 and a non-doped layer 30 which are sequentially stacked on the surface of the substrate 10, wherein the composite N-type barrier layer 40, an N-type conducting layer 50, a stress release layer 60, an active layer 70, a P-type barrier layer (80), a P-type conducting layer 90 and a metal contact layer 100 are arranged in the technical scheme; the low-temperature gallium nitride layer 41 is arranged on the surface of the non-doped layer 30.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer which comprises a substrate 10, and a buffer layer 20, a first non-doped layer 301, a composite N-type barrier layer 40, a second non-doped layer 302, an N-type conducting layer 50, a stress release layer 60, an active layer 70, a P-type barrier layer 80, a P-type conducting layer 90 and a metal contact layer 100 which are sequentially stacked on the surface of the substrate 10, wherein the surface of the first non-doped layer 301 is in contact with a low-temperature gallium nitride layer 41 in the composite N-type barrier layer 40.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer, which comprises a substrate 10, and a buffer layer 20, a non-doped layer 30 and a first N-type conducting layer 501 which are sequentially stacked on the surface of the substrate 10, a composite N-type blocking layer 40, a second N-type conducting layer 502, a stress release layer 60, an active layer 70, a P-type blocking layer 80, a P-type conducting layer 90 and a metal contact layer 100 which are arranged in the technical scheme, wherein the surface of the first N-type conducting layer 501 is in contact with a low-temperature gallium nitride layer 41 in the composite N-type blocking layer 40.

The composite N-type blocking layer 40 of the epitaxial wafer of the gallium nitride-based light-emitting diode comprises a low-temperature gallium nitride layer 41 and a circulating layer arranged on the surface of the low-temperature gallium nitride layer 41, wherein the circulating layer comprises at least one silicon nitride layer 42 and at least one aluminum nitride layer 43, the silicon nitride layer 42 and the aluminum nitride layer 43 are arranged in a stacked mode at intervals, and the layers of the silicon nitride layer 42 and the aluminum nitride layer 43 are the same. The composite N-type barrier layer 40 of the epitaxial wafer of the gallium nitride-based light-emitting diode can effectively form high-resistance isolation and prevent electrons from leaking to a non-doped layer with high defect density, so that the electron injection efficiency can be improved, the electric leakage is reduced, and the antistatic capability is improved; meanwhile, the composite N-type barrier layer of the epitaxial wafer of the gallium nitride-based light-emitting diode provided by the invention also plays a role in blocking the defect of the non-doped layer and releasing the stress to the N-type conducting layer.

Drawings

Fig. 1 is a schematic structural diagram of a gan-based led epitaxial wafer according to embodiments 1 to 5 of the present invention;

fig. 2 is a flowchart illustrating a process of fabricating an epitaxial wafer of a gan-based led according to embodiments 1 to 5 of the present invention;

fig. 3 is a partial cross-sectional view of gallium nitride-based light emitting diode epitaxial wafers prepared in examples 1 and 2 of the present invention;

fig. 4 is a partial cross-sectional view of a gan-based led epitaxial wafer according to example 3 of the present invention;

fig. 5 is a partial cross-sectional view of a gan-based led epitaxial wafer according to example 4 of the present invention;

fig. 6 is a partial cross-sectional view of a gan-based led epitaxial wafer according to example 5 of the present invention;

fig. 7 is a schematic structural diagram of a gan-based led epitaxial wafer according to embodiment 6 of the present invention;

fig. 8 is a schematic structural diagram of a gan-based led epitaxial wafer according to embodiment 7 of the present invention;

the structure comprises a substrate 10, a buffer layer 20, a non-doped layer 30, a composite N-type barrier layer 40, a low-temperature gallium nitride layer 41, a silicon nitride layer 42, an aluminum nitride layer 43, an N-type conducting layer 50, a stress release layer 60, an active layer 70, a P-type barrier layer 80, a P-type conducting layer 90 and a metal contact layer 100. 301-a first undoped layer, 302-a second undoped layer, 501-a first N-type conductive layer, 502-a second N-type conductive layer.

Detailed Description

The invention provides a composite N-type blocking layer 40 of a gallium nitride-based light-emitting diode epitaxial wafer, which comprises a low-temperature gallium nitride layer 41 and a circulating layer arranged on the surface of the low-temperature gallium nitride layer 41, wherein the circulating layer comprises at least one silicon nitride layer 42 and at least one aluminum nitride layer 43, the silicon nitride layer 42 and the aluminum nitride layer 43 are arranged in a stacked mode at intervals, and the layers of the silicon nitride layer 42 and the aluminum nitride layer 43 are the same.

The composite N-type barrier layer 40 provided by the invention comprises a low-temperature gallium nitride layer 41, wherein the thickness of the low-temperature gallium nitride layer 41 is preferably 50-500 nm, and more preferably 55-485 nm. In the present invention, the material of the low-temperature gallium nitride layer 41 is preferably N-type impurity-doped gallium nitride, and the N-type impurity element is preferably one or more of silicon, germanium, tin, tellurium, oxygen, and carbon.

The composite N-type barrier layer 40 provided by the invention comprises a circulating layer arranged on the surface of the low-temperature gallium nitride layer 41, wherein the circulating layer comprises at least one silicon nitride layer 42 and at least one aluminum nitride layer 43, the silicon nitride layer 42 and the aluminum nitride layer 43 are arranged at intervals in a laminated manner, and the number of layers of the silicon nitride layer 42 is the same as that of the aluminum nitride layer 43. In the present invention, the number of layers of the silicon nitride layer 42 is preferably 2 to 10, and in a specific embodiment of the present invention, the number of layers of the silicon nitride layer 42 is preferably 1 or 2.

In a specific embodiment of the present invention, the composite N-type barrier layer 40 preferably includes: the low-temperature gallium nitride layer 41, the silicon nitride layer 42, and the aluminum nitride layer 43 are stacked in this order, or the low-temperature gallium nitride layer 41, the aluminum nitride layer 43, and the silicon nitride layer 42 are stacked in this order, or the low-temperature gallium nitride layer 41, the silicon nitride layer 42, the aluminum nitride layer 43, the silicon nitride layer 42, and the aluminum nitride layer 43 are stacked in this order, or the low-temperature gallium nitride layer 41, the aluminum nitride layer 43, the silicon nitride layer 42, the aluminum nitride layer 43, and the silicon nitride layer 42 are stacked in this order.

In the present invention, the total thickness of the silicon nitride layer 42 is preferably 0.5 to 5nm, and more preferably 1 to 4.5 nm.

In the present invention, the total thickness of the aluminum nitride layer 43 is preferably 0.5 to 5nm, and more preferably 1 to 4.5 nm. In the present invention, the material of the aluminum nitride layer 43 is preferably N-type impurity-doped aluminum nitride, and the N-type impurity element is preferably one or more of silicon, germanium, tin, tellurium, oxygen, and carbon, and the doping concentration of the aluminum nitride layer 43 is not particularly required in the present invention.

In the present invention, the surface of the composite N-type barrier layer 40 preferably has a tapered pit structure.

In the present invention, the density of the tapered pits on the surface of the composite N-type barrier layer 40 is preferably 2 × e⁸～5×e⁸Per cm²More preferably 2.5 × e⁸～4.5×e⁸Per cm²。

In the invention, the depth of each conical pit is preferably 50-500 nnm, and more preferably 55-450 nm; the diameter of the bottom surface of each conical pit is preferably 50-500 nm, and more preferably 55-450 nm.

The composite N-type barrier layer 40 provided by the invention preferably forms a conical pit on the surface, so that the composite barrier layer N has the performance of reflecting electrons and photons, the leakage of electrons to a non-doped layer and a buffer layer with high defect density can be effectively blocked, the total reflection of photons emitted by the active layer 70 of the GaN-based light-emitting diode epitaxial wafer in the GaN-based light-emitting diode epitaxial wafer is reduced, the probability that the photons enter the non-doped layer and are captured by defects is also reduced, and the light-emitting proportion of the GaN-based light-emitting diode epitaxial wafer is improved.

In the present invention, the method for preparing the composite N-type barrier layer 40 preferably includes the steps of:

in the invention, the low-temperature gallium nitride layer 41 is preferably prepared by a metal organic chemical vapor deposition method, the deposition temperature of the low-temperature gallium nitride layer 41 is preferably 700-1000 ℃, and the deposition time is preferably 1000-4000 s.

In the embodiment of the present invention, the carrier gas for depositing the low-temperature gallium nitride layer 41 is preferably H₂、 N₂Or H₂And N₂Preferably ammonia gas, as the nitrogen source for deposition, and depositingThe deposition gallium source is preferably trimethyl gallium and/or triethyl gallium, and the deposition N-type dopant is preferably silane, preferably 200ppm in specification. The invention has no special requirements on the specific operation of the low-temperature gallium nitride layer 41 during deposition.

In the invention, the low-temperature gallium nitride layer 41 is preferably prepared by a metal organic chemical vapor deposition method, and a conical pit can be formed on the low-temperature gallium nitride layer 41.

In the invention, the silicon nitride layer 42 is preferably prepared by a metal organic chemical vapor deposition method, the deposition temperature of the silicon nitride layer 42 is preferably 800-1150 ℃, and the deposition time is preferably 30-600 s.

In one embodiment of the present invention, the carrier gas for depositing the silicon nitride layer 42 is preferably N₂The gas, the nitrogen source for deposition is preferably ammonia gas, and the silicon source for deposition is preferably silane, the specification of which is preferably 200 ppm. The present invention does not require special handling of the silicon nitride layer 42 during deposition.

In the present invention, the silicon nitride layer 42 is preferably grown along the surface of the low temperature gallium nitride layer 41 or the surface of the aluminum nitride layer 43, and the conical pit structure formed on the surface of the low temperature gallium nitride layer 41 is remained.

In the invention, the aluminum nitride layer 43 is preferably prepared by a metal organic chemical vapor deposition method, the deposition temperature of the aluminum nitride layer 43 is preferably 800-1150 ℃, and the deposition time is preferably 30-600 s.

In one embodiment of the present invention, the carrier gas for depositing the aluminum nitride layer 43 is preferably H₂、N₂Or H₂And N₂Preferably ammonia gas, preferably trimethylaluminum, and preferably a silane, preferably having a specification of 200ppm, as an aluminum source for deposition. The present invention has no particular requirements for the specific operation of the aluminum nitride layer 43 deposition.

In the present invention, the aluminum nitride layer 43 preferably grows along the surface of the low-temperature gallium nitride layer 41 or the surface of the silicon nitride layer 42, and a conical pit structure formed on the surface of the low-temperature gallium nitride layer 41 is remained.

As shown in fig. 1, the present invention provides a gan-based led epitaxial wafer, which includes a substrate 10, and a buffer layer 20 and a non-doped layer 30 sequentially stacked on the surface of the substrate 10, wherein the buffer layer, the non-doped layer 30, the composite N-type barrier layer 40, the N-type conductive layer 50, the stress release layer 60, the active layer 70, the P-type barrier layer (80), the P-type conductive layer 90, and the metal contact layer 100 are disposed on the surface of the composite N-type barrier layer 40, and the surface of the non-doped layer 30 is in contact with a low-temperature gan layer 41 in the composite N-type barrier layer 40.

The gallium nitride-based light emitting diode epitaxial wafer provided by the invention comprises a substrate 10; the material of the substrate 10 is not particularly limited in the present invention, and in the embodiment of the present invention, the material of the substrate 10 is preferably Al₂O₃(e.g., sapphire), SiC, GaN, ZnO, Si, GaP, InP or Ge, more preferably Al₂O₃In an embodiment of the present invention, the substrate 10 is patterned Al₂O₃Substrate or mirror Al₂O₃A substrate.

The gan-based led epitaxial wafer provided by the present invention includes a buffer layer 20 disposed on the surface of the substrate 10, in the embodiment of the present invention, when the substrate is Al₂O₃When the substrate is used, the buffer layer 20 is preferably provided on the Al₂O₃The C-side of the substrate. In the embodiment of the present invention, the buffer layer is preferably a GaN buffer layer or an AlGaN buffer layer, and the thickness of the buffer layer 20 is not particularly required in the present invention.

The GaN-based light emitting diode epitaxial wafer provided by the invention comprises the non-doped layer 30 arranged on the surface of the buffer layer 20, in the specific embodiment of the invention, the non-doped layer 30 is preferably a GaN non-doped layer, and the invention has no special requirement on the thickness of the non-doped layer 30.

The GaN-based light-emitting diode epitaxial wafer provided by the invention comprises a composite N-type barrier layer 40 arranged on the surface of a non-doped layer 30; in the present invention, the low-temperature gallium nitride layer 41 is disposed on the surface of the undoped layer 30.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer, which comprises an N-type conducting layer 50 arranged on the surface of a composite N-type barrier layer 40, wherein when the outermost layer of the composite N-type barrier layer 40 is a silicon nitride layer 42, the N-type conducting layer 50 is arranged on the surface of the silicon nitride layer 42, and when the outermost layer of the composite N-type barrier layer 40 is an aluminum nitride layer 43, the N-type conducting layer 50 is arranged on the surface of the aluminum nitride layer 43.

In the present invention, the material of the N-type conductive layer 50 is preferably N-type impurity-doped gallium nitride, and the N-type impurity element is preferably one or more of silicon, germanium, tin, tellurium, oxygen, and carbon, and more preferably silicon. The invention has no special requirement on the doping concentration of the low-temperature gallium nitride layer 41. The present invention has no particular requirement on the thickness of the N-type conductive layer 50.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer, which comprises a stress release layer 60 arranged on the surface of an N-type conducting layer 50.

The invention has no special requirements on the material of the stress release layer 60, and the invention has no special requirements on the thickness of the stress release layer 60.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer, which comprises an active layer 70 arranged on the surface of a stress release layer 60.

In the present invention, the active layer 70 includes a quantum hydrazine layer and a quantum barrier layer, and the present invention has no requirement for the quantum hydrazine layer and the quantum barrier layer.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer, which comprises a P-type barrier layer 80 arranged on the surface of an active layer 70.

The invention has no special requirements on the material of the P-type barrier layer 80, and the invention has no requirements on the thickness of the P-type barrier layer 80.

The invention provides a gallium nitride-based light emitting diode epitaxial wafer, which comprises a P-type conducting layer 90 arranged on the surface of a P-type barrier layer 80.

In the present invention, the material of the P-type conductive layer 90 is preferably P-type doped gallium nitride, and the P-type doping element is preferably one or more of magnesium, zinc, beryllium and calcium, and the doping concentration of the P-type conductive layer 90 is not particularly required in the present invention. The present invention does not require the thickness of the P-type conductive layer 90.

The invention provides a gallium nitride-based light-emitting diode epitaxial wafer, which comprises a metal contact layer 100 arranged on the surface of a P-type conducting layer 90.

In the present invention, the material of the metal contact layer 100 is preferably P-type doped gallium nitride, and the P-type doping element is preferably one or more of magnesium, zinc, beryllium and calcium, and there is no special requirement on the doping concentration of the metal contact layer 100. The present invention does not require the thickness of the metal contact layer 100.

In the present invention, the method for preparing the gan-based led epitaxial wafer (as shown in fig. 1) preferably comprises the following steps: the method comprises the steps of sequentially laminating and preparing a buffer layer 20, a non-doped layer 30, a composite N-type barrier layer 40, an N-type conducting layer 50, a stress release layer 60, an active layer 70, a P-type barrier layer 80, a P-type conducting layer 90 and a metal contact layer 100 on the surface of a substrate 10, wherein the low-temperature gallium nitride layer 41 is arranged on the surface of the non-doped layer 30.

In the present invention, the buffer layer 20, the undoped layer 30, the N-type conductive layer 50, the stress release layer 60, the active layer 70, the P-type barrier layer 80, the P-type conductive layer 90 and the metal contact layer 100 are preferably prepared by metal organic chemical vapor deposition, and in the embodiment of the present invention, the carrier gas for deposition is preferably H₂、N₂Or H₂And N₂Preferably ammonia gas, preferably trimethylgallium and/or triethylgallium, preferably trimethylindium, preferably trimethylaluminum, preferably an aluminum source, preferably trimethylaluminum, preferably a silane, preferably having a specification of 200ppm, preferably a magnesium metallocene, as a P-type dopant for deposition. The invention has no special requirements on the deposition thickness of each layer, and the invention has no special requirements on the specific operation when each layer is deposited.

In the present invention, the Metal-organic Chemical Vapor Deposition process is preferably performed using a Metal-organic Chemical Vapor Deposition (MOCVD) apparatus, provided by the american Venco (VEECO) supplier, K465 i.

In the present invention, the preparation method of the composite N-type barrier layer 40 has been described above, and is not described in detail herein.

As shown in fig. 7, the present invention provides a gan-based led epitaxial wafer, which includes a substrate 10, and a buffer layer 20, a first undoped layer 301, a composite N-type barrier layer 40, a second undoped layer 302, an N-type conductive layer 50, a stress release layer 60, an active layer 70, a P-type barrier layer 80, a P-type conductive layer 90, and a metal contact layer 100, which are sequentially stacked on a surface of the substrate 10, wherein a surface of the first undoped layer 301 is in contact with the low-temperature gan layer 41 in the composite N-type barrier layer 40.

In the invention, the low-temperature gallium nitride layer 41 is arranged on the surface of the first non-doped layer 301, and when the outermost layer of the composite N-type barrier layer 40 is the silicon nitride layer 42, the second non-doped layer 302 is arranged on the surface of the silicon nitride layer 42 on the outermost layer; when the outermost layer of the composite N-type barrier layer 40 is the aluminum nitride layer 43, the second non-doped layer 302 is disposed on the surface of the outermost aluminum nitride layer 43. The thickness of the first undoped layer 301 and the second undoped layer 302 is not particularly limited in the present invention, and in a specific embodiment of the present invention, the thickness of the first undoped layer 301 is preferably greater than or equal to the thickness of the second undoped layer 302.

In the present invention, the protection ranges of the substrate 10, the buffer layer 20, the composite N-type barrier layer 40, the N-type conductive layer 50, the stress release layer 60, the active layer 70, the P-type barrier layer 80, the P-type conductive layer 90 and the metal contact layer 100 are preferably the same as those described above, and are not described herein again.

In the present invention, the method for preparing the gan-based led epitaxial wafer (as shown in fig. 7) preferably includes the following steps: the method comprises the steps of sequentially laminating and preparing a buffer layer 20, a first non-doped layer 301, a composite N-type barrier layer 40, a second non-doped layer 302, an N-type conducting layer 50, a stress release layer 60, an active layer 70, a P-type barrier layer 80, a P-type conducting layer 90 and a metal contact layer 100 on the surface of a substrate 10, and arranging the low-temperature gallium nitride layer 41 on the surface of the non-doped layer 30.

In the present invention, the buffer layer 20, the first undoped layer 301, the second undoped layer 302, the N-type conductive layer 50, the stress relief layer 60, the active layer 70, the P-type barrier layer 80, the P-type conductive layer 90 and the metal contact layer 100 are preferably formed by metal organic chemical vapor deposition, and in the embodiment of the present invention, the carrier gas for deposition is preferably H₂、N₂Or H₂And N₂Preferably ammonia gas, preferably trimethylgallium and/or triethylgallium, preferably trimethylindium, preferably trimethylaluminum, preferably an aluminum source, preferably trimethylaluminum, preferably a silane, preferably having a specification of 200ppm, preferably a magnesium metallocene, as a P-type dopant for deposition. The invention has no special requirements on the deposition thickness of each layer, and the invention has no special requirements on the specific operation when each layer is deposited.

In the present invention, the Metal-organic Chemical Vapor Deposition process is preferably performed using a Metal-organic Chemical Vapor Deposition (MOCVD) apparatus, provided by the american Venco (VEECO) supplier, K465 i.

In the present invention, the preparation method of the composite N-type barrier layer 40 has been described above, and is not described in detail herein.

As shown in fig. 8, the present invention provides a gallium nitride-based light emitting diode epitaxial wafer, which includes a substrate 10, and a buffer layer 20, a non-doped layer 30, a first N-type conductive layer 501, a composite N-type barrier layer 40, a second N-type conductive layer 502, a stress release layer 60, an active layer 70, a P-type barrier layer 80, a P-type conductive layer 90, and a metal contact layer 100, which are sequentially stacked on a surface of the substrate 10, wherein a surface of the first N-type conductive layer 501 is in contact with the low temperature gallium nitride layer 41 in the composite N-type barrier layer 40.

In the present invention, the low-temperature gallium nitride layer 41 is disposed on the surface of the first N-type conductive layer 501, and when the outermost layer of the composite N-type barrier layer 40 is the silicon nitride layer 42, the second N-type conductive layer 502 is disposed on the surface of the outermost silicon nitride layer 42; when the outermost layer of the composite N-type barrier layer 40 is the aluminum nitride layer 43, the second N-type conductive layer 502 is disposed on the surface of the outermost aluminum nitride layer 43. The thicknesses of the first N-type conductive layer 501 and the second N-type conductive layer 502 are not particularly required, and in a specific embodiment of the present invention, the thickness of the first N-type conductive layer 501 is preferably less than or equal to the thickness of the second N-type conductive layer 502.

In the present invention, the protection ranges of the substrate 10, the buffer layer 20, the undoped layer 30, the composite N-type barrier layer 40, the stress release layer 60, the active layer 70, the P-type barrier layer 80, the P-type conductive layer 90 and the metal contact layer 100 are preferably the same as those described above, and are not described herein again.

In the present invention, the method for preparing the gan-based led epitaxial wafer (as shown in fig. 8) preferably includes the following steps: the method comprises the steps of sequentially laminating and preparing a buffer layer 20, a non-doped layer 30, a first N-type conducting layer 501, a composite N-type blocking layer 40, a second N-type conducting layer 502, a stress release layer 60, an active layer 70, a P-type blocking layer 80, a P-type conducting layer 90 and a metal contact layer 100 on the surface of a substrate 10, wherein the low-temperature gallium nitride layer 41 is arranged on the surface of the non-doped layer 30.

In the present invention, the buffer layer 20, the first N-type conductive layer 501, the second N-type conductive layer 502, the stress release layer 60, the active layer 70, the P-type barrier layer 80, the P-type conductive layer 90 and the metal contact layer 100 are preferably prepared by metal organic chemical vapor deposition, and in the embodiment of the present invention, the carrier gas for deposition is preferably H₂、N₂Or H₂And N₂Preferably ammonia gas, preferably trimethylgallium and/or triethylgallium, preferably trimethylindium, preferably trimethylaluminum, preferably an aluminum source, preferably trimethylaluminum, preferably a silane, preferably having a specification of 200ppm, preferably a magnesium metallocene, as a P-type dopant for deposition. The invention has no special requirements on the deposition thickness of each layer, and the invention has no special requirements on the specific operation when each layer is deposited.

In the present invention, the Metal-organic Chemical Vapor Deposition process is preferably performed using a Metal-organic Chemical Vapor Deposition (MOCVD) apparatus, provided by the american Venco (VEECO) supplier, K465 i.

In the present invention, the preparation method of the composite N-type barrier layer 40 has been described above, and is not described in detail herein.

The technical solution of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Example 1

According to the process flow shown in FIG. 2, a metal organic chemical vapor deposition device K465i supplied by the manufacturer of Wikipedia (VEECO) of USA is adopted,

sequentially depositing a growth buffer layer 20 and a non-doped layer 30 on the surface of the graphical sapphire substrate 10C;

and depositing and growing a low-temperature gallium-nitrogen layer 41 in the composite N-type barrier layer 40 on the surface of the non-doped layer 30, wherein the deposition parameters are as follows: the deposition temperature is 850 ℃, the deposition carrier gas is a mixer of hydrogen and nitrogen, the pressure of the deposition carrier gas is 100torr, the flow of nitrogen source ammonia is set to 40sl, the flow of gallium source triethyl gallium is set to 1000sccm, silane is used as an N-type dopant, the deposition time is 3000s, and a low-temperature gallium-nitrogen layer 41 with the thickness of 300nm is grown;

depositing and growing a silicon nitride layer 42 and an aluminum nitride layer 43 on the surface of the low-temperature gallium-nitrogen layer 41 in sequence;

the deposition parameters of the silicon nitride layer 42 are: the deposition temperature is 950 ℃, the deposition carrier gas is nitrogen, the pressure of the deposition carrier gas is 100torr, the flow of nitrogen source ammonia gas is set to 10sl, the flow of silane is set to 100sccm, the deposition time is 100s, and a silicon nitrogen layer 42 with the thickness of 1nm is grown;

the deposition parameters of the aluminum nitride layer 43 are: the deposition temperature is 950 ℃, the deposition carrier gas is nitrogen, the pressure of the deposition carrier gas is 100torr, the flow of nitrogen source ammonia gas is set to be 2sl, the flow of aluminum source trimethylaluminum is set to be 10sccm, silane is used as an N-type dopant, the deposition time is 100s, and the aluminum nitride layer 43 with the thickness of 1nm is grown;

an N-type conducting layer 50, a stress release layer 60, an active layer 70, an electron blocking layer 80, a P-type conducting layer 90 and a metal contact layer 100 are deposited and grown on the surface of the aluminum nitride layer 43 in sequence; and obtaining the GaN-based light emitting diode epitaxial wafer.

Fig. 1 is a schematic structural diagram of a gan-based led epitaxial wafer prepared in this embodiment, fig. 3 is a partial cross-sectional view of the gan-based led epitaxial wafer prepared in embodiment 1 of the present invention, and as can be seen from fig. 3, in this embodiment, a composite N-type barrier layer forms high-resistance isolation to effectively block electrons from leaking to a non-doped layer with high defect density, and simultaneously, tapered pits are formed on the morphology with a density of 2 × e⁸～5×e⁸Per cm²The total reflection of photons emitted by the active region in the epitaxial layer can be reduced, the probability that the photons enter the non-doped layer and are captured by defects is also reduced, and the light emitting proportion is improved; and the composite N-type barrier layer also plays a role in blocking defects and releasing stress.

Example 2

The preparation method of this example is substantially the same as that of example 1 except that: the deposition temperature of the low-temperature gallium-nitrogen layer 41 is 880 ℃, the growth time is 1200s, and the growth thickness is 200 nm.

Compared with embodiment 1, the growth temperature of the low-temperature gallium nitride layer 41 is increased and the thickness of the low-temperature gallium nitride layer 41 is reduced, and the epitaxial structure profile analysis shows that the size of the V pit generated in the low-temperature gallium nitride layer 41 is reduced, the roughness caused by the V pit on the appearance is reduced, and the light extraction efficiency of the whole structure is slightly reduced compared with that of embodiment 1.

Example 3

The preparation method of this example is substantially the same as that of example 1 except that: and depositing and growing an aluminum nitride layer 43 and a silicon nitride layer 42 on the surface of the low-temperature gallium-nitrogen layer 41 in sequence.

Fig. 4 is a partial cross-sectional view of embodiment 3 of the present invention, and referring to fig. 4, it can be seen that, in embodiment 3, compared with embodiment 1, the deposition sequence of the silicon nitride layer 42 and the aluminum nitride layer 43 is opposite, and since the silicon nitride lattice size is larger than that of gallium nitride and the aluminum nitride lattice size is smaller than that of gallium nitride, in embodiment 3, on the basis of embodiment 1, the deposition sequence of the silicon nitride layer 42 and the aluminum nitride layer 43 is changed, so that the stress state in the composite N-type barrier layer is changed, and the stress state and the warp state in the subsequently grown epitaxial layer are affected. The warpage (the central point of the epitaxial wafer is upwarped) of the epitaxial wafer of the gallium nitride-based light-emitting diode prepared in the example 3 is more convex than that of the example 1.

Example 4

The preparation method of this example is substantially the same as that of example 1 except that: depositing and growing a silicon nitride layer 42, an aluminum nitride layer 43, the silicon nitride layer 42 and the aluminum nitride layer 43 on the surface of the low-temperature gallium-nitrogen layer 41 in sequence; the deposition time of the silicon nitride layer 42 was 50s and the growth thickness was 0.5nm, and the deposition time of the aluminum nitride layer 43 was 50s and the growth thickness was 0.5 nm.

Fig. 5 is a partial cross-sectional view of example 4 of the present invention, and referring to fig. 5, it can be seen that in example 4, compared with example 1, a single layer of silicon nitride layer 42 and aluminum nitride layer 43 is changed to a superlattice structure with two periods of stacked growth (when silicon nitride layer 42 and aluminum nitride layer 43 are alternately deposited at intervals and each layer has at least two times, and the thicknesses of the single layers of silicon nitride layer 42 and aluminum nitride layer 43 are both less than 100nm, the superlattice structure is adopted), while the total thickness is kept unchanged, the thickness of the single layer is reduced by introducing the superlattice, and adverse effects such as defects and internal stress caused by lattice mismatch between silicon nitride and gallium nitride and aluminum nitride and gallium nitride are obviously alleviated.

Example 5

The preparation method of this example is substantially the same as that of example 1 except that: depositing and growing an aluminum nitride layer 43, a silicon nitride layer 42, the aluminum nitride layer 43 and the silicon nitride layer 42 on the surface of the low-temperature gallium-nitrogen layer 41 in sequence; the deposition time of the silicon nitride layer 42 was 50s and the growth thickness was 0.5nm, and the deposition time of the aluminum nitride layer 43 was 50s and the growth thickness was 0.5 nm.

Fig. 6 is a partial cross-sectional view of example 3 of the present invention, and referring to fig. 6, it can be seen that in example 5, compared with example 3, a single layer of the silicon nitride layer 42 and the aluminum nitride layer 43 is replaced by a superlattice structure formed by two periods of stacked growth, while the total thickness is kept unchanged, the thickness of the single layer is reduced by introducing the superlattice, and adverse effects such as defects and internal stress caused by lattice mismatch between silicon nitride and gallium nitride and aluminum nitride and gallium nitride are significantly alleviated.

The above 5 embodiments demonstrate that the invention forms high resistance isolation by the composite N-type blocking layer 40, effectively blocks electrons from leaking to the non-doped layer with high defect density, and simultaneously forms a conical pit on the appearance, thereby reducing the total reflection of photons emitted from the active region in the epitaxial layer, reducing the probability that the photons enter the non-doped layer and are captured by the defects, and improving the light extraction ratio; in addition, the composite N-type barrier layer also plays a role in blocking defects and releasing stress. The size and the density of the conical pit are adjusted by adjusting the growth temperature and the thickness of the low-temperature gallium-nitrogen layer 41 in the composite N-type barrier layer 40; the invention adjusts the structural internal stress and warping state of the epitaxial wafer of the gallium nitride-based light-emitting diode by adjusting the number of layers, growth sequence, thickness and the like of the silicon-nitrogen layer 42 and the aluminum-nitrogen layer 43.

Example 6

The preparation method of this example is substantially the same as that of example 1 except that: depositing a first non-doped layer 301 on the surface of the buffer layer 20, depositing the composite N-type barrier layer 40 on the surface of the first non-doped layer 301, wherein the composite N-type barrier layer (40) is a low-temperature gallium-nitrogen layer 41, a silicon nitride layer 42 and an aluminum nitride layer 43, depositing a second non-doped layer 302 on the surface of the aluminum nitride layer 43, and depositing the N-type conducting layer 50 on the surface of the second non-doped layer.

Example 7

The preparation method of this example is substantially the same as that of example 1 except that: depositing the first conductive layer 501 on the surface of the non-doped layer 30, depositing the composite N-type barrier layer 40 on the surface of the first conductive layer 501, wherein the composite N-type barrier layer 40 is a low-temperature gallium-nitrogen layer 41, a silicon nitride layer 42 and an aluminum nitride layer 43, depositing the second conductive layer 502 on the surface of the aluminum nitride layer 43, and depositing the stress release layer 60 on the surface of the second conductive layer 502.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.