阅读说明：本技术 一种实时高精度卫星接收机本地时间修正方法 (Real-time high-precision satellite receiver local time correction method ) 是由 李建华 洪诗聘 王勋 李峰 刘峰 于 2018-06-26 设计创作，主要内容包括：本发明属于一种卫星导航接收机信息处理方法,具体涉及一种实时高精度卫星接收机本地时间修正方法。它包括如下步骤:第一步：修正50ms以内的部分；第二步：修正整50ms部分。本发明的优点是,利用此方法可以实现在卫星接收机定位过程中实时的,高精度的对本地时间进行修正,从而达到卫星接收机本地授时的功能,提高卫星接收机的应用领域。(The invention belongs to a satellite navigation receiver information processing method, and particularly relates to a real-time high-precision satellite receiver local time correction method. The method comprises the following steps: correcting the part within 50 ms; the second step is that: the full 50ms part is corrected. The method has the advantages that the method can realize real-time and high-precision correction of local time in the positioning process of the satellite receiver, thereby achieving the function of local time service of the satellite receiver and improving the application field of the satellite receiver.)

1. A real-time high-precision satellite receiver local time correction method is characterized by comprising the following steps: it comprises the following steps:

the first step is as follows: correcting the part within 50 ms;

the second step is that: the full 50ms part is corrected.

2. The method for correcting the local time of the real-time high-precision satellite receiver according to claim 1, wherein the method comprises the following steps: the first step is to correct the part within 50ms and finish the correction by adjusting the TIC count of the FPGA, and is realized by the following three registers:

1) a register is corrected by TAR1 within TIC weeks for second, and the part above the whole second is corrected;

2) correcting a register in a TAR0 TIC second inner segment by 0.1 ms-1 s, wherein the unit is 0.1ms, and the range is 1-10000;

3) TMCR TIC modulo configuration register, adjusted for less than 0.1ms, calculated with FPGA working clock 62M, the value is normally 6200, indicating that FPGA count is accumulated from 0 to 6200 and then is cleared 0, at this time TAR0 is added with 1, if local time is required to be made faster, the value is set to be a number less than 6200, otherwise, the value is set to be a number greater than 6200, the register is set to only influence the current 0.1ms count, the next 0.1ms count is restored to 6200,

4) the adjusting FPGA TIC counting step is as follows: the clock difference Dt of the satellite navigation positioning device is corrected, the Dt is converted into the corresponding adjustment quantities of TAR1, TAR0 and TMCR, the corresponding adjustment quantities are put into corresponding registers, thereby achieving the purpose of adjusting the second pulse,

5) it should be added that after the TAR0 or TAR1 is written, the PPS and 50ms of the FPGA are exactly aligned with the TIC for 50ms, so that after the first correction time, the clock error calculated again may still be in the order of ms, and after the second correction, the clock error tends to converge, which is around 1 e-7.

3. The method for correcting the local time of the real-time high-precision satellite receiver according to claim 1, wherein the method comprises the following steps: and the second step is a method for correcting the whole 50ms part by the fact that the UTC time corresponding to the PPS output time is possibly different by 50ms AFTER the first step of processing, a positioning calculation module performs positioning calculation once every 2 50ms, an FPGA RD _ PPS _ AFTER register value tdOrient is read in a 50ms interruption service function every time, the register represents that the 50ms is the several 50ms AFTER the PPS, the range is 0-19, 0 represents 50ms interruption at the same time as the PPS, 19 represents that 950ms has passed since the PPS, when the tdOrient% 2 is judged to be equal to 0, the observation quantity is latched and enters least square calculation, at the moment, the observation quantity latched is just passed, the time and the local time are the whole second time, and the UTC time output AFTER the positioning calculation is also the whole second.

Technical Field

The invention belongs to a satellite navigation receiver information processing method, and particularly relates to a real-time high-precision satellite receiver local time correction method.

Background

The 12-month-12 Beidou No. two first-stage formal service is provided in 2012, and a Beidou No. two satellite navigation system constellation first-stage satellite comprises 14 satellites, namely 5 geostationary synchronous orbit (GEO) satellites, 5 geostationary synchronous orbit (IGSO) satellites and 4 medium circular orbit (MEO) satellites. With the application of the Beidou second satellite navigation system, the BD2 satellite receiver is gradually applied at home and abroad, and meanwhile, a BD2 satellite navigation unit is integrated in a navigation guidance unit of a missile weapon of the I army. The integration of the BD2 satellite navigation unit enables the accurate guided weapon in China to get rid of the dependence on satellite navigation systems such as GPS, GLONASS and the like, realizes the independent and autonomous satellite navigation, and improves the availability and reliability of the system in the battlefield environment.

With the progress of science and technology, the establishment and application of a wide-range high-precision synchronous time system become more and more extensive, and a BD satellite system can provide a global time synchronization service. After the satellite receiver is positioned, a local position coordinate and a local clock error are obtained, the local clock error is directly compensated to a local time system by a traditional time service mode, so that the time systems of the local time system and the local time system are synchronized, but the precision and the real-time performance of the mode cannot be guaranteed

In terms of performance, satellite navigation user products including the BD2 are moving towards fast positioning, high sensitivity, high precision, miniaturization, low power consumption, combined navigation, and the like. With the development of the BD system, high-precision satellite receiver local time correction has been applied to a plurality of fields, and the requirements for a satellite receiver local time correction method are higher and higher, and the application fields are more and more.

Disclosure of Invention

The invention aims to provide a real-time high-precision satellite receiver local time correction method which can solve the problem that the satellite receiver local time correction is inaccurate.

The invention is realized in this way, a real-time high-precision satellite receiver local time correction method, which comprises the following steps:

the first step is as follows: correcting the part within 50 ms;

the second step is that: the full 50ms part is corrected.

The first step is to correct the part within 50ms and finish the correction by adjusting the TIC count of the FPGA, and is realized by the following three registers:

1) a register is corrected by TAR1 within TIC weeks for second, and the part above the whole second is corrected;

2) correcting a register in a TAR0 TIC second inner segment by 0.1 ms-1 s, wherein the unit is 0.1ms, and the range is 1-10000;

3) TMCR TIC modulo configuration register, adjusted for less than 0.1ms, calculated with FPGA working clock 62M, the value is normally 6200, indicating that FPGA count is accumulated from 0 to 6200 and then is cleared 0, at this time TAR0 is added with 1, if local time is required to be made faster, the value is set to be a number less than 6200, otherwise, the value is set to be a number greater than 6200, the register is set to only influence the current 0.1ms count, the next 0.1ms count is restored to 6200,

4) the adjusting FPGA TIC counting step is as follows: the clock difference Dt of the satellite navigation positioning device is corrected, the Dt is converted into the corresponding adjustment quantities of TAR1, TAR0 and TMCR, the corresponding adjustment quantities are put into corresponding registers, thereby achieving the purpose of adjusting the second pulse,

5) it should be added that after the TAR0 or TAR1 is written, the PPS and 50ms of the FPGA are exactly aligned with the TIC for 50ms, so that after the first correction time, the clock error calculated again may still be in the order of ms, and after the second correction, the clock error tends to converge, which is around 1 e-7.

And the second step is a method for correcting the whole 50ms part by the fact that the UTC time corresponding to the PPS output time is possibly different by 50ms AFTER the first step of processing, a positioning calculation module performs positioning calculation once every 2 50ms, an FPGA RD _ PPS _ AFTER register value tdOrient is read in a 50ms interruption service function every time, the register represents that the 50ms is the several 50ms AFTER the PPS, the range is 0-19, 0 represents 50ms interruption at the same time as the PPS, 19 represents that 950ms has passed since the PPS, when the tdOrient% 2 is judged to be equal to 0, the observation quantity is latched and enters least square calculation, at the moment, the observation quantity latched is just passed, the time and the local time are the whole second time, and the UTC time output AFTER the positioning calculation is also the whole second.

The method has the advantages that the method can realize real-time and high-precision correction of local time in the positioning process of the satellite receiver, thereby achieving the function of local time service of the satellite receiver and improving the application field of the satellite receiver.

Detailed Description

The invention will now be described in detail with reference to specific examples:

the observed quantity processing module obtains the local time of the satellite navigation positioning device, but the local clock difference is large and is not aligned for the whole second, and in order to meet the requirement of the satellite navigation positioning device for the alignment for the whole second of the local time, the local clock needs to be corrected. The time system of the positioning calculation module and the correction principle method thereof are explained as follows:

a) the PPS of the satellite receiver and 50ms interruption of the positioning calculation module are both given by the FPGA, the PPS is output to the outside of the satellite receiver, and the FPGA is output to the positioning calculation module. The two are interrelated, i.e. one PPS occurs at 20 interrupts of 50ms, and the two are strictly synchronized. The calculation frequency of the positioning calculation module is 10Hz, namely, positioning calculation is carried out once every 2 times of 50 ms.

b) The local time of the satellite receiver is accumulated in the FPGA, and is called an FPGA TIC unit. The TIC unit starts accumulation from 0 when being powered on; after receiving the local time preset by the positioning resolving module, starting accumulation by using a local time starting point; after receiving a time correction instruction of the positioning calculation module (before the time correction instruction, the TIC unit is not related to the PPS and the 50ms interrupt), the PPS and the 50ms interrupt starting point are adjusted according to the full 50ms time, and the PPS is strictly output in the full second of the UTC at the moment.

c) And after the positioning calculation module acquires the transmitting time of the two former satellites and compares the transmitting time with the transmitting time of the two former satellites, the acquired week and week seconds are put into an FPGA related register according to a TIC format. After FPGA TIC presetting is completed, the positioning resolving module latches an FPGA TIC register after responding to FPGA observed quantity interruption every 50ms to obtain accumulated local time, and the local time comprises a satellite receiver clock difference dt which represents the time difference between a satellite receiver clock and an on-satellite atomic clock.

d) And the positioning resolving module obtains the pseudo range, pseudo range rate and position speed of at least 4 satellites, then performs least square resolving to obtain carriers x, y and z and satellite receiver clock error dt, and performs local clock correction by using the satellite receiver clock error dt.

e) The local clock correction is divided into two steps, the first step is to operate a TIC unit of a satellite signal processing module, small correction within 50ms is carried out, when the corrected local clock error is smaller than 0.1 mu s, counting is started, pseudo range smoothing is started after the counting exceeds 3 times, positioning information is effectively output after the counting exceeds 13 times, through the first step, the PPS is aligned with the real whole second, but the UTC time interval with the FPGA is changed into the whole 50ms, namely the output data packet time information is 0.05s, 0.15s instead of 0.0s and 0.1s (10Hz calculation), and the second step is carried out; in the second step, the PPS is aligned with the real whole second interval by adjusting the rhythm of the 50ms period entering positioning calculation, and simultaneously, the output UTC time is 0.0s, 0.1s, 0.2s …, 1.0s and 1.1s ….

According to the time correction principle and method, the real-time high-precision satellite receiver local time correction method is specifically realized by two steps:

the first step is as follows: correcting parts within 50ms

Correcting the part within 50ms is completed by adjusting the TIC count of the FPGA, and the correction is realized by the following three registers:

1) a register is corrected by TAR1 within TIC weeks for second, and the part above the whole second is corrected;

2) correcting a register in a TAR0 TIC second inner segment by 0.1 ms-1 s, wherein the unit is 0.1ms, and the range is 1-10000;

3) the TMCR TIC mode configures the register, adjusts the part below 0.1ms, and is calculated by the FPGA working clock 62M, the value is normally 6200, which represents that the FPGA count is accumulated from 0 to 6200 and then is cleared from 0, and at this time, TAR0 is added with 1. If it is necessary to make the local time faster, the value is set to a number smaller than 6200, otherwise to a number larger than 6200. Setting this register only affects the current 0.1ms count, and the next 0.1ms count is restored to 6200.

4) The adjusting FPGA TIC counting step is as follows: the clock difference Dt of the satellite navigation positioning device is corrected, the Dt is converted into the corresponding adjustment quantities of TAR1, TAR0 and TMCR, and the corresponding adjustment quantities are placed into corresponding registers, so that the purpose of adjusting the second pulse is achieved.

5) It should be added that after the TAR0 or TAR1 is written, the PPS and 50ms of the FPGA are exactly aligned with the TIC for 50ms, so that after the first correction time, the clock error calculated again may still be in the order of ms, and after the second correction, the clock error tends to converge, which is around 1 e-7.

The second step is that: correcting the full 50ms part

After the first step of processing, the UTC time corresponding to the PPS output time may be different by 50 ms. The method of correcting the full 50ms portion is exemplified below. The positioning calculation module carries out positioning calculation once every 2 50ms, reads the register value tdOrient of the FPGA RD _ PPS _ AFTER in the 50ms interruption service function every time, the register represents that the 50ms is the next 50ms of the PPS, the range is 0-19, 0 represents 50ms interruption at the same time with the PPS, and 19 represents that 950ms has passed from the PPS. And when the tdOrient% 2 is judged to be equal to 0, latching the observed quantity and performing least square solution, wherein the fact that the PPS just passes is shown, the latched observed quantity and the local time are the time of a whole second, and the UTC time output after positioning solution is also the time of a whole second.

The method is based on clock error correction, and the method is adopted to realize the local time correction method of the real-time high-precision satellite receiver, and the precision reaches 1e-7 after the local time correction.