Battery management system board-splitting coding method

文档序号:1688808 发布日期:2020-01-03 浏览:4次 中文

阅读说明:本技术 电池管理系统分板编码方法 (Battery management system board-splitting coding method ) 是由 易龙全 李连兴 刘波 于 2019-09-10 设计创作,主要内容包括:本发明公开了一种电池管理系统分板编码方法,包括BMS和K个依次串联的分板;其中:第1个分板的输入引脚与BMS的输出端口连接,第K个分板的输出引脚与BMS的输入端口连接;其编码方法包括以下步骤:在BMS识别到需要进行分板编号时,通过BMS的输出端口输出一个周期的高电平;所述分板记录本周期和上一周期输入引脚的电平信号,如果本周期或上一周期的输入引脚为高电平,分板将输出引脚置为高电平;每个分板的输入引脚的高电平的周期数即为分板的ID号。本发明使用两个硬线通过电平控制,实现区分电池模组实际位置和给分板编写与实际位置相同的ID编号,能够有效避免在使用过程中因通信出现问题造成编号错误的情况。(The invention discloses a battery management system board dividing coding method, which comprises a BMS and K boards which are sequentially connected in series; wherein: an input pin of the 1 st sub-board is connected with an output port of the BMS, and an output pin of the Kth sub-board is connected with an input port of the BMS; the coding method comprises the following steps: when the BMS identifies that the board dividing numbering is needed, outputting a high level of one period through an output port of the BMS; the branch board records level signals of input pins in the period and the previous period, and if the input pins in the period or the previous period are high levels, the branch board sets output pins to be high levels; the high-level cycle number of the input pin of each branch board is the ID number of the branch board. The battery module identification method and the battery module identification device have the advantages that the two hard wires are used for realizing the distinguishing of the actual position of the battery module and the compiling of the ID number which is the same as the actual position for the sub-board through level control, and the condition of wrong numbering caused by communication problems in the use process can be effectively avoided.)

1. A battery management system board-splitting coding method is characterized in that: the device comprises a BMS and K sub-boards which are sequentially connected in series; wherein: an input pin of the 1 st sub-board is connected with an output port of the BMS, and an output pin of the Kth sub-board is connected with an input port of the BMS; the connection relationship between any two adjacent sub-boards is as follows: an input pin of the ith sub-board is connected with an output pin of the (i-1) th sub-board, and i is more than or equal to 2 and less than or equal to K; the coding method comprises the following steps:

when the BMS identifies that the board dividing numbering is needed, outputting a high level of one period through an output port of the BMS;

the branch board records level signals of input pins in the period and the previous period, and if the input pins in the period or the previous period are high levels, the branch board sets output pins to be high levels;

the high-level cycle number of the input pin of each branch board is the ID number of the branch board.

2. The battery management system board-splitting coding method according to claim 1, wherein: the input pin of the 1 st sub-board is connected with the output port of the BMS through a hard wire.

3. The battery management system board-splitting coding method according to claim 1 or 2, wherein: and the input pin of the ith sub-board is connected with the output pin of the (i-1) th sub-board through a hard wire.

4. The battery management system board-splitting coding method according to claim 3, wherein: and the output pin of the Kth sub-board is connected with the input port of the BMS through a hard wire.

Technical Field

The invention belongs to the technical field of lithium ion battery management systems of power automobiles, and particularly relates to a plate-dividing coding method of a battery management system.

Background

Power battery is new energy automobile's energy memory, and power battery generally possesses a plurality of battery modules, and every battery module possesses a basic signal acquisition management circuit (being the branch board), divides the board to pass through the network with information collection and to convey BMS (being the mainboard). If communication between the main board and each sub-board is to be realized, the ID number of each sub-board must be determined, and the main board can distinguish information transmitted by different sub-boards.

Currently, there are several ways to determine the number of the sub-boards:

(1) writing a fixed number to each sub-board;

(2) different sub-boards are distinguished through the combination of a plurality of groups of hard wires;

(3) the method for carrying out automatic numbering by using IO wiring and communication specifically comprises the following steps: the output of the system hard wire is sequentially pulled up, and then the next sub-board inputs an activated number sub-board, and then different ID numbers are sequentially sent to the sub-boards through the CAN wire to be stored.

The second and third modes are often used because the first mode requires different numbers to be written into different sub-boards and to be mounted in fixed positions, which is a high requirement for production and management. But the second mode uses a plurality of groups of hard wires, so that the economy is poor; and the third mode uses the communication mode, so that the situation of numbering error caused by communication failure can occur in use.

Therefore, a new battery management system split-board coding method is developed.

Disclosure of Invention

The invention aims to provide a battery management system board-splitting coding method, which uses two hard wires to realize the distinguishing of the actual position of a battery module and the compiling of an ID number which is the same as the actual position for a board-splitting through level control.

The invention relates to a battery management system board dividing coding method, which comprises a BMS and K boards which are sequentially connected in series; wherein: an input pin of the 1 st sub-board is connected with an output port of the BMS, and an output pin of the Kth sub-board is connected with an input port of the BMS; the connection relationship between any two adjacent sub-boards is as follows: an input pin of the ith sub-board is connected with an output pin of the (i-1) th sub-board, and i is more than or equal to 2 and less than or equal to K; the coding method comprises the following steps:

when the BMS identifies that the board dividing numbering is needed, outputting a high level of one period through an output port of the BMS;

the branch board records level signals of input pins in the period and the previous period, and if the input pins in the period or the previous period are high levels, the branch board sets output pins to be high levels;

the high-level cycle number of the input pin of each branch board is the ID number of the branch board.

Further, the input pin of the 1 st sub-board is connected with the output port of the BMS through a hard wire.

Furthermore, an input pin of the ith sub-board is connected with an output pin of the (i-1) th sub-board through a hard wire.

Further, the output pin of the kth sub-board is connected with the input port of the BMS through a hard wire.

The invention has the following advantages: two hard wires are used for controlling through the level, the actual position of the battery module is distinguished, the ID number which is the same as the actual position is compiled for the sub-board, and the condition that the number is wrong due to the fact that communication is failed in the using process can be effectively avoided.

Drawings

FIG. 1 is a schematic view of the BMS and the sub-board IO wiring;

FIG. 2 is a sequence diagram of the numbering sequence of the plates.

Detailed Description

The invention will be further explained with reference to the drawings.

As shown in fig. 1, a battery management system board coding method includes a BMS (i.e., a battery management system) and K boards connected in series in sequence; wherein: the input pin of the 1 st sub-board is connected with the output port of the BMS, namely, the level signal of the input pin of the 1 st sub-board is equal to the level signal of the output port of the BMS; an output pin of the Kth sub-board is connected with an input port of the BMS; the connection relationship between any two adjacent sub-boards is as follows: an input pin of the ith sub-board is connected with an output pin of the (i-1) th sub-board, namely a level signal of the input pin of the ith sub-board is equal to a level signal of the output pin of the (i-1) th sub-board, and i is more than or equal to 2 and less than or equal to K; the coding method comprises the following steps:

when the BMS identifies that the board dividing numbering is needed, outputting a high level of one period through an output port of the BMS;

the branch board records level signals of input pins in the period and the previous period, and if the input pins in the period or the previous period are high levels, the branch board sets output pins to be high levels;

the high-level cycle number of the input pin of each branch board is the ID number of the branch board.

In this embodiment, the specific process of encoding is as follows:

in the first period: when the BMS recognizes that the board splitting numbering is required, the output of the output port out of the BMS is at a high level, so the output of the output pin out1 of the 1 st board splitter is at a high level, the input pin in2 of the 2 nd board splitter is at a high level, the output pin out2 of the 2 nd board splitter is at a high level, and so on, and the input pins and the output pins of all the board splitters are at a high level, see fig. 2.

And a second period: the output port out of the BMS is low, the input pin of the 1 st board is low, but the input pin in1 of the first board is high in the previous cycle, so the output pin out1 of the 1 st board is high, the input pin in2 of the 2 nd board is high, the output pin out2 is also high, and so on, the input and output of the 2 nd to K th boards are all high, see fig. 2.

The third cycle: the output port out of the BMS is at a low level, and the input pin in1 of the 1 st sub-board is at a low level in the present cycle and the previous cycle, so the output pin out1 of the 1 st sub-board is at a low level, the input pin in2 of the 2 nd sub-board is at a low level, but the input pin in2 of the 2 nd sub-board is at a high level in the previous cycle, so the output pin out2 of the 2 nd sub-board is at a high level, and it is deduced in order that the input and output of the 3 rd to the K th sub-boards are all at a high level, see fig. 2.

By analogy, in the K-th period, the K-th board input pin inK is at a high level, and becomes a low level after K +1 periods. Therefore, the number of high cycles of the input pin of each division board is the ID number of the division board.

Taking 9 sub-boards as an example, the level signals of the input pins and the output pins of each sub-board obtained according to the method are as follows:

Figure BDA0002197982660000031

from the above table, the high level cycle number of the 1 st partial board input pin in1 is 1, that is, the ID number of the 1 st partial board is 1; the high level cycle number of the 2 nd subplate input pin in2 is 2, that is, the ID number of the 2 nd subplate is 2; the high level cycle number of the 3 rd subplate input pin in3 is 3, that is, the ID number of the 3 rd subplate is 3; the high level cycle number of the 4 th subplate input pin in4 is 4, that is, the ID number of the 4 th subplate is 4; the high level cycle number of the 5 th subplate input pin in5 is 5, that is, the ID number of the 5 th subplate is 5; the high level cycle number of the 6 th subplate input pin in6 is 6, that is, the ID number of the 6 th subplate is 6; the high level cycle number of the 7 th subplate input pin in7 is 7, that is, the ID number of the 7 th subplate is 7; the high level cycle number of the 8 th subplate input pin in8 is 8, that is, the ID number of the 8 th subplate is 8; the high cycle number of the 9 th minute plate input pin in9 is 9, i.e., the ID number of the 9 th minute plate is 9.

In this embodiment, the input pin of the 1 st board is connected to the output port of the BMS by a hard wire. And the input pin of the ith sub-board is connected with the output pin of the (i-1) th sub-board through a hard wire. And the output pin of the Kth sub-board is connected with the input port of the BMS through a hard wire.

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