阅读说明：本技术 一种具有低运算量特性的卫星导航信号捕获装置及方法 (Satellite navigation signal capturing device and method with low operand characteristic ) 是由 赵鹏 苏畅 马力 于 2021-11-09 设计创作，主要内容包括：本发明公开了一种具有低运算量特性的卫星导航信号捕获装置及方法。装置包括数据缓存模块,用于数据单路串行写入和双路奇偶并行读出；伪码缓存模块,用于伪码单路串行写入和双路奇偶并行读出；偶数据相关运算模块,用于偶数据和偶伪码的并行相关运算；奇数据相关运算模块,用于奇数据和奇伪码的并行相关运算；偶相关值后处理模块,用于偶相关值的运算、时频转换、包络累加、取大判决,输出偶相关的捕获结果；奇相关值后处理模块,用于奇相关值的运算、时频转换、包络累加、取大判决,输出奇相关的捕获结果；判决模块,用于比较偶相关值后处理模块和奇相关值后处理模块的结果,并输出最终捕获结果。本发明所需进行的运算量降低一半,节省逻辑资源。(The invention discloses a satellite navigation signal capturing device and method with low operand characteristic. The device comprises a data cache module, a data read-in module and a data read-out module, wherein the data cache module is used for single-path serial write-in and double-path odd-even parallel read-out of data; the pseudo code cache module is used for pseudo code single-path serial writing and double-path odd-even parallel reading; the even data correlation operation module is used for parallel correlation operation of the even data and the even pseudo code; the odd data correlation operation module is used for parallel correlation operation of odd data and odd pseudo codes; the even correlation value post-processing module is used for calculating the even correlation value, performing time-frequency conversion, performing envelope accumulation, taking a large judgment and outputting a capture result of the even correlation; the odd correlation value post-processing module is used for computing odd correlation values, performing time-frequency conversion, performing envelope accumulation, taking large judgment and outputting odd correlation capture results; and the judgment module is used for comparing the results of the even correlation value post-processing module and the odd correlation value post-processing module and outputting a final capture result. The invention reduces the operation amount by half and saves logic resources.)

1. A satellite navigation signal acquisition apparatus having a low computation load characteristic, comprising:

the data cache module is used for single-path serial writing and double-path odd-even parallel reading of data;

the pseudo code cache module is used for pseudo code single-path serial writing and double-path odd-even parallel reading;

the even data correlation operation module is used for parallel correlation operation of the even data and the even pseudo code;

the odd data correlation operation module is used for parallel correlation operation of odd data and odd pseudo codes;

the even correlation value post-processing module is used for calculating the even correlation value, performing time-frequency conversion, performing envelope accumulation, taking a large judgment and outputting a capture result of the even correlation;

the odd correlation value post-processing module is used for computing odd correlation values, performing time-frequency conversion, performing envelope accumulation, taking large judgment and outputting odd correlation capture results;

the judgment module is used for comparing the results of the even correlation value post-processing module and the odd correlation value post-processing module and outputting a final capture result, wherein the final capture result comprises a maximum envelope value, an envelope mean value, Doppler and a pseudo code phase;

the output even data of the data cache module and the output even pseudo code of the pseudo code cache module are both connected with the even data correlation operation module, the output odd data of the data cache module and the output odd pseudo code of the pseudo code cache module are both connected with the odd data correlation operation module, the even data correlation operation module and the odd data correlation operation module are both connected with the even correlation value post-processing module, the even data correlation operation module and the odd data correlation operation module are also both connected with the odd correlation value post-processing module, and the even correlation value post-processing module and the odd correlation value post-processing module are both connected with the judgment module.

2. The satellite navigation signal capturing device with low computation load characteristic of claim 1, wherein the even data correlation operation module includes a first delay unit and a first accumulator connected in sequence, the phase difference between adjacent first accumulators differs by one chip, the output even data of the data buffer module is connected with the first accumulator, and the output even pseudo code of the pseudo code buffer module is connected with both the first delay unit and the first accumulator.

3. The satellite navigation signal capturing device with low computation load characteristic of claim 1, wherein the odd data correlation operation module includes a second delay unit and a second accumulator connected in sequence, the phase difference between adjacent second accumulators differs by one chip, the output odd data of the data buffer module is connected with the second accumulator, and the output odd pseudo code of the pseudo code buffer module is connected with both the second delay unit and the second accumulator.

4. The apparatus according to claim 1, wherein the even correlation value post-processing module comprises a first multiplexer, a first adder, a first correlation buffer unit, a first time-frequency conversion unit, a first envelope buffer unit, and a first maximum decision unit, which are connected in sequence.

5. The apparatus according to claim 1, wherein the odd correlation value post-processing module comprises a second multiplexer, a second adder, a second correlation buffer unit, a second time-frequency conversion unit, a second envelope buffer unit, and a second maximum decision unit, which are connected in sequence.

6. A method for acquiring a satellite navigation signal with low computation load characteristic according to any one of claims 1-5, characterized by comprising the following steps:

s1, serially writing the data in the data cache module in a single-way manner, and serially writing the pseudo code in the pseudo code cache module in a single-way manner;

s2, inputting the output even data of the data cache module and the output even pseudo code of the pseudo code cache module into the even data correlation operation module for parallel correlation operation;

s3, inputting the output odd data of the data cache module and the output odd pseudo code of the pseudo code cache module into the odd data correlation operation module for parallel correlation operation;

s4, performing operation, time-frequency conversion, envelope accumulation and big judgment of the even correlation value through the even correlation value post-processing module, outputting an even correlation capture result, and performing operation, time-frequency conversion, envelope accumulation and big judgment of the odd correlation value through the odd correlation value post-processing module, and outputting an odd correlation capture result;

and S5, comparing the even correlation capture result of the even correlation value post-processing module with the odd correlation capture result of the odd correlation value post-processing module through the judgment module, and outputting a final capture result, wherein the final capture result comprises a maximum envelope value, an envelope mean value, Doppler and a pseudo code phase.

Technical Field

The present invention relates to the field of satellite navigation technologies, and in particular, to a satellite navigation signal capturing device and method with low computation workload.

Background

The trend towards miniaturization of navigation receivers requires receivers with lower power consumption, and acquisition modules that require large amounts of computation are an important component of receiver power consumption. The time-frequency combination based segmented coherent navigation signal acquisition algorithm is widely used in practical application due to excellent performance, and comprises the processes of data and pseudo code segmented correlation, time-frequency conversion, post accumulation, result judgment and the like. Application number 202110519630.X discloses a satellite navigation signal capturing system and method based on time division multiplexing technology, which adopts time division multiplexing technology, as shown in fig. 1, by increasing processing clock frequency, the number of required relevant accumulators can be reduced by times, logic resources of a capturing module are reduced, the designed data rate of the capturing system is 2 times of pseudo code rate, any two adjacent accumulators in a relevant operation unit formed by a delay unit and an accumulator have a difference of a pseudo code phase of half chip, the odd and even half chip pseudo codes are completely the same, namely, each two adjacent accumulators have repeated calculation, therefore, the increase of processing clock frequency can bring about the increase of power consumption and the difficulty of chip layout and wiring. For this reason, it is necessary to develop a satellite navigation signal capturing apparatus with low computation load characteristics.

Disclosure of Invention

The invention aims to provide a satellite navigation signal capturing device and method with low computation quantity characteristic, so as to overcome the defects in the prior art.

In order to achieve the purpose, the technical scheme adopted by the invention is as follows:

a satellite navigation signal acquisition apparatus having a low computation load characteristic, comprising:

the data cache module is used for single-path serial writing and double-path odd-even parallel reading of data;

the pseudo code cache module is used for pseudo code single-path serial writing and double-path odd-even parallel reading;

the even data correlation operation module is used for parallel correlation operation of the even data and the even pseudo code;

the odd data correlation operation module is used for parallel correlation operation of odd data and odd pseudo codes;

the even correlation value post-processing module is used for calculating the even correlation value, performing time-frequency conversion, performing envelope accumulation, taking a large judgment and outputting a capture result of the even correlation;

the odd correlation value post-processing module is used for computing odd correlation values, performing time-frequency conversion, performing envelope accumulation, taking large judgment and outputting odd correlation capture results; and

the judgment module is used for comparing the results of the even correlation value post-processing module and the odd correlation value post-processing module and outputting a final capture result, wherein the final capture result comprises a maximum envelope value, an envelope mean value, Doppler and a pseudo code phase;

the output even data of the data cache module and the output even pseudo code of the pseudo code cache module are both connected with the even data correlation operation module, the output odd data of the data cache module and the output odd pseudo code of the pseudo code cache module are both connected with the odd data correlation operation module, the even data correlation operation module and the odd data correlation operation module are both connected with the even correlation value post-processing module, the even data correlation operation module and the odd data correlation operation module are also both connected with the odd correlation value post-processing module, and the even correlation value post-processing module and the odd correlation value post-processing module are both connected with the judgment module.

Further, the even data correlation operation module comprises a first delay unit and a first accumulator which are connected in sequence, the phase difference between the adjacent first accumulators is one chip, the output even data of the data cache module is connected with the first accumulator, and the output even of the pseudo code cache module is connected with the first delay unit and the first accumulator.

Furthermore, the odd data correlation operation module comprises a second delay unit and a second accumulator which are connected in sequence, the phase difference between the adjacent second accumulators is one chip, the output odd data of the data cache module is connected with the second accumulator, and the output odd pseudo code of the pseudo code cache module is connected with the second delay unit and the second accumulator.

Further, the even correlation value post-processing module includes a first multiplexer, a first adder, a first correlation buffer unit, a first time-frequency conversion unit, a first envelope buffer unit, and a first maximum decision unit, which are connected in sequence.

Further, the odd correlation value post-processing module includes a second multiplexer, a second adder, a second correlation buffer unit, a second time-frequency conversion unit, a second envelope buffer unit, and a second maximum decision unit, which are connected in sequence.

The invention also provides a method for acquiring the satellite navigation signal with the low computation load characteristic, which comprises the following steps:

s1, serially writing the data in the data cache module in a single-way manner, and serially writing the pseudo code in the pseudo code cache module in a single-way manner;

s2, inputting the output even data of the data cache module and the output even pseudo code of the pseudo code cache module into the even data correlation operation module for parallel correlation operation;

s3, inputting the output odd data of the data cache module and the output odd pseudo code of the pseudo code cache module into the odd data correlation operation module for parallel correlation operation;

s4, performing operation, time-frequency conversion, envelope accumulation and big judgment of the even correlation value through the even correlation value post-processing module, outputting an even correlation capture result, and performing operation, time-frequency conversion, envelope accumulation and big judgment of the odd correlation value through the odd correlation value post-processing module, and outputting an odd correlation capture result;

and S5, comparing the even correlation capture result of the even correlation value post-processing module with the odd correlation capture result of the odd correlation value post-processing module through the judgment module, and outputting a final capture result, wherein the final capture result comprises a maximum envelope value, an envelope mean value, Doppler and a pseudo code phase.

Compared with the prior art, the invention has the advantages that: under the condition of the same capturing performance, the required operation amount is reduced by half, the required processing clock frequency is reduced by half, the power consumption of the capturing module can be obviously reduced, the required accumulation times of each accumulator are also reduced by half, the bit number of the accumulator is reduced by 1bit, and the logic resource can be saved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic diagram of the prior art.

Fig. 2 is a schematic diagram of a satellite navigation signal capturing device with low computation load characteristic according to the present invention.

FIG. 3 is a schematic diagram of data writing and reading of the data cache module according to the present invention.

FIG. 4 is a schematic diagram of data writing and reading of the pseudo code cache module according to the present invention.

FIG. 5 is a timing diagram of the data correlation operation module according to the present invention.

Fig. 6 is a block diagram of an even correlation value post-processing module according to the present invention.

Fig. 7 is a block diagram of an odd correlation value post-processing block in the present invention.

Detailed Description

The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, and the scope of the present invention will be more clearly and clearly defined.

Setting data with 2 times of pseudo code rate as d (n), setting the pseudo code with 2 times of pseudo code rate as c (n), wherein two adjacent half code chips are the same as follows:

c(0)=c(1), c(2)=c(3), ……

and setting the segment correlation value as r (k), then:

r(0)=c(0)d(0)+c(1)d(1)+c(2)d(2)+c(3)d(3)+……

r(1)=c(0)d(1)+c(1)d(2)+c(2)d(3)+c(3)d(4)+ ……

r(2)=c(0)d(2)+c(1)d(3)+c(2)d(4)+c(3)d(5)+ ……

r(3)=c(0)d(3)+c(1)d(4)+c(2)d(5)+c(3)d(6)+ ……

as can be seen from the above formula, c (1) d (1) is the same as c (0) d (1), c (1) d (2) is the same as c (0) d (2), and adjacent r (k) have combinable calculations, the invention divides data and pseudo code into odd and even paths for parallel operation, and sets the correlation value of the even data as even (k):

even(0)=c(0)d(0)+c(2)d(2)+c(4)d(4)+c(6)d(6)+ ……

even(1)=c(0)d(2)+c(2)d(4)+c(4)d(6)+c(6)d(8)+ ……

even(2)=c(0)d(4)+c(2)d(6)+c(4)d(8)+c(6)d(10)+ ……

even(3)=c(0)d(6)+c(2)d(8)+c(4)d(10)+c(6)d(12)+ ……

let odd data correlation values be odd (k):

odd(0)=c(1)d(1)+c(3)d(3)+c(5)d(5)+c(7)d(7)+ ……

odd(1)=c(1)d(3)+c(3)d(5)+c(5)d(7)+c(7)d(9)+ ……

odd(2)=c(1)d(5)+c(3)d(7)+c(5)d(9)+c(7)d(11)+ ……

odd(3)=c(1)d(7)+c(3)d(9)+c(5)d(11)+c(7)d(13)+ ……

the correlation values r (k) can be combined into:

r(0)=c(0)d(0)+c(1)d(1)+c(2)d(2)+c(3)d(3)+ ……

=even(0)+odd(0)

r(1)=c(0)d(1)+c(1)d(2)+c(2)d(3)+c(3)d(4)+ ……

=even(1)+odd(0)

r(2)=c(0)d(2)+c(1)d(3)+c(2)d(4)+c(3)d(5)+ ……

=even(1)+odd(1)

r(3)=c(0)d(3)+c(1)d(4)+c(2)d(5)+c(3)d(6)+ ……

=even(2)+odd(1)

based on this, the invention uses the above-mentioned special information to divide the data and pseudo code into odd and even parts to do independent correlation operation, the number of accumulators of each correlation operation module is shortened 1/2, the number of times of accumulation of each accumulator is reduced 1/2, thus the operation amount is reduced 1/2.

Referring to fig. 2, the present embodiment discloses a satellite navigation signal capturing device with low computation load, including:

the data cache module 1 is used for single-path serial write-in and double-path odd-even parallel read-out of data, the rate of data write-in is 2 times of pseudo code rate, and the rate of data read-out is processing clock frequency, as shown in fig. 3.

The pseudo code cache module 2 is used for pseudo code single-path serial writing and double-path odd-even parallel reading, the pseudo code writing rate is the processing clock frequency, and the pseudo code reading rate is the processing clock frequency, as shown in fig. 4. Where C (n) is a single rate pseudo code, C (0) = C (1), C (1) = C (2) = C (3), and so on. The data buffer module 1 and the pseudo code buffer module 2 in fig. 2 have single buffer units of blk0, blk1, blk2 and blk3, respectively.

And the even data correlation operation module 3 is used for parallel correlation operation of even data and even pseudo codes, the phase difference between adjacent delay units and accumulators is 1 chip, and an accumulation result timing diagram 5 of the adjacent accumulators shows that the output of the two adjacent accumulators effectively has a difference of exactly 1 processing clock period.

The odd data correlation operation module 4 is used for parallel correlation operation of odd data and odd pseudo codes, the phase difference between adjacent delay unit-accumulators is 1 chip, the accumulated result timing sequence of adjacent accumulators is shown in fig. 5, it can be seen that the outputs of two adjacent accumulators are effective and have a difference of exactly 1 processing clock period, it can be seen that even (0) and odd (0) are effective simultaneously, even (1) and odd (1) are effective simultaneously, and so on.

And an even correlation value post-processing module 5, configured to perform operation on the even correlation value, perform time-frequency conversion, perform envelope accumulation, perform large decision taking, and output an even correlation capture result, as shown in fig. 6. The method specifically comprises the following steps: dividing even (0) and odd (0) into a group, dividing even (1) and odd (1) into a group, repeating the steps, outputting gated even (k) and odd (k) after passing through a multiplexer, sequentially entering an adder to obtain even correlation values, writing the even correlation values into a correlation cache unit, performing time-frequency conversion, envelope accumulation and large-size judgment, and outputting a maximum envelope value, an average envelope value, Doppler and a pseudo code phase.

Specifically, the even correlation value post-processing module 5 includes a first multiplexer, a first adder, a first correlation buffer unit, a first time-frequency conversion unit, a first envelope buffer unit, and a first maximum decision unit, which are connected in sequence.

And an odd correlation value post-processing module 6, configured to perform odd correlation value operation, time-frequency conversion, envelope accumulation, and large decision taking, and output an odd correlation capture result, as shown in fig. 7. Dividing even (1) and odd (0) into a group, dividing even (2) and odd (1) into a group, repeating the steps, outputting gated even (k +1) and odd (k) through a multiplexer, sequentially entering an adder to obtain each odd correlation value, writing each odd correlation value into a related cache unit, performing time-frequency conversion, envelope accumulation and large-decision taking, and outputting a maximum envelope value, an average envelope value, Doppler and a pseudo code phase.

Specifically, the odd correlation value post-processing module 6 includes a second multiplexer, a second adder, a second correlation buffer unit, a second time-frequency conversion unit, a second envelope buffer unit, and a second maximum decision unit, which are connected in sequence.

And the judgment module 7 is used for comparing the results of the even correlation value post-processing module 5 and the odd correlation value post-processing module 6 and outputting a final capture result, wherein the final capture result comprises a maximum envelope value, an envelope mean value, Doppler and a pseudo code phase.

The output even data of the data cache module 1 and the output even pseudo code of the pseudo code cache module 2 are both connected with an even data correlation operation module 3, the output odd data of the data cache module 1 and the output odd pseudo code of the pseudo code cache module 2 are both connected with an odd data correlation operation module 4, the even data correlation operation module 3 and the odd data correlation operation module 4 are both connected with an even correlation value post-processing module 5, the even data correlation operation module 3 and the odd data correlation operation module 4 are also both connected with an odd correlation value post-processing module 6, and the even correlation value post-processing module 5 and the odd correlation value post-processing module 6 are both connected with a decision module 7.

Specifically, the even data correlation operation module 3 includes a first delay unit 30 and a first accumulator 31 which are connected in sequence, a phase difference between adjacent first accumulators 31 is one chip, the output even data of the data buffer module 1 is connected with the first accumulator 31, and the output even pseudo code of the pseudo code buffer module 2 is connected with both the first delay unit 30 and the first accumulator 31.

Specifically, the odd data correlation operation module 4 includes a second delay unit 40 and a second accumulator 41 which are connected in sequence, a phase difference between adjacent second accumulators 41 is one chip, the output odd data of the data buffer module 1 is connected with the second accumulator 41, and the output odd pseudo code of the pseudo code buffer module 2 is connected with both the second delay unit 40 and the second accumulator 41.

The invention provides a satellite navigation signal capturing method with low operand characteristic, which comprises the following steps:

step S1, writing data into the data cache module 1 in a single-path serial manner, and writing pseudo code into the pseudo code cache module 2 in a single-path serial manner;

step S2, inputting the output even data of the data cache module 1 and the output even pseudo code of the pseudo code cache module 2 into the even data correlation operation module 3 for parallel correlation operation;

step S3, inputting the output odd data of the data cache module 1 and the output odd pseudo code of the pseudo code cache module 2 into the odd data correlation operation module 4 for parallel correlation operation;

step S4, the even correlation value post-processing module 5 is used for carrying out operation, time-frequency conversion, envelope accumulation and big judgment on the even correlation value, the even correlation capturing result is output, and the odd correlation value post-processing module 6 is used for carrying out operation, time-frequency conversion, envelope accumulation and big judgment on the odd correlation value, and the odd correlation capturing result is output;

step S5, comparing the even correlation capture result of the even correlation value post-processing module 5 with the odd correlation capture result of the odd correlation value post-processing module 6 by the decision module 7, and outputting a final capture result, where the final capture result includes a maximum envelope value, an envelope mean value, doppler, and a pseudo code phase.

The invention is further illustrated by the following specific examples.

Taking the B3I signal capture of the beidou navigation system as an example, the pseudo code rate of the B3I signal is 10.23Mbps, the pseudo code period is 1ms, the number of chips of 1 pseudo code period is 10230, and the sampling rate is set to 2 times the pseudo code rate, namely 20.46Msps, so that the number of sampling points in 1 pseudo code period is 20460, and the integral power multiple of 2 is 20480 sampling points. A time-frequency combined segmentation related capturing method is adopted, the number of segments is set to be M =10, the number of points in each segment is set to be N =20480/10=2048, and the number of points of a phase required to be correlated for each segment is set to be 2048.

In the data caching module 1, data is quantized by 2 bits, a writing port is configured to be 8192 in depth and 2 bits in width; the read port is configured to be 4096 in depth and 4 bits in width, namely, parity path data is output in parallel.

In the pseudo code caching module 2, 1bit quantization is adopted for pseudo codes, a write port is configured to be 4096 in depth, and the width is 1 bit; the read port is configured to be 4096 in depth and 1bit in width, and the pseudo code output of the odd-even circuit is the same.

The even data correlation operation module 3 comprises a delay unit 30 and accumulators 31, and the number of the accumulators is 129.

The odd data correlation operation module 4 comprises a delay unit 40 and accumulators 41, and the number of the accumulators is 129.

The even correlation value post-processing module 5 obtains 128 even correlation values through one-time segmentation correlation, time division multiplexing is carried out for 8 times, operation of 1024 even segmentation correlation values is completed, and even correlation capture results are output after time-frequency conversion, envelope accumulation and large judgment.

The odd correlation value post-processing module 6 obtains 128 odd correlation values by one-time segment correlation, performs time division multiplexing for 8 times, completes the operation of 1024 odd segment correlation values, and outputs an odd correlation capturing result after time-frequency conversion, envelope accumulation and large judgment.

And the judgment module 7 compares the results of the even correlation value post-processing module 5 and the odd correlation value post-processing module 6, and outputs a final capture result comprising a maximum envelope value, a mean value, Doppler and a code phase.

Through real-time analysis, the time length required for writing 2048 data samples is 1/20.46MHz 2048 ≈ 100us, each correlation requires reading 1024+128=1152 even/odd data, a total of 1152 clock cycles is required, time division multiplexing is performed for 8 times, and the total of 1152 × 8=9216 clock cycles is obtained. The minimum frequency of the required processing clock is 9216/100us =92.16MHz, and the working clock frequency is selected to be 100 MHz.

Compared with the 200MHz processing clock rate adopted by the prior art, under the condition of the same capturing speed, the required operation amount of the device is reduced by 1/2, the required processing clock frequency is only 100MHz, the power consumption of the capturing module can be obviously reduced, and the required accumulation times of each accumulator are also reduced by 1/2, so that the digit of the accumulator is reduced by 1bit, and the logic resource can be saved.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, various changes or modifications may be made by the patentees within the scope of the appended claims, and within the scope of the invention, as long as they do not exceed the scope of the invention described in the claims.