Method and device for realizing capture processing

文档序号:681245 发布日期:2021-04-30 浏览:9次 中文

阅读说明:本技术 一种实现捕获处理的方法及装置 (Method and device for realizing capture processing ) 是由 宋挥师 于 2020-12-22 设计创作,主要内容包括:一种实现捕获处理方法及装置,包括:划分输入信号样本点数据为两个或两个以上数据块;分别处理划分的各数据块,获得各数据块相应的相干积分结果的幅度值;确定相邻数据块之间的第一间隔;根据确定的相邻数据块之间的第一间隔,对计算获得的各数据块的相干积分结果的幅度值进行对齐处理。本发明实施例在无需增加先进先出存储器(FIFO)的尺寸和增加芯片复杂度的情况下,提升了捕获性能。(A method and a device for realizing capture processing comprise the following steps: dividing input signal sample point data into two or more data blocks; processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block; determining a first interval between adjacent data blocks; and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation. The embodiment of the invention improves the capture performance without increasing the size of a first-in first-out (FIFO) memory and the complexity of a chip.)

1. A method of implementing an acquisition process, comprising:

dividing input signal sample point data into two or more data blocks;

processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

determining a first interval between adjacent data blocks;

and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

2. The method of claim 1, wherein the separately processing each of the divided data blocks comprises:

writing a data block into the FIFO every time according to the division sequence of the data blocks;

according to the currently searched carrier Doppler value, respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO;

respectively carrying out coherent integration processing on each data block which completes the carrier Doppler and code Doppler elimination;

and calculating to obtain an amplitude value corresponding to the coherent integration result of each data block.

3. The method of claim 1, wherein the separately processing each of the divided data blocks comprises:

writing a data block into the FIFO every time according to the division sequence of the data blocks;

according to the currently searched carrier Doppler value, respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO;

respectively carrying out coherent integration processing on each data block which completes the carrier Doppler and code Doppler elimination;

determining a second interval between adjacent data blocks;

according to the determined second interval between the adjacent data blocks, carrying out alignment processing on the coherent integration result of each data block obtained by calculation;

and calculating amplitude values corresponding to coherent integration results of the data blocks subjected to the alignment processing.

4. A method according to any one of claims 1 to 3, further comprising:

carrying out non-coherent integration on the amplitude value of the correlation integration result of each aligned data block;

and storing the non-correlation integration result, and acquiring the satellite signal according to the non-correlation integration result.

5. The method of any one of claims 1 to 3, wherein the length of the data block is less than or equal to the coherent integration time duration.

6. The method according to claim 1 or 3,

the determining the first interval between adjacent data blocks comprises: determining a first interval between adjacent data blocks according to the sampling frequency and code doppler of the data;

the determining the second interval between adjacent data blocks comprises: a second spacing between adjacent data blocks is determined based on the sampling frequency of the data and the code doppler.

7. The method of claim 1 or 3, wherein the first interval between adjacent data blocks comprises a first interval determined by the following formula:

the first interval N _ gap1 ═ round (N _ gap (1+ M f _ cd1/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd1 is the currently searched code doppler; the round () represents a round-up nearby.

8. The method of claim 7, wherein the aligning the amplitude values of the coherent integration results of the data blocks comprises:

calculating a first output sequence number J1 of the data mod (I + N _ gap1, N);

inputting the amplitude value of the coherent integration result of each data block obtained by calculation into a preset interleaver, and outputting data according to the first output sequence number of the data obtained by calculation;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

9. The method according to claim 1 or 3,

the second spacing between the adjacent data blocks comprises determining by the following equation:

the second interval N _ gap2 ═ round (N _ gap (1+ M f _ cd2/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd2 is the currently searched code doppler; the round () represents a round-up nearby.

10. The method of claim 9, wherein the aligning the coherent integration result of each data block obtained by calculation comprises:

calculating a second output sequence number J2 of the data mod (I + N _ gap2, N);

inputting the calculated coherent integration result of each data block into a preset interleaver, and outputting data according to the second output sequence number of the calculated data;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

11. An apparatus that implements an acquisition process, comprising: the device comprises a dividing unit, a processing unit, a first interval determining unit and a first interleaver unit; wherein the content of the first and second substances,

the dividing unit is used for: dividing input signal sample point data into two or more data blocks;

the processing unit is used for: processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

the first interval determination unit is configured to: determining a first interval between adjacent data blocks;

the first interleaver unit is configured to: and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

12. The apparatus of claim 11, wherein the processing unit comprises a first-in-first-out memory module, a doppler canceller module, a coherent integration processing module, and an amplitude calculator module; wherein the content of the first and second substances,

the first-in first-out memory module is to: receiving the writing of one data block each time according to the division sequence of the data blocks;

the Doppler canceller module is to: respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

the coherent integration processing module is used for: respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

the first amplitude calculator module is to: and calculating to obtain an amplitude value corresponding to the coherent integration result of each data block.

13. The apparatus of claim 11, wherein the processing unit comprises a first-in-first-out memory module, a doppler canceller module, a coherent integration processing module, a second interval determination module, a coherent memory module, and a second interleaver module; wherein the content of the first and second substances,

the first-in first-out memory module is to: receiving the writing of one data block each time according to the division sequence of the data blocks;

the Doppler canceller module is to: respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

the coherent integration processing module is used for: respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

the second interval determination module is to: determining a second interval between adjacent data blocks;

the second interleaver module is to: according to the determined second interval between the adjacent data blocks, carrying out alignment processing on the coherent integration result of each data block obtained by calculation;

the coherent memory module is to: storing the coherent integration result of each data block after alignment processing;

the second amplitude calculator module is to: and calculating amplitude values corresponding to coherent integration results of the data blocks subjected to the alignment processing.

14. The apparatus according to any one of claims 11 to 13, further comprising a non-coherent integration unit and an acquisition unit; wherein the content of the first and second substances,

a non-coherent integration unit to: carrying out non-coherent integration on the amplitude value of the correlation integration result of each aligned data block;

the capturing unit is used for: and storing the non-correlation integration result, and acquiring the satellite signal according to the non-correlation integration result.

15. The apparatus according to any one of claims 11 to 13, wherein the storage length of the fifo memory module is greater than or equal to the length of the data block.

16. The apparatus according to claim 11 or 13, wherein the first interval determining unit determines the first interval between adjacent data blocks by specifically:

the first interval N _ gap1 ═ round (N _ gap (1+ M f _ cd1/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd1 is the currently searched code doppler; the round () represents a round-up nearby.

17. The apparatus of claim 16, wherein the first interleaver unit is specifically configured to:

calculating a first output sequence number J1 of the data mod (I + N _ gap1, N);

inputting the amplitude value of the coherent integration result of each data block obtained by calculation into a preset interleaver, and outputting data according to the first output sequence number of the data obtained by calculation;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

18. The apparatus of claim 11 or 13, wherein the second interval determining module determines the second interval between adjacent data blocks by the following formula:

the second spacing between the adjacent data blocks comprises determining by the following equation:

the second interval N _ gap2 ═ round (N _ gap (1+ M f _ cd2/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd2 is the currently searched code doppler; the round () represents a round-up nearby.

19. The apparatus of claim 18, wherein the second interleaver module is specifically configured to:

calculating a second output sequence number J2 of the data mod (I + N _ gap2, N);

inputting the calculated coherent integration result of each data block into a preset interleaver, and outputting data according to the second output sequence number of the calculated data;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

20. A computer storage medium having computer-executable instructions stored therein for performing the method of any one of claims 1-10.

21. A terminal, comprising: a memory and a processor; wherein the content of the first and second substances,

the processor is configured to execute program instructions in the memory;

the program instructions read on the processor to perform the following operations:

dividing input signal sample point data into two or more data blocks;

processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

determining a first interval between adjacent data blocks;

and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

Technical Field

The present disclosure relates to, but not limited to, satellite navigation technologies, and more particularly, to a method and apparatus for performing an acquisition process.

Background

A Global Navigation Satellite System (GNSS) plays an increasingly irreplaceable important role in daily life of people, and is increasingly applied to the fields of Navigation, exploration, monitoring, measurement, communication time service and the like. With the rapid development of civil applications in recent years, a global satellite navigation system is gradually deepened in daily life, and the satellite navigation technology cannot be separated from mobile phones, personal computers, automobiles, civil airplanes, missiles and fighters. All major countries in the world strive to develop satellite navigation technology, a plurality of satellite navigation systems exist at present, and the countries are independent to compete to develop the satellite navigation technology and mutually compatible systems, so that a prosperous GNSS system is formed. The global satellite navigation system mainly comprises a GPS system in the United states, a Beidou (BD) system in China, a global navigation satellite positioning system in Russia (GLONASS) and a Galileo (Galileo) system in Europe, wherein the GPS and the Beidou are widely applied in China and Asia-Pacific areas, and the GPS and the GLONASS are more applied in Russia.

The navigation receiver mainly comprises: acquisition, acquisition tracking, synchronous demodulation, and position, velocity and time (PVT) solution. Wherein, whether the capturing succeeds or not determines whether the subsequent processing process is started or not; from the perspective of a signal processing flow, a satellite navigation signal needs to be captured by using an Acquisition Engine (AE), and then Acquisition tracking, synchronous demodulation, PVT calculation and the like are performed; therefore, capture is crucial. The higher the capturing performance is, the weaker navigation signals can be captured; the acquisition performance is mainly limited by the duration of coherent integration and the duration of non-coherent integration, i.e. the total integration duration; if the total integration duration is longer, the capture performance is generally better; conversely, when the total integration time is small, the capture performance is generally poor. The total integration duration is directly related to the size of the memory in the hardware implementation, and the size of the memory is directly related to the complexity and cost of the chip, so the total integration duration (i.e., the capture performance) is often limited by the complexity and cost of the chip. Fig. 1 is a block diagram showing a configuration of a capture engine in the related art, and as shown in fig. 1, the size of an AE first-in first-out memory (FIFO) directly determines the total integration time. The AE FIFO stores a period of time of sample points of the navigation signal, which is a signal with the intermediate frequency removed, i.e., without the intermediate frequency complex signal. The stored duration of the navigation signal is the product of the coherent integration duration and the non-coherent integration duration; for example, if coherent integration duration is 10 milliseconds (ms) and non-coherent integration is 10 times, then AE FIFO stores signal duration of 10 × 10 — 100 ms; namely, the size of the AE FIFO directly determines the total integration time length which can be executed by the capture engine and the capture performance; then, according to the current searched carrier Doppler value, the Doppler eliminator eliminates the carrier Doppler and the code Doppler; then, carrying out coherent integration through a coherent integrator; it should be noted that the coherent integrator in fig. 1 includes several parallel coherent integration implementation units, corresponding to all possible code phase values; for example, for a coarse acquisition code (C/a code) signal corresponding to the GPS L1 band, if the code phase step size is 0.5 chips, there are 2046 code phase values; after the coherent integration calculation processing, calculating a corresponding amplitude value of a coherent integration result by an amplitude calculator; carrying out non-coherent integration on the amplitude value corresponding to the correlation integration result through a non-coherent integrator; here, the non-coherent integration is to accumulate the amplitude values obtained by coherent integration. Storing the non-coherent integration result into a non-correlation memory; and finally, searching all the stored incoherent integration results in the incoherent memory by a peak detector, searching the maximum value in the amplitude value, recording the code phase value and the carrier Doppler value corresponding to the maximum value, and finishing the acquisition.

In summary, if the related art wants to improve the capture performance, the total integration time length must be increased, i.e., the size of the FIFO needs to be increased, thereby increasing the chip complexity and the manufacturing cost.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

Embodiments of the present invention provide a method and an apparatus for implementing capture processing, which can improve capture performance without increasing the size of a first-in first-out (FIFO) memory and increasing the complexity of a chip.

The embodiment of the invention provides a method for realizing capture processing, which comprises the following steps:

dividing input signal sample point data into two or more data blocks;

processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

determining a first interval between adjacent data blocks;

and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

Optionally, the separately processing each divided data block includes:

writing a data block into the FIFO every time according to the division sequence of the data blocks;

according to the currently searched carrier Doppler value, respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO;

respectively carrying out coherent integration processing on each data block which completes the carrier Doppler and code Doppler elimination;

and calculating to obtain an amplitude value corresponding to the coherent integration result of each data block.

Optionally, the separately processing each divided data block includes:

writing a data block into the FIFO every time according to the division sequence of the data blocks;

according to the currently searched carrier Doppler value, respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO;

respectively carrying out coherent integration processing on each data block which completes the carrier Doppler and code Doppler elimination;

determining a second interval between adjacent data blocks;

according to the determined second interval between the adjacent data blocks, carrying out alignment processing on the coherent integration result of each data block obtained by calculation;

and calculating amplitude values corresponding to coherent integration results of the data blocks subjected to the alignment processing.

Optionally, the method further includes:

carrying out non-coherent integration on the amplitude value of the correlation integration result of each aligned data block;

and storing the non-correlation integration result, and acquiring the satellite signal according to the non-correlation integration result.

Optionally, the length of the data block is smaller than or equal to the coherent integration time duration.

Alternatively to this, the first and second parts may,

the determining the first interval between adjacent data blocks comprises: determining a first interval between adjacent data blocks according to the sampling frequency and code doppler of the data;

the determining the second interval between adjacent data blocks comprises: a second spacing between adjacent data blocks is determined based on the sampling frequency of the data and the code doppler.

Optionally, the first interval between the adjacent data blocks includes being determined by the following formula:

the first interval N _ gap1 ═ round (N _ gap (1+ M f _ cd1/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd1 is the currently searched code doppler; the round () represents a round-up nearby.

Optionally, the aligning the amplitude values of the coherent integration result of each data block obtained by calculation includes:

calculating a first output sequence number J1 of the data mod (I + N _ gap1, N);

inputting the amplitude value of the coherent integration result of each data block obtained by calculation into a preset interleaver, and outputting data according to the first output sequence number of the data obtained by calculation;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

Optionally, the second interval between the adjacent data blocks includes a value determined by the following formula:

the second interval N _ gap2 ═ round (N _ gap (1+ M f _ cd2/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd2 is the currently searched code doppler; the round () represents a round-up nearby.

Optionally, the aligning the coherent integration result of each data block obtained by calculation includes:

calculating a second output sequence number J2 of the data mod (I + N _ gap2, N);

inputting the calculated coherent integration result of each data block into a preset interleaver, and outputting data according to the second output sequence number of the calculated data;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

On the other hand, an embodiment of the present invention further provides an apparatus for implementing capture processing, including: the device comprises a dividing unit, a processing unit, a first interval determining unit and a first interleaver unit; wherein the content of the first and second substances,

the dividing unit is used for: dividing input signal sample point data into two or more data blocks;

the processing unit is used for: processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

the first interval determination unit is configured to: determining a first interval between adjacent data blocks;

the first interleaver unit is configured to: and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

Optionally, the processing unit includes a first-in first-out memory module, a doppler canceller module, a coherent integration processing module, and an amplitude calculator module; wherein the content of the first and second substances,

the first-in first-out memory module is to: receiving the writing of one data block each time according to the division sequence of the data blocks;

the Doppler canceller module is to: respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

the coherent integration processing module is used for: respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

the first amplitude calculator module is to: and calculating to obtain an amplitude value corresponding to the coherent integration result of each data block.

Optionally, the processing unit includes a first-in first-out memory module, a doppler canceller module, a coherent integration processing module, a second interval determination module, a coherent memory module, and a second interleaver module; wherein the content of the first and second substances,

the first-in first-out memory module is to: receiving the writing of one data block each time according to the division sequence of the data blocks;

the Doppler canceller module is to: respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

the coherent integration processing module is used for: respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

the second interval determination module is to: determining a second interval between adjacent data blocks;

the second interleaver module is to: according to the determined second interval between the adjacent data blocks, carrying out alignment processing on the coherent integration result of each data block obtained by calculation;

the coherent memory module is to: storing the coherent integration result of each data block after alignment processing;

the second amplitude calculator module is to: and calculating amplitude values corresponding to coherent integration results of the data blocks subjected to the alignment processing.

Optionally, the apparatus further comprises a non-coherent integration unit and an acquisition unit; wherein the content of the first and second substances,

a non-coherent integration unit to: carrying out non-coherent integration on the amplitude value of the correlation integration result of each aligned data block;

the capturing unit is used for: and storing the non-correlation integration result, and acquiring the satellite signal according to the non-correlation integration result.

Optionally, the storage length of the fifo memory module is greater than or equal to the length of the data block.

Optionally, the first interval determining unit specifically determines the first interval between adjacent data blocks by using the following formula:

the first interval N _ gap1 ═ round (N _ gap (1+ M f _ cd1/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd1 is the currently searched code doppler; the round () represents a round-up nearby.

Optionally, the first interleaver unit is specifically configured to:

calculating a first output sequence number J1 of the data mod (I + N _ gap1, N);

inputting the amplitude value of the coherent integration result of each data block obtained by calculation into a preset interleaver, and outputting data according to the first output sequence number of the data obtained by calculation;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

Optionally, the second interval determining module determines the second interval between adjacent data blocks by using the following formula:

the second spacing between the adjacent data blocks comprises determining by the following equation:

the second interval N _ gap2 ═ round (N _ gap (1+ M f _ cd2/fs))

Wherein M is an upsampling factor; the N _ gap is the number of data intervals before code Doppler elimination; the f _ cd2 is the currently searched code doppler; the round () represents a round-up nearby.

Optionally, the second interleaver module is specifically configured to:

calculating a second output sequence number J2 of the data mod (I + N _ gap2, N);

inputting the calculated coherent integration result of each data block into a preset interleaver, and outputting data according to the second output sequence number of the calculated data;

wherein, the I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; the mod () represents a modulo operation.

In still another aspect, an embodiment of the present invention further provides a computer storage medium, where computer-executable instructions are stored in the computer storage medium, and the computer-executable instructions are configured to perform the foregoing method.

In another aspect, an embodiment of the present invention further provides a terminal, including: a memory and a processor; wherein the content of the first and second substances,

the processor is configured to execute program instructions in the memory;

the program instructions read on the processor to perform the following operations:

dividing input signal sample point data into two or more data blocks;

processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

determining a first interval between adjacent data blocks;

and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

Compared with the related art, the technical scheme of the application comprises the following steps: dividing input signal sample point data into two or more data blocks; processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block; determining a first interval between adjacent data blocks; and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation. The embodiment of the invention improves the capture performance without increasing the size of a first-in first-out (FIFO) memory and the complexity of a chip.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention.

FIG. 1 is a block diagram showing a configuration of a capture engine according to the related art;

FIG. 2 is a flow chart of a method for implementing the capture process according to an embodiment of the present invention;

FIG. 3 is a block diagram of an apparatus for implementing the capture process according to an embodiment of the present invention;

fig. 4 is a block diagram of an apparatus for implementing the capture process according to another embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.

The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.

Fig. 2 is a flowchart of a method for implementing the capture process according to an embodiment of the present invention, as shown in fig. 2, including:

step 201, dividing input signal sample point data into two or more data blocks;

optionally, the length of the data block divided by the embodiment of the present invention is less than or equal to the coherent integration time duration.

Step 202, processing each divided data block respectively to obtain an amplitude value of a coherent integration result corresponding to each data block;

optionally, the step of processing each divided data block separately in the embodiment of the present invention includes:

writing a data block into the FIFO every time according to the division sequence of the data blocks;

respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

and calculating to obtain an amplitude value corresponding to the coherent integration result of each data block.

Optionally, the step of processing each divided data block separately in the embodiment of the present invention includes:

writing a data block into the FIFO every time according to the division sequence of the data blocks;

respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

determining a second interval between adjacent data blocks;

according to the determined second interval between the adjacent data blocks, carrying out alignment processing on the coherent integration result of each data block obtained by calculation;

and calculating amplitude values corresponding to coherent integration results of the data blocks subjected to the alignment processing.

Optionally, the determining the second interval between adjacent data blocks in the embodiment of the present invention includes: a second spacing between adjacent data blocks is determined based on the sampling frequency of the data and the code doppler.

Optionally, the second interval between adjacent data blocks in the embodiment of the present invention includes determining by the following formula:

N_gap2=round(N_gap*(1+M*f_cd2/fs))

wherein M is an upsampling factor; f _ cd2 is the code doppler currently being searched; round () represents rounding up nearby.

Optionally, the aligning the coherent integration result of each data block obtained by calculation according to the embodiment of the present invention includes:

calculating a second output sequence number J2 of the data mod (I + N _ gap2, N);

after the coherent integration result of each data block obtained by calculation is input into a preset interleaver, data output is carried out according to a second output sequence number of the data obtained by calculation;

wherein, I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; mod () represents a modulo operation.

Step 203, determining a first interval between adjacent data blocks;

optionally, the determining the first interval between adjacent data blocks in the embodiment of the present invention includes: a first interval between adjacent data blocks is determined based on a sampling frequency of the data and code doppler.

Optionally, the first interval between adjacent data blocks in the embodiment of the present invention includes determining by the following formula:

N_gap1=round(N_gap*(1+M*f_cd1/fs))

wherein M is an upsampling factor; f _ cd1 is the code doppler currently being searched; round () represents rounding nearby;

and 204, according to the determined first interval between the adjacent data blocks, performing alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

Optionally, the aligning the amplitude value of the coherent integration result of each data block obtained by calculation according to the embodiment of the present invention includes:

calculating a first output sequence number J1 of the data mod (I + N _ gap1, N);

inputting the amplitude value of the coherent integration result of each data block obtained by calculation into a preset interleaver, and outputting data according to a first output sequence number of the data obtained by calculation;

wherein, I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; mod () represents a modulo operation.

Optionally, in the method according to the embodiment of the present invention, after step 204, the method further includes:

carrying out non-coherent integration on the amplitude value of the correlation integration result of each data block after alignment processing;

and storing the non-correlation integration result, and acquiring the satellite signal according to the non-correlation integration result.

Compared with the related art, the technical scheme of the application comprises the following steps: dividing input signal sample point data into two or more data blocks; processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block; determining a first interval between adjacent data blocks; and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation. The embodiment of the invention improves the capture performance without increasing the size of a first-in first-out (FIFO) memory and the complexity of a chip.

Fig. 3 is a block diagram of an apparatus for implementing capture processing according to an embodiment of the present invention, as shown in fig. 3, including: the device comprises a dividing unit, a processing unit, a first interval determining unit and a first interleaver unit; wherein the content of the first and second substances,

the dividing unit is used for: dividing input signal sample point data into two or more data blocks;

the processing unit is used for: processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

the first interval determination unit is configured to: determining a first interval between adjacent data blocks;

the first interleaver unit is configured to: and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

Optionally, the processing unit in the embodiment of the present invention includes a first-in first-out memory module, a doppler canceller module, a coherent integration processing module, and an amplitude calculator module; wherein the content of the first and second substances,

the first-in first-out memory module is to: receiving the writing of one data block each time according to the division sequence of the data blocks;

the Doppler canceller module is to: respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

the coherent integration processing module is used for: respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

the first amplitude calculator module is to: and calculating to obtain an amplitude value corresponding to the coherent integration result of each data block.

Optionally, the storage length of the fifo memory module according to the embodiment of the present invention is greater than or equal to the length of the data block.

Fig. 4 is a block diagram of an apparatus for implementing an acquisition process according to another embodiment of the present invention, as shown in fig. 4, a processing unit according to an embodiment of the present invention includes a first-in first-out memory module, a doppler canceller module, a coherent integration processing module, a second interval determination module, a coherent memory module, and a second interleaver module; wherein the content of the first and second substances,

the first-in first-out memory module is to: receiving the writing of one data block each time according to the division sequence of the data blocks;

the Doppler canceller module is to: respectively carrying out carrier Doppler and code Doppler elimination on each data block stored in the FIFO according to the currently searched carrier Doppler value;

the coherent integration processing module is used for: respectively carrying out coherent integration processing on each data block which completes carrier Doppler and code Doppler elimination;

the second interval determination module is to: determining a second interval between adjacent data blocks;

the second interleaver module is to: according to the determined second interval between the adjacent data blocks, carrying out alignment processing on the coherent integration result of each data block obtained by calculation;

the coherent memory module is to: storing the coherent integration result of each data block after alignment processing;

the second amplitude calculator module is to: and calculating amplitude values corresponding to coherent integration results of the data blocks subjected to the alignment processing.

Optionally, the apparatus of the embodiment of the present invention further includes a non-coherent integration unit and a capture unit; wherein the content of the first and second substances,

a non-coherent integration unit to: carrying out non-coherent integration on the amplitude value of the correlation integration result of each data block after alignment processing;

the capturing unit is used for: and storing the non-correlation integration result, and acquiring the satellite signal according to the non-correlation integration result.

It should be noted that the capturing unit can be divided into a non-coherent storage module and a peak detector module; the non-coherent storage module is used for storing a non-coherent integration result; the peak detector module is used for acquiring the satellite signal according to the non-correlation integration result.

Optionally, the first interval determining unit in the embodiment of the present invention specifically determines the first interval between adjacent data blocks by using the following formula:

N_gap1=round(N_gap*(1+M*f_cd1/fs))

wherein M is an upsampling factor; f _ cd1 is the code doppler currently being searched; round () represents rounding nearby;

optionally, the first interleaver unit in the embodiment of the present invention is specifically configured to:

calculating a first output sequence number J1 of the data mod (I + N _ gap1, N);

inputting the amplitude value of the coherent integration result of each data block obtained by calculation into a preset interleaver, and outputting data according to a first output sequence number of the data obtained by calculation;

wherein, I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; mod () represents a modulo operation.

Optionally, the second interval determining module in the embodiment of the present invention specifically determines the second interval between adjacent data blocks by using the following formula:

N_gap2=round(N_gap*(1+M*f_cd2/fs))

wherein M is an upsampling factor; f _ cd2 is the code doppler currently being searched; round () represents rounding up nearby.

Optionally, the second interleaver module in the embodiment of the present invention is specifically configured to:

calculating a second output sequence number J2 of the data mod (I + N _ gap2, N);

after the coherent integration result of each data block obtained by calculation is input into a preset interleaver, data output is carried out according to a second output sequence number of the data obtained by calculation;

wherein, I is the serial number of the coherent integration result of the input data; n is the total number of coherent integration results; mod () represents a modulo operation.

Referring to fig. 3, after dividing input signal sample point data into data blocks, the embodiment of the present invention stores data of only one of the data blocks in a FIFO, where the length of the stored data block is less than the coherent integration duration; taking the GPS signal as an example, the coherent integration step length is assumed to be 0.5 chips, and the 1ms pseudo code is 1023 chips, that is, 2046 results in total. Assuming that the FIFO storage scheme in the related art stores 100ms of data at a time, the 100ms of data is continuous; assuming that the correlation technique uses 10ms data as blocks, the data between two adjacent data blocks is continuous, and therefore, the order of the 2046 coherent integration results is not disordered, i.e., all are in order. The embodiment of the invention only stores the data of one divided data block, and the interval between two adjacent data blocks is not 0 any more. In order to obtain 2046 coherent integration results, 2046 results of two 10ms coherent integrations are correspondingly added in the non-coherent integration process; while the interval is not 0, meaning that the ordering of the 2046 results for the next block needs to be shuffled and then realigned to correctly perform the non-coherent integration. Therefore, the embodiment of the invention introduces an interleaver; the design of the interleaver depends on the determination of the spacing between two adjacent data blocks.

In the embodiment of the present invention, both the first interval determining unit and the second interval determining module may be implemented by a counter, and compared with fig. 3 and fig. 4, fig. 3 only includes the first interval determining unit and the first interleaver unit; and FIG. 4 adds a second interval determining module and a second interleaver module to that of FIG. 3; the second interval determination module and the second interleaver module introduced in fig. 4 may further reduce the memory space of the FIFO but require an increase in the memory space of the coherent integration. The scheme of fig. 4 is suitable for processing schemes where coherent integration is particularly long, such as coherent integration of 120ms or even longer, where only a short coherent integration data, such as 1ms, needs to be stored. In the embodiment of the present invention, the data processed by the second interleaver module may be stored in the coherent memory module, and the coherent memory module accumulates the new coherent integration result to the original coherent integration result after passing through the second interleaver module each time. The other processes are similar to those of fig. 3 and will not be described.

The embodiment of the invention also provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used for executing the method for realizing the capture processing.

An embodiment of the present invention further provides a terminal, including: a memory and a processor; wherein the content of the first and second substances,

the processor is configured to execute program instructions in the memory;

the program instructions read on the processor to perform the following operations:

dividing input signal sample point data into two or more data blocks;

processing each divided data block respectively to obtain the amplitude value of the coherent integration result corresponding to each data block;

determining a first interval between adjacent data blocks;

and according to the determined first interval between the adjacent data blocks, carrying out alignment processing on the amplitude values of the coherent integration results of the data blocks obtained by calculation.

It will be understood by those skilled in the art that all or part of the steps of the above methods may be implemented by a program instructing associated hardware (e.g., a processor) to perform the steps, and the program may be stored in a computer readable storage medium, such as a read only memory, a magnetic or optical disk, and the like. Alternatively, all or part of the steps of the above embodiments may be implemented using one or more integrated circuits. Accordingly, each module/unit in the above embodiments may be implemented in hardware, for example, by an integrated circuit to implement its corresponding function, or in software, for example, by a processor executing a program/instruction stored in a memory to implement its corresponding function. The present invention is not limited to any specific form of combination of hardware and software.

Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

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