阅读说明：本技术 砷化镓基红外发光二极管芯片及其制备方法 (Gallium arsenide-based infrared light-emitting diode chip and preparation method thereof ) 是由 王世俊 赵秀梅 邢振远 董耀尽 李彤 于 2019-08-23 设计创作，主要内容包括：本发明公开了一种砷化镓基红外发光二极管芯片及其制备方法,属于红外发光二极管领域。方法：制备GaAs基红外发光二极管LED芯片坯,芯片坯包括N型欧姆接触层、顺次层叠在N型欧姆接触层上的N型粗化层、N型电流扩展层、N型限制层、有源层、P型限制层、P型AlGaAs电流扩展层、P型GaP电流扩展层和P型欧姆接触层,N型粗化层包括顺次层叠在N型欧姆接触层上的AlGaInP粗化引导层、AlGaAs粗化层和GaInP粗化限制层,在N型欧姆接触层上制作N型电极,去除N型欧姆接触层中除N型电极覆盖的区域之外的区域,对N型粗化层中露出N型欧姆接触层的区域进行粗化处理,以使AlGaInP粗化引导层和AlGaAs粗化层中沿GaAs基红外LED芯片坯的长度方向贯穿有多个孔洞。(The invention discloses a gallium arsenide-based infrared light-emitting diode chip and a preparation method thereof, and belongs to the field of infrared light-emitting diodes. The method comprises the following steps: preparing a GaAs-based infrared light-emitting diode (LED) chip blank, wherein the chip blank comprises an N-type ohmic contact layer, an N-type rough layer, an N-type current expansion layer, an N-type limiting layer, an active layer, a P-type limiting layer, a P-type AlGaAs current expansion layer, a P-type GaP current expansion layer and a P-type ohmic contact layer which are sequentially stacked on the N-type ohmic contact layer, the N-type rough layer comprises an AlGaInP coarsening guide layer, an AlGaAs rough layer and a GaInP coarsening limiting layer which are sequentially stacked on the N-type ohmic contact layer, an N-type electrode is manufactured on the N-type ohmic contact layer, the region except the region covered by the N-type electrode in the N-type ohmic contact layer is removed, and the region exposed out of the N-type ohmic contact layer in the N-type rough layer is coarsened, so that a plurality of holes penetrate through the AlGaInP rough layer and the AlGaAs rough layer along the length direction of the GaAs-.)

1. A preparation method of a gallium arsenide-based infrared light-emitting diode chip is characterized by comprising the following steps:

preparing a GaAs-based infrared light-emitting diode (LED) chip blank, wherein the GaAs-based infrared LED chip blank comprises an N-type ohmic contact layer, an N-type rough layer, an N-type current expansion layer, an N-type limiting layer, an active layer, a P-type limiting layer, a P-type AlGaAs current expansion layer, a P-type GaP current expansion layer and a P-type ohmic contact layer which are sequentially stacked on the N-type ohmic contact layer, the N-type rough layer comprises an AlGaInP coarsening guide layer, an AlGaAs rough layer and a GaInP coarsening limiting layer which are sequentially stacked on the N-type ohmic contact layer,

manufacturing an N-type electrode on the N-type ohmic contact layer, wherein the N-type electrode is opposite to the N-type rough layer,

removing the region except the region covered by the N-type electrode in the N-type ohmic contact layer,

roughening the region of the N-type roughened layer, where the N-type ohmic contact layer is exposed, so that a plurality of holes penetrate through the AlGaInP roughened guide layer and the AlGaAs roughened layer along the length direction of the GaAs-based infrared LED chip blank, the bottom of each hole is positioned in the GaInP roughened limiting layer,

and manufacturing a P-type electrode on the P-type ohmic contact layer, wherein the N-type electrode is opposite to the P-type electrode.

2. The method for manufacturing a gallium arsenide-based infrared light emitting diode chip as claimed in claim 1, wherein said roughening the region of said N-type roughened layer where said N-type ohmic contact layer is exposed comprises:

coarsening the region of the AlGaInP coarsening guide layer exposing the N-type ohmic contact layer by adopting AlGaInP coarsening liquid so that a hole penetrates through the region of the AlGaInP coarsening guide layer exposing the N-type ohmic contact layer along the length direction of the GaAs-based infrared LED chip blank,

coarsening a region of the AlGaInP coarsening guide layer, which is exposed out of the hole of the AlGaInP coarsening guide layer, in the AlGaAs coarsening layer by adopting AlGaAs coarsening liquid so that the hole of the AlGaInP coarsening guide layer penetrates through the region of the AlGaInP coarsening layer, which is exposed out of the hole of the AlGaInP coarsening guide layer, and then is stopped at the GaInP coarsening limiting layer.

3. The method of manufacturing a gaas-based led chip according to claim 2, wherein the step of roughening the region of the AlGaInP roughened guide layer where the N-type ohmic contact layer is exposed by using an AlGaInP roughening solution includes:

and coarsening the region of the AlGaInP coarsening guide layer, which exposes the N-type ohmic contact layer, twice by adopting the AlGaInP coarsening liquid, wherein the first coarsening time is 50-80S, and the second coarsening time is 10-40S.

4. The method for manufacturing a GaAs-based LED chip as claimed in claim 2, wherein the AlGaInP roughening solution is phosphoric acid and hydrochloric acid at a ratio of 5: 1.

5. The method of manufacturing a gaas-based led chip according to claim 2, wherein the step of roughening the area of the AlGaAs roughened layer where the hole of the AlGaInP roughened guide layer is exposed by using an AlGaAs roughening solution includes:

and coarsening the area of the AlGaAs coarsening layer, in which the hole of the AlGaInP coarsening guide layer is exposed, for three times by adopting AlGaAs coarsening liquid, wherein the coarsening time for the first time is 30-60S, and the coarsening time for the second time and the third time is 10-30S.

6. The method for manufacturing a GaAs-based LED chip as claimed in claim 2, wherein the AlGaAs roughening solution is nitric acid and water at a ratio of 20: 1.

7. The method for manufacturing a GaAs-based LED chip as claimed in claim 1, wherein the GaAs-based LED chip comprises a substrate,

the AlGaInP coarsening guide layer is (Al)_xGa_1-x)_0.5In_0.5A P layer, x is more than or equal to 0.5 and less than or equal to 1,

the AlGaAs coarsened layer is Al_yGa_1-yAn As layer, y is more than or equal to 0.2 and less than or equal to 0.4,

the GaInThe P coarsening limiting layer is Ga_0.5In_0.5And a P layer.

8. The method for manufacturing a GaAs-based infrared light emitting diode chip as claimed in claim 7, wherein the GaAs-based infrared light emitting diode chip is formed by a step of forming a single layer on a substrate,

the AlGaInP coarsening guide layer has a thickness of 200 to 500nm,

the thickness of the AlGaAs coarsened layer is 600 to 900nm,

the thickness of the GaInP coarsening limiting layer is 40-60 nm.

9. The method of claim 7, wherein the N-type current spreading layer is Al_zGa_1-zZ is more than or equal to 0.05 and less than or equal to 0.2, and y is more than z.

10. A GaAs-based infrared light emitting diode chip, comprising:

an N-type ohmic contact layer, and an N-type rough layer, an N-type current spreading layer, an N-type confinement layer, an active layer, a P-type confinement layer, a P-type AlGaAs current spreading layer, a P-type GaP current spreading layer and a P-type ohmic contact layer sequentially stacked on the N-type ohmic contact layer,

the area of the N-type ohmic contact layer is smaller than that of the N-type roughened layer, the N-type roughened layer comprises an AlGaInP roughened guide layer, an AlGaAs roughened layer and a GaInP roughened limiting layer which are sequentially laminated on the N-type ohmic contact layer, the N-type roughened layer is provided with a region where the N-type ohmic contact layer is exposed, a plurality of holes penetrate through the AlGaInP roughened guide layer and the AlGaAs roughened layer along the length direction of the GaAs-based infrared LED chip, and the bottom of each hole is positioned in the GaInP roughened limiting layer,

and an N-type electrode is arranged on the N-type ohmic contact layer, the N-type electrode is opposite to the N-type roughened layer, a P-type electrode is arranged on the P-type ohmic contact layer, and the N-type electrode is opposite to the P-type electrode.