阅读说明：本技术 一种高品质阶梯线性调频连续波（slfmcw）信号产生技术 (High-quality Stepped Linear Frequency Modulation Continuous Wave (SLFMCW) signal generation technology ) 是由 邹谋炎 邹熙 于 2018-06-19 设计创作，主要内容包括：一种高品质阶梯线性调频连续波(SLFMCW)信号产生技术,要点是使用两个交替参照的带频移频率锁定环(FLL),将其进行适当修改来构成产生器。使用两个升频式或两个降频式或一个升频一个降频FLL能构造出频率递增型、递降型、或频率升降混合型的SLFMCW信号产生器。所产生的双路SLFMCW信号,其基准频率等于外输入的稳频频率；步进/步降频率稳定性由过渡带特性稳定的低通或复合低通滤波器来保证。从原理上保证了最低的发射噪声、高频率稳定性和高调制线性。技术适合于微波、太赫兹、光频的宽范围应用,及多波束、单脉冲等多种雷达体制及微波-光学测量仪器设计。说明书描述了一种FLL通用模块和一种SLFMCW通用模块集成片上系统设计方案。(A high quality stepped chirp continuous wave (SLFMCW) signal generation technique is characterized by the use of two alternately referenced band frequency shift Frequency Locked Loops (FLLs) suitably modified to form a generator. The SLFMCW signal generator can be constructed as a frequency up, down, or frequency up-down hybrid using two up-converters or two down-converters or one up-converter and one down-converter FLL. The reference frequency of the generated double-path SLFMCW signal is equal to the frequency stabilization frequency of the external input; step/step down frequency stability is ensured by a low pass or complex low pass filter with stable transition band characteristics. The minimum transmission noise, high frequency stability and high modulation linearity are ensured in principle. The technology is suitable for wide-range application of microwave, terahertz and optical frequency, and design of multiple radar systems such as multi-beam and single pulse and microwave-optical measuring instruments. The specification describes a FLL universal module and an SLFMCW universal module integrated system-on-chip design scheme.)

1. A technique for generating a high-quality stepped chirp continuous wave (SLFMCW) signal, embodied in a technical solution, comprising:

using a frequency locking loop (frequency locking loop for short) with frequency shift, and taking the Frequency Locking Loop (FLL) as a basic module for constructing the SLFMCW signal generator after being modified properly; the proper modification is that a setting input and a closed loop-output holding control input are added to a basic FLL circuit with frequency shift;

the SLFMCW signal generator is composed of two frequency shifts FLL with setting input and closed loop-output holding control input which act alternately; an SLFMCW signal generator formed by two frequency-increasing FLLs (FU-FLL) can generate an SLFMCW signal with an increasing frequency; an SLFMCW signal generator constructed using two down-converting FLLs (FD-FLLs) capable of generating a frequency-stepped SLFMCW signal; an SLFMCW signal of a frequency up-down hybrid type can be generated by using one FU-FLL and one FD-FLL;

the SLFMCW signal generator, the reference frequency of which is determined by the reference frequency of an external input; the step stepping frequency is determined by the difference frequency output by the frequency mixers in the FU-FLL and the FD-FLL falling on a frequency-voltage amplitude converter (FAC) transition band, and a fixed frequency value is obtained after a frequency locking loop converges; the frame timing and the frequency stepping timing of the SLFMCW signal are determined by an externally input frame timing pulse signal and stepping timing pulse signal;

the technical scheme is also characterized in that two paths of step linear frequency modulation continuous wave signals with staggered step timing and staggered step/step down frequency can be obtained.

2. The SLFMCW signal generation technique of claim 1, wherein the additional set input to the basic band frequency shift FLL circuit is an external input pulse voltage S (referred to as F-set signal) applied to the additive input of the trim amplifier in the FLL, the application of which changes the output signal frequency of the VCO in the FLL to be higher than the input reference frequency of the FLL (for FU-FLL) or lower than the input reference frequency of the FLL (for FD-FLL); after the input pulse is set, the output frequency of the VCO is adjusted to a fixed value under the action of an FLL closed loop feedback mechanism, and in association with the fixed value, the difference frequency of the mixing output falls on a transition band of the FAC;

the closed loop-output holding control input is a control signal H acting on a switching circuit added before the output stage of the adjusting amplifier, when the signal H is at a high level, the FLL loop is closed, and the frequency locking mechanism of the FLL acts; when the signal H takes a low level, the FLL circuit is disconnected, but the potential holding capacitor connected to the input terminal of the output stage acts to keep the output voltage of the output stage unchanged, and accordingly, the VCO output frequency remains unchanged and is not affected by any circuit before the switch.

3. The SLFMCW signal generating technique as claimed in claim 1, characterized in that the FAC in the band shift FLL has a frequency-voltage conversion characteristic that is nonlinear, monotonic, with a non-positive slope; within a specified narrow frequency range, the frequency-voltage characteristic has high change rate and large voltage amplitude dynamic range; outside a specified narrow frequency range, the frequency-voltage characteristic is only required to have monotonicity, and the slope of the frequency-voltage characteristic is not positive; a low-pass filter or a composite low-pass filter with stable transition band frequency positions is suitable for FAC; the transition band frequency position of the FAC can be designed to be fixed or adjustable; for the adjustable FAC, the transition band frequency position can be set using an applied adjustment signal.

4. An FLL integrated common Module (FLL-Module) suitable for integrated circuit implementation, characterized in that it is composed of a mixer, a FAC, a detector, and a trim amplifier in a basic band-shift FLL circuit, modified on the basis of which: the frequency position of the transition band of the FAC in the FLL-Module can be designed into a fixed type or an adjustable type, and the frequency position of the transition band can be set or the frequency position of the transition band can be adjusted by externally adding a pulse voltage S to the adjustable type or externally adding switching frequency control; in the FLL-Module, the adjusting amplifier structurally and functionally comprises the following components: the tuning amplifier has not only an input terminal inherent to the FLL but also an additive setting input terminal allowing the application of said pulse voltage S, and forcibly sets the oscillation frequency of the VCO to be higher than the input reference frequency (for FU-FLL) or lower than the input reference frequency (for FD-FLL) by the tuning amplifier; the circuit design of the adjusting amplifier can adapt to the requirement that the positive and negative polarities of the gain are variable, when the external input U/D setting is controlled to be in a high level, the gain of the adjusting amplifier is positive, and when the U/D is in a low level, the gain of the adjusting amplifier is negative; the circuit design of the adjusting amplifier is provided with a potential holding capacitor and a switch for breaking the FLL, when an input switching signal H takes a positive value, the FLL is closed, frequency locking adjustment occurs, and when the H takes a negative value, the FLL is disconnected, the voltage on the potential holding capacitor is unchanged, the voltage output by the adjusting amplifier is unchanged, and the oscillation frequency of the VCO is unchanged;

a VCO is added by using the FLL-Module to form a complete FU-FLL or FD-FLL;

the FLL-Module is particularly suitable for constructing SLFMCW signal generators and can be independently used in a wide range of fields requiring FU-FLL or FD-FLL.

5. An SLFMCW signal generating technique as claimed in claim 1, a ladder chirp integrated universal Module (SLFM-Module) suitable for integrated circuit implementation, wherein one SLFM-Module consists of two said FLL-modules, a synchronous timing Module, and a switching circuit;

the synchronous timing Module receives an external clock input and generates a setting input and a closed loop-output holding control input for controlling the alternate reference work of the two FLL-modules and a frame timing pulse signal; the switching circuit is used to set the (per frame) starting reference frequency of the SLFM-Module to the input reference frequency;

the input terminals/signals of the SLFM-Module are as follows: dual (two) U/D settings control U/D1 and U/D2; the dual F-Set setting controls F-Set1 and F-Set 2; two input frequency terminals in dual; a reference frequency input terminal; and the output terminals/signals of the module have: two voltage-controlled oscillators in dual to control the voltage; two output frequency terminals in dual; dual, two alternately acting closed-loop-output hold control signals; a frame synchronization switching signal; an external clock input signal;

by adding a reference frequency source, two voltage-controlled oscillators and an external clock input signal, a complete SLFMCW signal generator can be constructed.

Technical Field

The invention relates to the field of electronic information, and provides a high-quality step linear frequency modulation signal generation technology.

Background

The generation of this signal is a fundamental technique in radar, microwave-optical measurement and electronics. SLFMCW has several important advantages compared to conventional (continuous) chirped continuous wave (LFMCW). Taking radar applications as an example, it is possible to distinguish and provide range and velocity information for multiple targets using SLFMCW radar transmit-receive signals that rise or fall in a single pass, which is difficult in principle using single-pass LFMCW radar signals. For instrumentation and measurement applications, time base and frequency calibration is easier to perform with SLFMCW instruments. Because SLFMCW technology is the fundamental technology in military and civilian continuous wave radars, it has been a major concern in electronics manufacturing. In fact, in recent years, around the competitive development of radar for automatic driving of automobiles, many manufacturers of integrated circuits at home and abroad successively introduce radar transmitting-receiving chip sets of 24GHz, 77GHz and 79GHz, the core technology of which is firstly the generation of LFMCW transmitting signals, and without exception, the basic technology is the generation of SLFMCW signals, and under the technical framework, if necessary, the LFMCW signals are generated by using a very small step approximation.

There are two main prior art techniques for generating SLFMCW signals. The first technical scheme is that an analog step linear modulation voltage waveform is generated firstly, and the waveform is used as a control voltage of a radio frequency-microwave Voltage Controlled Oscillator (VCO) to generate a radio frequency-microwave signal of the SLFMCW. This analog modulation method can produce usable SLFMCW signals if the control voltage-frequency characteristic of the VCO has good linearity. The availability of analog modulation methods depends on many factors. First is the linearity of the voltage controlled oscillator characteristics, which directly affects the time-frequency linearity of the SLFMCW signal, which has a fundamental effect on the performance of the radar. The VCO characteristics available in the application market have approximately good linearity only when the modulation bandwidth is small, which means that SLFMCW signals generated by an analog modulation method are only suitable for the application occasions with small modulation bandwidth. And a serious problem is the temperature stability of the VCO characteristics. The frequency drift of a typical VCO chip over the industrial temperature range far exceeds the range permitted by the application. Radar design engineers use temperature compensation techniques to alleviate this difficulty, which in principle needs to be implemented individually for each product due to the high dispersion of VCO characteristics, which greatly increases radar manufacturing costs. Due to the above significant difficulties of analog modulation techniques, the later-introduced SLFMCW generation technique uses a completely different approach: frequency synthesis or Phase Locked Loop (PLL) methods. The basic solution of this method is to place the VCO in a PLL circuit so that the oscillation frequency of the VCO is digitally controlled and phase-locked in relation to a crystal frequency. Thus, the oscillation frequency and the timing of the frequency variation of the VCO can be controlled by a programmable method, the generated SLFMCW signal can be completely ensured to achieve excellent linearity and time base accuracy, and the temperature drift is avoided, because the stability of all frequency values is ensured by the stability of the crystal oscillator. This solution is nearly perfect and therefore has recently become the mainstream of the proposed chip.

However, when using these radar transmitting chips based on PLL schemes, it was found that these chips have a common disadvantage: the transmission noise is rather high. The reason for this is that the PLL circuit includes a large number of digital-to-pulse circuits with different switching times, and frequent switching of the states of these circuits interferes with the operation of other circuits, particularly with modulation voltage, by means of power coupling and spatial coupling, and modulation noise is introduced. This drawback is not very difficult to apply to radars, and severely limits the technical specifications that can be achieved by radars.

The present invention aims to provide a novel technique for generating SLFMCW signals with equal or highly close frequency accuracy, frequency modulation linearity, and wide temperature stability of PLL schemes, while having an extremely low noise floor. The use of this technology has an impact on radar, microwave-optical measurement and design methods of electronic instruments, driving the progress of these application technologies.

Disclosure of Invention

The present invention is based on the development of "a Frequency Locked Loop (FLL) with frequency shift" (patent application No. 201711135033.7) [ 1 ] that the inventor has proposed. According to the statement in the document [ 1 ], a basic Up-Frequency Locked Loop (FU-FLL) is composed of the following components: a mixer receiving an input reference signal frequency f_rAnd local frequency f generated by FLL circuit_c＞f_rTo realize mixing, generate and output a difference frequency F_i＝f_c-f_r(ii) a Frequency-voltage Amplitude Converter (FAC), which is typically a Low Pass Filter (LPF) having a transition band characteristicIs the frequency-voltage amplitude conversion characteristic required by the FLL; a detector for detecting the difference frequency signal output from the frequency-voltage amplitude converter into a direct current voltage; a regulating amplifier for converting the detected output voltage into a control voltage of the voltage-controlled oscillator, wherein the gain of the regulating amplifier is positive in the FU-FLL; voltage Controlled Oscillator (VCO) generating a local frequency f_cAnd assume that the voltage-frequency characteristic of the VCO, although nonlinear, has a monotonic positive slope.

The trim amplifier in the FU-FLL is constructed with an operational amplifier whose input allows the addition of an additional additive input in addition to the input necessary for the FLL mechanism. Thus, by adding a short-acting setting voltage to the input of the trim amplifier, the VCO is easily driven to produce a frequency f, provided that the pulse voltage has a suitable amplitude and duration_cExceeding the signal frequency f_r. Under these conditions, it can be demonstrated that FU-FLL can be designed such that its operating state converges to a fixed point after the set voltage is over (zeroed). The fixed point is f_cTaking a fixed value point, the FU-FLL working state is balanced at this point: after being mixed with input signals, the VCO output signals are converted into control voltage of the VCO through other circuits of the FLL, and the control voltage is equal to the control voltage value corresponding to the generated VCO output frequency; one correlation property with respect to the fixed point is: difference frequency F_i＝f_c-f_rTaking a fixed value and falling on a transition band of FAC; if f is_cAt f_c＞f_rWith some disturbance in the range, the FLL will adjust f_cSo that f_cAnd F_iConverge on the respective fixed values. After FLL convergence, if f_cWith slow variation or slow variation of gain of circuit components, FU-FLL will have feedback adjustment, so that f_cAnd F_iA change occurs. At this time, due to the difference frequency F_iFalling on the transition band of the FAC, the feedback adjustment mechanism of the FLL is maintained and the difference frequency F is maintained as long as the dynamic range of the transition band can cover and compensate for component gain variations_iAlways on the transition band of FAC. To sum up, designing a normal FLL can maintain the output frequency f_cAnd an input frequency f_rFrequency difference therebetweenF_iTaking a fixed value, and F under the conditions of power supply disturbance and gain variation_iVariations can occur but their values can be limited to the transition band of the FAC. In a radio-frequency-microwave-optical transceiver system, f_rVery high and F_iIs very low. Provided that the FAC designed and used has a stable transition band frequency position and has a narrow transition band width af_iCan ensure F_iHas proper stability.

The following facts are to ensure F_iThe stability of (2) is very advantageous: (1) the frequency-voltage amplitude characteristic of passive filters (e.g., LC filters for practical applications) has low sensitivity to device tolerances and temperature variations; (2) the RC active filter with good design has low sensitivity of frequency-voltage amplitude characteristics to device tolerance and temperature variation; (3) the frequency position of the transition band in the frequency-voltage amplitude characteristic of the switched capacitor filter is determined by the frequency of the external switch clock, for example, a crystal oscillator is used as the external switch clock, so that the frequency-voltage amplitude characteristic of the transition band of the filter can be ensured to be stable. Furthermore, the gain of each component in the FLL is substantially determined by the passive components, and the temperature sensitivity is low. This means that the level adjustment occurring over the FAC transition band will be small and the resulting frequency variation will be smaller.

One basic FLL similar to FU-FLL is called Frequency-Down Locked Loop (FD-FLL), whose composition differs from FU-FLL only in that the trim amplifier in FD-FLL has negative gain; the input of the trim amplifier in the FD-FLL is additionally supplied with a short-acting setting voltage, which, given a suitable amplitude and duration, easily ensures the frequency f generated by the VCO_cBelow the signal frequency f_rUnder such conditions, it can be demonstrated that the FD-FLL can be designed such that its operating state after the end (return to zero) of the set voltage converges to a fixed point at which f_cFixed and below the signal frequency f_r. Similar to FU-FLL, after FD-FLL convergence, the difference frequency F_i＝f_c-f_rTaking a fixed value and falling on a transition band of FAC; in case of power supply disturbance and gain variation, F_iWill vary, but its valueCan be defined on the transition band of the FAC.

In order to be suitable for the application of the present invention, additional modifications to the basic FLL in document [ 1 ] are required. Fig. 1 shows a block diagram of a FU-FLL circuit with set inputs and closed-loop-output hold, and fig. 2 is a simplified block diagram thereof. In FIG. 1, f_mIs the frequency of the input signal, f_outIs the output frequency of FU-FLL, S is the set input pulse voltage, and H is the closed loop-output hold control input. Circuit figure 3 illustrates a typical setup-convergence procedure for FU-FLL with modification used in the present invention. The setting voltage is a short-acting positive pulse voltage which acts on the additive input of the regulating amplifier as long as the setting voltage has a suitable amplitude and time width T_setIt is necessary to make the output frequency of FU-FLL higher than f_mAfter the voltage setting is finished, the output frequency is adjusted to a fixed value due to the action of the FU-FLL closed loop feedback mechanism, and the difference frequency F falls on the transition band of the FAC and also takes the fixed value. The closed loop-output hold control H is a switching control signal. In the regulating amplifier there is an output amplifier whose output is fed directly to the VCO as a control voltage for the VCO. A potential holding capacitor and a switch are designed and arranged on the input end of the output amplifier, so that when the closed loop-output holding control H takes a high level, the FLL loop is closed, and a frequency locking mechanism of the FLL acts; when H is at low level, the FLL loop is disconnected at the switch, but the output voltage of the output amplifier can be kept unchanged by the action of the potential holding capacitor, and accordingly, the VCO output frequency is kept unchanged. Time width T of high level of control signal H_set-adjLong enough to ensure that the FLL completes the convergence process and reaches stability. At this point, if H switches to low, FLL is off and the VCO will keep the frequency unchanged before the loop is off.

FIG. 4 is a schematic diagram of the stepped chirp continuous wave (SLFMCW) signal generator of the present invention, which consists of two FLLs with set inputs and closed loop-output hold, respectively denoted by F in FIG. 4₁And F₂A block diagram of; if it is notRequiring the generation of incremental SLFMCW signals, then said two FLLs are two FU-FLLs; if it is desired to generate a decreasing SLFMCW signal, then the two FLLs are two FD-FLLs; if it is desired to generate SLFMCW signals that alternate up and down, one of the two FLLs is FU-FLL and the other is FD-FLL.

The present specification first sets forth a generation scheme for incremental SLFMCW signals. In this requirement, two FLLs in FIG. 4, F₁And F₂Labeled block diagrams, FU-FLL 1 and FU-FLL 2, respectively. The two FU-FLLs are controlled by an alternate set signal and a closed-loop output hold signal so that the two FU-FLLs are frequency adjusted alternately with reference. Fig. 5 shows the timing relationship and output frequency generation process of the SLFMCW signal generator, and the operation of fig. 5 in conjunction with the circuit block diagram 4 is explained as follows.

The following 6 paths of signals are applied to the SLFMCW signal generator: reference frequency f₀And 5 control signals including frame synchronization switch signal S₀Two-way alternative acting setting signal S₁And S₂And two-way closed loop-output holding control signal H with alternate action₁And H₂. In a S₀Alternately arranging N closed loops at equal intervals within the repetition period of (1) -outputting the hold positive pulse control signal H₁And N positive pulse control signals H₂Only in H₁And H₂Taking positive value of time period T_set-adjIn this case, the corresponding FLL loop is closed. When the FLL is closed loop, the input of a setting signal of a positive pulse is arranged, and when the setting signal is finished (zero), the FLL carries out autonomous feedback frequency adjustment. Must arrange T_set-adjAnd the time length is proper, so that the autonomous feedback frequency adjustment of the two FU-FLLs can be ensured to be converged to a stable state. In respective time periods T_set-adjAfter that, H₁Or H₂And returning to zero, and opening the corresponding FU-FLL loop and entering an output frequency holding state.

The SLFMCW signal generator operates by synchronizing the switching signal S with the frame₀Starting with a positive value. The switching signal is used for switching in a reference frequency f for the SLFMCW signal generator₀Thus S₀The time length of taking positive value should not be less than T_set-adjTo ensure that FU-FLL 1 is at H₁During the active (taking positive value), at S₁And H₁Can converge its output frequency to a fixed value f_1o＝f₀+F₁And F is₁Falls on the transition zone of FAC in FU-FLL 1. At H₁After zeroing, f_1oUntil H₁The next positive value occurs. H is to be₁Return to zero to H₁The time interval during which the next positive value occurs is denoted T_hold. Usually, S can be taken₀The positive value having a time length equal to T_set-adjAfter the time process is finished, the input end of the FU-FLL 1 is switched to be connected with the output end of the FU-FLL 2, and the whole SLFMCW signal generator enters the process of alternately working the FU-FLL 1 and the FU-FLL 2. Note T at FU-FLL 1_holdIn a time period, H will appear₂In combination with S₂Setting-controlling process for FU-FLL 2, and frequency adjustment of FU-FLL 2 is by f_1oFor reference. Similarly, T at FU-FLL 2_holdIn a time period, H will appear₁In combination with S₁Setting-controlling the FU-FLL 1, and adjusting the frequency of the FU-FLL 1 by f_2oFor reference. Thus, a step chirp continuous wave signal with a frequency increase law of FU-FLL 1 appears at the output

f_1o：f₁＝f₀+F₁；f₁+F；f₁+2F；f₁+3F；---；f₁+(N-1)F.

Wherein F ═ F₁+F₂。

Meanwhile, a step chirp continuous wave signal appears at the output end of the FU-FLL 2, and the frequency increase law is

f_2o：f₂＝f₀+F；f₂+F；f₂+2F；f₂+3F；---；f₂+(N-1)F.

When the frame is synchronous with the switching signal S₀And taking the positive value again, the generation process of the above step chirp continuous wave restarts to the next period.

As can be seen from the output frequency generation process diagram, a T_holdIn the middle of the periodContaining a T_set-adjTime period at T_holdExcluding intermediate T in the interval_set-adjTwo very clean periods can be obtained after the period. The radar signal utilization time slots (namely, the time slots used for obtaining radar target information in the radar transmitting-receiving process) are limited in the two clean time slots, and the radar transmitting and receiving are not disturbed by the setting control and circuit adjustment in the circuit. Therefore, the SLFMCW signal generated by the present invention can achieve very low transmission noise and very low receiving noise in principle.

A block diagram of an FD-FLL circuit with a set input and a closed loop-output hold differs from the block diagram of the FU-FLL circuit shown in FIG. 1 only in that the trim amplifier in the FD-FLL has a negative gain as a whole, and its simplified block diagram is shown in FIG. 6.

Using two FD-FLLs with set inputs and closed-loop output holds, a stepped-down chirp continuous wave signal generator can be constructed whose block diagram is not different from that of FIG. 4, except that F in FIG. 4₁And F₂The identified block diagrams need to be replaced with FD-FLL 1 and FD-FLL 2. And the timing relationship and output frequency generation process of the decreasing SLFMCW signal generator can be described with fig. 7. The meaning and process illustration of the various symbols in fig. 7 is entirely similar to the incremental SLFMCW signal generator described previously.

Naturally, one FU-FLL and one FD-FLL can be used to form an incremental, decremental hybrid SLFMCW signal generator. FIG. 8 is a schematic diagram of a stepped chirp continuous wave signal generator of the hybrid FU-FLL and FD-FLL, and FIG. 9 illustrates a typical timing relationship and output frequency generation process of the stepped chirp continuous wave signal generator of the hybrid FU-FLL and FD-FLL. The meaning and process description for each symbol in fig. 9 is entirely similar to the incremental SLFMCW signal generator described previously. Research shows that the mixed SLFMCW signal is used for continuous wave radar to distinguish multiple targets from each other.

The setting-convergence process of the FU-FLL or the FD-FLL is composed of two stages of a setting process and a FLL closed-loop convergence process. The setting process is a process that the VCO output signal frequency is higher than the reference frequency (for FU-FLL) or lower than the reference frequency (for FD-FLL) by the externally input setting pulse voltage. Since VCOs generally have a high modulation bandwidth, this means a fast response to the setting input. To achieve as short a set-up time as possible, a fast-response trim amplifier should be used.

The closed loop convergence process of the FLL is generally a convergence process of a nonlinear closed loop system, and the nonlinearity is mainly caused by the nonlinear property of the voltage-frequency control characteristic of the VCO. On the other hand, the actual VCO characteristic, although nonlinear, has a monotonic positive slope; the voltage-frequency characteristic of the VCO is approximately linear when the control voltage varies within a small range. Therefore, the closed loop convergence process for FLL can be approximated with a linear analysis. The main factors influencing the speed of the closed loop convergence process include: 1) the composite response speed of the FAC-detector, which can be measured in terms of the length of time the FAC input frequency changes, causing the detected output dc level to change and reach steady state; 2) the response speed of the amplifier is adjusted. The use of a wide-band operational amplifier as a trim amplifier in the FLL enables the effect on the closed-loop response speed to be small. Of the two factors, the detector response speed is usually the dominant factor. Since the detected signal frequency is the difference frequency F, the time constant of the filter smoothing circuit necessary for the detector needs to be selected according to the height of F, and a compromise needs to be made between the filter smoothing effect and the detection response speed.

FAC has principle importance in FLL. Typically, various types of butterworth low pass filters may be used as FACs, such as LC low pass filters, RC active low pass filters, switched capacitor low pass filters, and the like. Since this type of FAC is implemented with the transition band characteristic of a low-pass filter, there are important advantages in constructing a composite low-pass filter by adding a band-pass filter to the low-pass filter: the upper transition band frequency characteristic of, for example, a crystal filter can be used as the characteristic required for FAC. In this case, an LC or RC active low pass filter is used to compensate and cover the lower transition band characteristic of the crystal filter, making the composite filter a low pass filter. Fig. 10a) illustrates a circuit scheme using a band-pass filter and a low-pass filter in parallel to form a composite low-pass filter; fig. 10b) illustrates a method of stitching the frequency characteristics of a composite low-pass filter, where 1 is the low-pass filter characteristic, 2 is the band-pass filter characteristic, and 3 is the frequency characteristic of the composite low-pass filter. The crystal band-pass filter with good quality has excellent temperature stability in frequency characteristic, and the composite low-pass filter can be used as the band-pass filter in the composite filter to ensure that the composite low-pass filter has transition band characteristic with stable temperature. The construction method of the composite low-pass filter enables various band-pass filters with good temperature stability to be used for constructing FAC in FLL, such as crystal filters, dielectric filters, mechanical filters, cavity filters and the like.

Another approach to achieving FAC temperature stability is sufficient using switched capacitor low pass filters. This is because the frequency characteristic of the switched capacitor low-pass filter is determined by the integrated passive devices (individual capacitors) in the circuit and the switching frequency, and the frequency characteristic of the switched capacitor low-pass filter has high stability as long as the switching frequency uses a crystal stabilization frequency. Another advantage of using a switched capacitor low pass filter is that the transition band frequency position of its filter characteristic is proportional to the switching frequency. Meaning that it is easy to construct a low-pass filter with adjustable transition-band frequency position.

In principle, FAC and detection are combined to form a frequency-to-voltage converter. Thus, the use of other frequency-to-voltage converters is possible without violating the basic principles of the present invention for achieving convergence with FLL closed loop feedback. However, it is an important problem that the present invention has specific requirements for its frequency-voltage conversion characteristics: (1) the frequency-voltage conversion characteristic is nonlinear and monotonic and has a non-positive slope; (2) within a specified narrow frequency range, the frequency-voltage characteristic has high change rate and large voltage dynamic range; outside the specified narrow frequency range, the frequency-voltage characteristic is only required to be monotonous, with a non-positive slope. This means that conventional frequency-to-voltage ratio converters are not fully applicable to the present invention: it is difficult to achieve control of the difference frequency within a narrow frequency range and achieve control of the difference frequency with high adjustment sensitivity, which is essential to ensure stability of the difference frequency.

The following facts illustrate the industrial applicability of the present invention.

The technology of the invention is used for generating the step linear frequency modulation continuous wave signal and has the following advantages:

(1) the present technique is suitable for the full frequency range from low frequencies to microwave frequencies to optical frequencies, and is in principle limited only by the allowable operating frequency range of the voltage controlled oscillator and the mixer. In particular, as radar operating frequencies become higher, such as into the terahertz range, it becomes more difficult to generate FMCW signals of appropriate power using PLL techniques, and the advantages of the present invention become more apparent.

(2) The time slot (namely the time period for obtaining the radar target information in the radar transmitting-receiving process) of the radar signal is limited outside the FLL setting-convergence process, so that the interference of state conversion in a circuit can be avoided for the radar transmitting and receiving signal, and the transmitting and receiving signal is ensured to be clean.

(3) The technology of the invention ensures that the step stepping/step-down frequency is determined by the same frequency value taken on the FAC transition band after FLL closed loop convergence in principle and is not influenced by the nonlinearity of VCO voltage-frequency characteristics. Therefore, the SLFMCW signal generated by the technology of the invention has high frequency accuracy, frequency modulation linearity and wide temperature stability; at the same time, the achievable modulation bandwidth is limited only by the normal operating range of the voltage-frequency characteristic of the VCO, rather than the approximately linear range. For example, a typical 24GHz VCO chip uses an analog modulation method, and in order to ensure proper and good modulation linearity, the usable modulation bandwidth is only approximately within 300 MHz; with the technology of the invention, the modulation bandwidth can reach 1GHz to ensure good modulation linearity. The performance of the present invention is similar for the 77GHz radar design.

(4) Specifically, for 79GHz vehicle radar application, the technology of the invention is utilized to achieve the modulation bandwidth of 4GHz, and meanwhile, the output SLFMCW signal is ensured to have high frequency accuracy, frequency modulation linearity and wide temperature stability, and becomes feasible.

(5) Two paths of step linear frequency modulation continuous wave signals with staggered step timing and staggered step/step-down frequency can be obtained simultaneously, the configuration scheme of two paths of transmitting signal frequencies can be selected in the radar signal utilization time slot, and flexibility is provided for radar system design, such as design of a multi-beam system and a single-pulse system.

(6) The scheme of the invention can generate very clean SLFMCW, can obtain two flexibly configured SLFMCW paths, can generate two groups of clean frequency spectral lines when being used for a microwave-optical spectrum measuring instrument, and can scale and measure the spectral line distance between the two groups of frequency spectral lines in a very small frequency scale.

(7) The scheme of the invention has a modular structure and is easy to carry out System On Chip (SOC) designs of different scales.