阅读说明：本技术 半导体激光器阵列的封装结构 (The encapsulating structure of semiconductor laser array ) 是由 闫立华 李德震 徐会武 于 2019-09-27 设计创作，主要内容包括：本发明提供了一种半导体激光器阵列的封装结构,涉及半导体激光器芯片封装技术领域,包括芯片、第一硬焊料、第二硬焊料以及次热沉；第二硬焊料的外侧面至芯片的距离大于第一硬焊料外侧面至芯片的距离；次热沉底面上设有用于连通第一硬焊料和第二硬焊料的第一金属化区域,次热沉的底面与芯片的高反面之间设有第二间隙。本发明提供的半导体激光器阵列的封装结构,第一硬焊料和第二硬焊料非对称的设置于芯片的两侧,能够利用较大长度的第二硬焊料实现对芯片P面的有效散热,第一间隙的设置增加了相邻的芯片单元之间物理隔离,避免了多芯片贴装时因芯片数量增加导致的应力累加,具有散热效果良好、无应力累加、芯片数量扩展性好等优点。(The present invention provides a kind of encapsulating structure of semiconductor laser array, it is related to semiconductor laser chip encapsulation technology field, including chip, the first hard solder, the second hard solder and secondary heat sink；The lateral surface of second hard solder is greater than the distance of the first hard solder lateral surface to chip to the distance of chip；Secondary heat sink bottom surface is equipped with the first metallized area for being connected to the first hard solder and the second hard solder, is equipped with the second gap between the high reverse side of secondary heat sink bottom surface and chip.The encapsulating structure of semiconductor laser array provided by the invention, first hard solder and the asymmetrical two sides for being set to chip of the second hard solder, effective heat dissipation to the face chip P can be realized using the second hard solder of greater depth, the setting in the first gap increases to be physically isolated between adjacent chip unit, because stress caused by number of chips increase is cumulative when avoiding multi-chip attachment, have many advantages, such as heat dissipation effect it is good, it is unstressed add up, number of chips favorable expandability.)

1. the encapsulating structure of semiconductor laser array characterized by comprising

Chip, plate face is arranged along the vertical direction and parallel is furnished with several；

First hard solder is set to the face N of the chip；

Second hard solder, is set to the face P of the chip and the distance in lateral surface to the face P of the chip is greater than described first firmly Distance of the solder lateral surface to the face N of the chip, first hard solder and described between the two neighboring chip The first gap is equipped between two hard solders；And

It is secondary heat sink, positioned at the top of the chip, and described heat sink bottom surface be equipped with for be connected to first hard solder and First metallized area of second hard solder is equipped with second between the high reverse side of time heat sink bottom surface and the chip Gap.

2. the encapsulating structure of semiconductor laser array as described in claim 1, which is characterized in that two neighboring described first The non-metallized regions being located above the chip are formed between metallized area.

3. the encapsulating structure of semiconductor laser array as described in claim 1, which is characterized in that described heat sink bottom surface Be equipped with Open Side Down and with corresponding isolation channel above and below the chip.

4. the encapsulating structure of semiconductor laser array as claimed in claim 3, which is characterized in that the width of the isolation channel Greater than the width and isolation channel of the chip floor projection area be greater than the chip floor projection area.

5. the encapsulating structure of semiconductor laser array as described in claim 1, which is characterized in that the chip goes out light The bottom surface in face, the bottom surface of first hard solder and second hard solder flushes.

6. the encapsulating structure of semiconductor laser array as described in any one in claim 1-5, which is characterized in that described heat Sink for aluminium nitride ceramics time heat sink or boron oxide it is heat sink.

7. the encapsulating structure of semiconductor laser array as described in any one in claim 1-5, which is characterized in that described heat Heavy top is additionally provided with copper-based seat.

8. the encapsulating structure of semiconductor laser array as claimed in claim 7, which is characterized in that described heat sink top surface It is equipped with the second metallized area being connected with the copper-based seat.

9. the encapsulating structure of semiconductor laser array as claimed in claim 7, which is characterized in that it is described it is time heat sink with it is described It is additionally provided between copper-based seat and radiator, the radiator is in semiconductor chilling plate, metallic heat dissipating part or water flowing radiator It is a kind of.

10. the encapsulating structure of semiconductor laser array as described in any one in claim 1-5, which is characterized in that described One hard solder and second hard solder are tungsten copper heat-sink, molybdenum copper is heat sink, graphite is heat sink or thermal conductivity is high and the whole metals in surface One of diamond heat-sink of change.

Technical field

The invention belongs to semiconductor laser chip encapsulation technology fields, are to be related to a kind of semiconductor to swash more specifically The encapsulating structure of light device array.

Background technique

In recent years, it with the service life of noise spectra of semiconductor lasers chip, the raising of reliability, power, efficiency requirements, half-and-half leads The requirement of body laser array package design also further increases.Traditional laser array encapsulation is generally using symmetrical expression, i.e., The lateral dimension that same chip two sides are heat sink is identical；Technique realization on, in such a way that hard solder and slicken solder combine into Row welding uses, but electric heating migration effect existing for slicken solder seriously affects the service life of array.

Another process is the form that whole interfaces are all made of that hard solder is packaged, but mode is in array The increase of the storehouse quantity of chip, the cumulative accumulation that will will cause chip inherent strain of hard solder stress, after this accumulation is serious It will lead to after chip freezes and burst apart, store the problems such as rear facet is locally cracked, and encapsulate the stress of introducing to the device longevity Life, threshold current, photon polarized state, spectral width etc. all have an impact, it is difficult to guarantee the stability of laser array.

Summary of the invention

The purpose of the present invention is to provide a kind of encapsulating structures of semiconductor laser array, to solve to deposit in the prior art The technical problem that array lifetime is short and stability is poor caused by hard solder stress is cumulative in array package.

To achieve the above object, the technical solution adopted by the present invention is that: a kind of encapsulation of semiconductor laser array is provided Structure, including chip, the first hard solder, the second hard solder and secondary heat sink；The plate face of chip is arranged and parallel along the vertical direction It is placed with several；First hard solder is set to the face N of chip；Second hard solder is set to the face P of chip and lateral surface is to core The distance in the face P of piece is greater than the distance of the first hard solder lateral surface to the face N of chip, the first hard solder between two neighboring chip The first gap is equipped between material and the second hard solder；The secondary heat sink top positioned at chip, and secondary heat sink bottom surface is equipped with for connecting First metallized area of logical first hard solder and the second hard solder is equipped with the between the high reverse side of secondary heat sink bottom surface and chip Two gaps.

As another embodiment of the application, the non-gold being located above chip is formed between two neighboring first metallized area Categoryization region.

As another embodiment of the application, secondary heat sink bottom surface be equipped with Open Side Down and with isolation corresponding above and below chip Slot.

As another embodiment of the application, the area of the floor projection of isolation channel is greater than the area of the floor projection of chip.

As another embodiment of the application, the bottom of the light-emitting surface of chip, the bottom surface of the first hard solder and the second hard solder Face flushes.

As another embodiment of the application, it is secondary it is heat sink for aluminium nitride ceramics time heat sink or boron oxide it is heat sink.

As another embodiment of the application, secondary heat sink top is additionally provided with copper-based seat.

As another embodiment of the application, secondary heat sink top surface is equipped with the second metallized area being connected with copper-based seat.

It is secondary heat sink to be additionally provided between copper-based seat and radiator, radiator are semiconductor as another embodiment of the application One of cooling piece, metallic heat dissipating part or water flowing radiator.

As another embodiment of the application, the first hard solder and the second hard solder are tungsten copper heat-sink, molybdenum copper is heat sink, graphite thermal One of the diamond heat-sink that heavy or thermal conductivity height and surface are all metallized.

The beneficial effect of the encapsulating structure of semiconductor laser array provided by the invention is: compared with prior art, The encapsulating structure of semiconductor laser array provided by the invention, the first hard solder and the second hard solder is asymmetrical is set to core The two sides of piece can realize that effective heat dissipation to the face chip P, the setting in the first gap increase using the second hard solder of greater depth Add and be physically isolated between adjacent chip unit, because stress caused by number of chips increase is tired when avoiding multi-chip attachment Add, has many advantages, such as that heat dissipation effect is good, unstressed cumulative, number of chips favorable expandability.

Detailed description of the invention

It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to embodiment or description of the prior art Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only of the invention some Embodiment for those of ordinary skill in the art without any creative labor, can also be according to these Attached drawing obtains other attached drawings.

Fig. 1 is that the structure of looking up of the encapsulating structure embodiment one of semiconductor laser array provided in an embodiment of the present invention is shown It is intended to；

Fig. 2 is schematic diagram of main cross-sectional structure of Fig. 1；

Fig. 3 is the main view section view knot of the encapsulating structure embodiment two of semiconductor laser array provided in an embodiment of the present invention Structure schematic diagram；

Fig. 4 is secondary heat sink present invention looks up structural representation in Fig. 1.

Wherein, each appended drawing reference in figure:

100, chip；200, the first hard solder；210, the first gap；300, the second hard solder；400, secondary heat sink；410, Two gaps；420, the first metallized area；430, non-metallized regions；440, isolation channel；500, copper-based seat；510, radiator； The width value of L1, chip unit；The width value of L2, chip；L3, the second hard solder lateral surface to the chip being in contact with it The distance between side；L4, the first hard solder lateral surface the distance between to the side of chip being in contact with it；L5, The width value in one gap.

Specific embodiment

In order to which technical problems, technical solutions and advantages to be solved are more clearly understood, tie below Accompanying drawings and embodiments are closed, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only To explain the present invention, it is not intended to limit the present invention.

Also referring to Fig. 1 to Fig. 4, now the encapsulating structure of semiconductor laser array provided by the invention is said It is bright.The encapsulating structure of semiconductor laser array, including chip 100, the first hard solder 200, the second hard solder 300 and secondary heat Heavy 400, the plate face of chip 100 is arranged along the vertical direction and parallel is furnished with several；First hard solder 200 is set to chip 100 face N；Second hard solder 300 is set to the face P of chip 100 and the distance in lateral surface to the face P of chip 100 is greater than first Distance of 200 lateral surface of hard solder to the face N of chip 100, the first hard solder 200 and second between two neighboring chip 100 The first gap 210 is equipped between hard solder 300；Secondary heat sink 400 are located at the top of chip 100, and secondary heat sink 400 bottom surface is equipped with For being connected to the first metallized area 420 of the first hard solder 200 and the second hard solder 300, secondary heat sink 400 bottom surface and chip The second gap 410 is equipped between 100 high reverse side.It should be noted that when element is referred to as " being set to " another element, it It can be directly on the other element or indirectly on another element.It is to be appreciated that term " length ", " width The orientation or positional relationship of the instructions such as degree ", "upper", "lower", "front", "rear", "top", "bottom" "inner", "outside" is based on attached drawing institute The orientation or positional relationship shown, is merely for convenience of description of the present invention and simplification of the description, rather than the dress of indication or suggestion meaning It sets or element must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as to limit of the invention System.In addition, term " first ", " second " be used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or Implicitly indicate the quantity of indicated technical characteristic." first " is defined as a result, the feature of " second " can be expressed or imply Ground includes one or more of the features.In the present embodiment, the face P of chip 100 refers to the anode of chip 100, the English of P Full name is positive, and the face N of chip 100 refers to the cathode of chip 100, and the full name in English of N is negative.Pass through setting The second hard solder 300 in the face P of chip 100 realizes effective heat dissipation to chip 100, and L4 is the effective heat dissipation of chip 100 Size, that is, the laterally wide angle value of the second hard solder 300, the value are greater than the first hard solder 200 positioned at the face N of chip 100 Laterally wide angle value, that is, the second hard solder 300 lateral surface to the side of chip 100 contacted with the second hard solder 300 The distance between L3.L4, which is determined by experiment, increases to 1.5mm from 1mm, and 100 relative temperature of chip is reduced to 39.5 by 43.5 DEG C DEG C, temperature reduces by 4 DEG C, it is seen that the relative temperature of chip 100 can be effectively reduced in the numerical value for increasing L4, guarantees that chip 100 is good Thermal diffusivity.

A kind of encapsulating structure of semiconductor laser array provided by the invention, compared with prior art, the present invention provide Semiconductor laser array encapsulating structure, the first hard solder 200 and the second hard solder 300 is asymmetrical is set to chip 100 two sides, can realize effective heat dissipation to the face P of chip 100 using the second hard solder 300 of greater depth, between first The setting of gap 210 increases to be physically isolated between adjacent chip unit, is avoided when multi-chip 100 mounts because of the number of chip 100 Stress caused by amount increases is cumulative, have many advantages, such as heat dissipation effect it is good, it is unstressed add up, 100 quantity favorable expandability of chip, together When the encapsulating structure can also be that laser array has good power index compatibility, improve its service performance.

In the present embodiment, chip unit refers to chip 100 and is located at the first hard solder of 100 two sides of chip 200 and second hard solder 300, the first gap 210 is set between two neighboring chip unit, realizes between two chip units Physical isolation.

Semiconductor laser is to use semiconductor material as the laser of operation material, in the present embodiment, semiconductor laser Device is most practical, most important a kind of laser, it is small in size, the service life is long, and the mode that simple Injection Current can be used is come Pumping, operating voltage and electric current are compatible with integrated circuit.Semiconductor laser array is then using GaAs (GaAs) conduct Operation material i.e. chip 100, and 100 cloth of chip is set as array format.Especially high-power semiconductor laser, by In it with high point phototransformation efficiency, semiconductor laser array is in laser communication, optical storage, optical circulator, laser printing, ranging And radar etc. is widely used.Guarantee that laser has higher efficiency, needs to make it have preferable light Spectrum and higher output power are then the encapsulating structures by optimizing semiconductor laser in the present embodiment, to reduce its heat Resistance reduces series resistance, to improve its spectral quality.

In the present embodiment, the form of the first hard solder 200 and the second hard solder 300 respectively rectangular block, a chip 100 A chip unit, two neighboring chip list are formed with the first hard solder 200 of 100 two sides of chip and the second hard solder 300 The first gap 210 is equipped between member.The gap width L5 in the first gap 210 refers to the first hard solder 200 of 100 side of chip The distance between the lateral surface of second hard solder 300 of lateral surface another chip 100 adjacent with the chip 100, between first The setting of gap 210 can effectively ensure that the relative independentability between adjacent chip unit, avoid multiple chips 100 into Caused stress cumulative problem when row encapsulation, while also facilitating ensuring that good thermal diffusivity, expand the quantity of chip 100 Malleability is more preferable.

Further, the width value in the first gap 210 is more than or equal to 0.1mm.First between two neighboring chip unit Gap 210 is set greater than the form of 0.1mm, while the material occupancy for reducing semiconductor laser array to the greatest extent, also Guarantee good heat dissipation effect between adjacent chips 100, guarantees between two neighboring chip unit between enough heat dissipations Away from, raising heat dissipation effect, the problem for avoiding stress cumulative.

In the present embodiment, the high reverse side of chip 100 namely with secondary heat sink 400 adjacent top surface, the light-emitting surface of chip 100 Namely bottom surface of the chip 100 far from time heat sink 400 side, second be arranged between the high reverse side of chip 100 and secondary heat sink 400 Gap 410 avoids contacting with each other therebetween and cause for guaranteeing being effectively isolated between 100 top of chip and secondary heat sink 400 100 light that can not generate heat of chip problem.If the bottom surface of the first hard solder 200 and the second hard solder 300 it is downwardly projecting in It will cause the blocking to 100 light guide of chip, the protrusion values should be set as within 10 microns for the light-emitting surface of chip 100, It is avoided that the blocking to 100 light guide of chip.In the present embodiment, the light-emitting surface of chip 100 use with the first hard solder 200 and The form that the bottom surface of second hard solder 300 flushes, can effectively avoid chip 100 goes out first hard solder of the light by two sides 200 and second hard solder 300 blocking, guarantee chip 100 light-out effect, while the setting form be more conducive to guarantee chip 100 and first hard solder 200 and 300 relative position of the second hard solder installation accuracy, reduce installation difficulty.

As a kind of specific embodiment of the embodiment of the present invention, referring to FIG. 1 to FIG. 4, two neighboring first metallization The non-metallized regions 430 for being located at 100 top of chip are formed between region 420.In the present embodiment, chip 100 is using mutually string The type of attachment of connection, it is cumulative for realizing the power of semiconductor laser array, improve the compatibility of power index.First gap 210 setting, effectively avoid multiple chips 100 it is cumulative caused by stress concentrate and the problem of poor radiation, improve The scalability of 100 quantity of chip.Secondary heat sink 400 be isolation material component, in addition between second between the high reverse side of chip 100 Gap 410 can be realized time being effectively isolated between heat sink 400 and chip 100.The first metallized area on secondary heat sink 400 bottom surface Domain 420 can be realized good conducting between the first hard solder 200 and the second hard solder 300 of 100 two sides of same chip, into And realize the face P to chip 100 and the face N circuit connection, guarantee the conducting of circuit.First hard solder 200 and the second hard solder 300 heat eliminating mediums for serving not only as chip 100 are used, moreover it is possible to realize the conducting effect of circuit.First metallized area 420 can also be real Second hard solder of first hard solder 200 and another chip 100 adjacent with the chip 100 in the face N of an existing chip 100 Conducting between material 300, and then realize effective series connection of multiple chips 100 in semiconductor laser array, realize mentioning for power Height, to reach the needs of Superpower semiconductor laser array in actual production.The setting of non-metallized regions 430, purpose It is the conducting of the high reverse side and above-mentioned component in order to avoid chip 100, avoids only generating heat to not shining influencing semiconductor laser battle array The problem of column normal use.

As a kind of specific embodiment of the embodiment of the present invention, Fig. 2 and Fig. 3 are please referred to, is set on secondary heat sink 400 bottom surface Have that Open Side Down and isolation channel 440 corresponding with about 100 chip.The setting of isolation channel 440, which can be avoided, to be arranged secondary heat sink The conducting of the first metallized area 420 and the high reverse side of chip 100 on 400 bottom surfaces emits, and just with the first hard solder 200 and second hard solder 300 realize with the face P of chip 100 and the electrode conduction in the face N.In the present embodiment, the thickness of chip 100 Degree is 100 microns, and in actual installation, the margin of error of the left and right installation site of chip 100 in 10 microns, in order to avoid Conducting between first metallized area 420 and the high reverse side of chip 100 caused by semiconductor laser array installation error, this It is provided with isolation channel 440 in embodiment, can effectively guarantee the presence in the second gap 410 and effectively avoid the first metal The conducting for changing the high reverse side of region 420 and chip 100, improves the reliability that product uses to greatest extent.Isolation channel 440 with The upper and lower position of chip 100 is corresponding, and the area of the floor projection of isolation channel 440 is greater than the area of the floor projection of chip 100, Ensure that the width of isolation channel 440 is greater than the width value of chip 100 in the same direction, avoid the high reverse side of chip 100 with The risk that first metallized area 420 conducts.The width value of isolation channel 440 is greater than the laterally wide angle value L2 of chip 100, isolation Two sides of slot 440 extend 15 microns or more compared to the face P of chip 100 and the face N outward respectively, effectively to evade installation 100 microns of error amount of influence in the process guarantees its good service performance.

Further, the height of the first hard solder 200 and the second hard solder 300 is set greater than 100 height of chip Form, and flush the bottom surface of chip 100 and the bottom surface of the first hard solder 200 and the second hard solder 300, can also be in core The second gap 410 is formed between the high reverse side of piece 100 and secondary heat sink 400 bottom surface, guarantees the high reverse side and the first gold medal of chip 100 Categoryization region 420 is effectively isolated, and then realizes the performance of 100 normal luminous of chip.

As a kind of specific embodiment of the embodiment of the present invention, secondary heat sink 400 be aluminium nitride ceramics time heat sink 400 or oxygen It is heat sink to change boron.Secondary heat sink 400 use aluminium nitride ceramics material, and aluminium nitride ceramics material refers to aluminium nitride ceramics, it is with aluminium nitride For the ceramics of principal crystalline phase.Chemical composition AL65.81%, N34.19%, the specific gravity 3.261g/cm3 of aluminium nitride ceramics, white or ash White is a kind of high-temperature heat-resistance material, 5-8 times higher than aluminium oxide, so heat shock resistance is good, 2200 DEG C of ability it is very hot.Nitridation Aluminium ceramic substrate, thermal conductivity is high, and the coefficient of expansion is low, and intensity is high, and high temperature resistant is resistant to chemical etching, and resistivity is high, and dielectric loss is small, It is ideal large scale integrated circuit heat-radiating substrate and encapsulating material.Aluminium nitride hardness is high, is novel wear-resistant ceramic material.Nitrogen Change that aluminium is heat-resisting, erosion of molten-metal-resistant, acid is stablized, but is easily etched in alkaline solution.

As a kind of specific embodiment of the embodiment of the present invention, Fig. 2 to Fig. 3 is please referred to, secondary heat sink 400 top is also set There is copper-based seat 500.Copper-based seat 500 on secondary heat sink 400 top surface is used as radiating component, has good heat conductivity, can incite somebody to action The heat that first hard solder 200, especially the second hard solder 300 are passed up to secondary heat sink 400 is effectively transmitted to top Copper-based seat 500 realizes the quick reduction of 100 temperature of chip, and then guarantees the function admirable of chip 100.This is because copper has Good thermal conductivity, and the difference that the thermal conductivity of alloy is poorer than pure metal, so made using the copper-based seat 500 of fine copper material secondary herein Heat sink 400 conduct the heat come from the first hard solder 200 and the second hard solder 300 quickly sheds, and improves dissipating for chip 100 The thermal efficiency guarantees its normal use.In the present embodiment, copper-based seat 500 can also using CuW pedestal, BeO pedestal or Si pedestal come Substitution, may be implemented good heat dissipation effect.CuW pedestal refers to that the pedestal of tungsten copper material, tungsten copper refer to tungsten and copper composition Alloy, the copper content of alloys in common use is 10%~50%, generallys use alloy and is produced with powder metallurgy process, is had good Electrical and thermal conductivity, preferable elevated temperature strength and certain plasticity.BeO pedestal refers to the base of the beryllium oxide ceramics material of high thermal conductivity Seat.Si pedestal is then the pedestal of silicon material, and the pedestal of above-mentioned several materials just has good thermal conductivity, can be realized to be formed it is good Good heat dissipation channel improves the efficiency that sheds of time heat sink 400 heat.

As a kind of specific embodiment of the embodiment of the present invention, Fig. 2 to Fig. 3 is please referred to, is set on secondary heat sink 400 top surface There is the second metallized area being connected with copper-based seat 500.The second metallized area being arranged on secondary heat sink 400 top surface can be real Now with effective welding of copper-based seat 500, play the role of increasing bonding area, and secondary heat sink 400 and copper-based seat 500 can be improved Firmness of the connection.

As a kind of specific embodiment of the embodiment of the present invention, please refer to Fig. 2 to Fig. 3, secondary heat sink 400 with copper-based seat Radiator 510 is additionally provided between 500, radiator 510 is one in semiconductor chilling plate, metallic heat dissipating part or water flowing radiator Kind.Semiconductor chilling plate is in setting, using huyashi-chuuka (cold chinese-style noodles) and time heat sink 400 forms being connected.In addition semiconductor chilling plate can also be with Using one of metallic heat dissipating part or water flowing radiator, good heat dissipation effect can be played.Water flowing radiator can be with Cooling form is carried out using water-cooled plate, is taken out of the heat on secondary heat sink 400 using cold water.

It as a kind of specific embodiment of the embodiment of the present invention, please refers to Fig.1 to Fig.3, the first hard solder 200 and second Hard solder 300 be tungsten copper heat-sink, the diamond heat-sink that molybdenum copper is heat sink, thermal conductivity is high and surface is all metallized or graphite it is heat sink in One kind.The selection of heat sink material is mainly from the aspect of two, first is that the thermal conductivity of material wants high, second is that material and chip Thermal expansion coefficient between 100 matches as far as possible.Above-mentioned material uses tool as the first hard solder 200 and the second hard solder 300 There is thermal conductivity high, thermal expansion coefficient is close with the thermal expansion coefficient of chip 100, can be realized swollen with the heat of GaAs matrix chip Swollen coefficient is effectively matched, the problems in the stress collection for avoiding thermal expansion from generating.

In the present embodiment, chip 100 can be GaAs matrix chip, and the CTE of GaAs matrix chip is 5.8 × 10-6/ DEG C, The full name in English of CTE is Coefficient of Thermal Expansion, and Chinese is interpreted as thermal expansion coefficient, refer to object by In temperature change and have breathing phenomenon, changing capability with etc. pressure, unit temperature variation caused by volume change, i.e., it is hot swollen Swollen coefficient indicates.Linear expansion coefficient refers to solid matter when temperature changes 1 degree centigrade, and the variation of length is with it at 0 DEG C Length ratio.The linear expansion coefficient of each object is different, and the linear expansion coefficient of common metal is degree Celsius.Under majority of case, This coefficient is positive value.That is temperature increases volume and expands.And some ceramic materials are hardly sent out under temperature rising condition Raw geometrical property variation, thermal expansion coefficient is close to 0.Due to copper CTE be 17.8 × 10-6/ DEG C, so its parameter value with GaAs matrix chip difference it is larger, it is seen then that GaAs matrix chip and copper it is heat sink thermal expansion coefficient mismatched degree it is very high, therefore It is more serious to thermally expand the stress generated.And the thermal expansion coefficient of aluminium nitride is 3.2-5 × 10-6/ DEG C, the CTE of tungsten copper heat-sink is 6.0 × 10-6/ DEG C, it is closer to the thermal expansion coefficient of GaAs matrix chip, so using Tungsten-copper Composites as the first hard solder 200 and second hard solder 300 carry out using, stress problem can be effectively relieved in conjunction with the use using aluminium nitride times heat sink 400, In multiple chips 100 in application, as array length increases, the influence of Stress match problem is increasing, and the present embodiment is A kind of asymmetrical heat sink structure facilitates the heat dissipation for enhancing array encapsulation structure.

Molybdenum copper is heat sink, refer to by molybdenum-copper material substitution tungsten-copper alloy material carry out using in the way of.Molybdenum copper closes Golden material is using high-quality molybdenum powder and anaerobic copper powder, using the processing side for seeping copper after isostatic pressing, that is, high temperature sintering Formula obtains, and molybdenum-copper material combines high intensity, high specific gravity, high temperature resistant, arc ablation resistance, the electroconductive electric heating performance of copper and molybdenum That good multiple advantage has tissue fine and closely woven as heat sink use, and current interruption performance is good, good conductivity, and thermal conductivity is good, heat Expand small many advantages.

Diamond is commonly called as spark.Namely our former bodies of diamond for often saying, it is a kind of mine being made of carbon Object is the allotrope of carbon.Graphite and diamond belong to carbon simple substance, their chemical property is identical, but gold Hard rock and graphite are not substances of the same race, they are the allotropy bodies being made of identical element, except that physical structure is special Sign.It is planar structure that regular hexagon is constituted between graphite atom, and in the form of sheets, what is constituted between diamond atom is three-dimensional positive tetrahedron Structure.In the present embodiment, the property of its metallic conduction can be realized by the external setting metal layer in diamond or graphite Can, in conjunction with the good heat-conducting effect of the carbon of the two, it may be implemented to be similar to tungsten copper heat-sink or molybdenum copper be heat sink is had Good conductivity, the good effect of thermal conductivity, to guarantee to the good thermal conductivity of chip 100, while also capableing of matching chip 100 Thermal expansion coefficient improves the thermal diffusivity of semiconductor laser, and the quantity scalability of chip 100 is made to have good advantage.

The above is merely preferred embodiments of the present invention, be not intended to limit the invention, it is all in spirit of the invention and Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within principle.