阅读说明：本技术 检测电路、驱动电路和发光器件 (Detection circuit, drive circuit and light emitting device ) 是由 汤胁武志 田畑满志 于 2019-10-18 设计创作，主要内容包括：根据本公开的检测电路(20)设置有具有多输入和单输出的运算放大器(30)。运算放大器(30)具有第一晶体管组(31)和第二晶体管(32)。第一晶体管组(31)由并联连接的多个晶体管构造,其中,多个发光元件(5)的工作电压被分别输入到多个晶体管的栅极,该栅极是非反向输入端子。第二晶体管(32)与第一晶体管组(31)形成差动配置,其中,从输出端子提供负反馈至作为反向输入端子的栅极。(A detection circuit (20) according to the present disclosure is provided with an operational amplifier (30) having multiple inputs and a single output. The operational amplifier (30) has a first transistor group (31) and a second transistor (32). The first transistor group (31) is configured by a plurality of transistors connected in parallel, wherein the operating voltages of the plurality of light-emitting elements (5) are respectively input to the gates of the plurality of transistors, and the gates are non-inverting input terminals. The second transistor (32) forms a differential configuration with the first transistor group (31), in which negative feedback is provided from the output terminal to the gate as an inverting input terminal.)

1. A detection circuit, comprising:

a multiple-input single-output operational amplifier comprising:

a first transistor group including a plurality of transistors connected in parallel such that operating voltages for a plurality of light emitting elements are respectively input to gates of the plurality of transistors, the gates of the plurality of transistors being non-inverting input terminals of the operational amplifier, and

a second transistor that cooperates with the first transistor group to form a differential configuration and has a gate, the gate of the second transistor being an inverting input terminal of the operational amplifier, and an output from an output terminal being negatively fed back to the gate of the second transistor.

2. The detection circuit of claim 1,

the second transistor includes a plurality of transistors connected in parallel, an

The detection circuit further includes a control unit configured to control connection states of the plurality of transistors in the second transistor so that a size of the first transistor group and a size of the second transistor coincide with each other.

3. The detection circuit of claim 1, further comprising:

a comparator configured to compare an output voltage output from the operational amplifier and a predetermined threshold voltage with each other.

4. The detection circuit of claim 1, further comprising:

a plurality of operational amplifiers; and

a multiple-input single-output post-stage operational amplifier, comprising: a third transistor group including a plurality of transistors connected in parallel such that outputs of the plurality of operational amplifiers are input to gates of the plurality of transistors, respectively, the gates of the plurality of transistors being non-inverting input terminals of the subsequent-stage operational amplifier; and a fourth transistor that cooperates with the third transistor group to form a differential configuration and has a gate, the gate of the fourth transistor is an inverted input terminal of the subsequent-stage operational amplifier, and an output from an output terminal is negatively fed back to the gate of the fourth transistor.

5. The detection circuit of claim 4, further comprising:

a comparator configured to compare an output voltage output from the subsequent-stage operational amplifier and a predetermined threshold value with each other.

6. The detection circuit of claim 4, further comprising:

a plurality of comparators configured to compare output voltages output from the plurality of operational amplifiers individually and a predetermined threshold value with each other.

7. A drive circuit, comprising:

a driving unit configured to drive the plurality of light emitting elements; and

a multiple-input single-output operational amplifier comprising: a first transistor group including a plurality of transistors connected in parallel such that operating voltages for the plurality of light emitting elements are input to gates of the plurality of transistors, respectively, the gates of the plurality of transistors being non-inverting input terminals of the operational amplifier; and a second transistor that cooperates with the first transistor group to form a differential configuration and has a gate, the gate of the second transistor being an inverting input terminal of the operational amplifier, and an output from an output terminal being negatively fed back to the gate of the second transistor.

8. The drive circuit according to claim 7,

the driving unit includes a P-type transistor and drives the plurality of light emitting elements whose cathodes are commonly connected, and

the plurality of transistors of the first transistor group and the second transistor all include N-type transistors.

9. The drive circuit according to claim 7,

the driving unit includes an N-type transistor and drives the plurality of light emitting elements whose anodes are commonly connected, and

the plurality of transistors of the first transistor group and the second transistor all include P-type transistors.

10. A light emitting device comprising:

a light emitting element array in which a plurality of light emitting elements are provided;

a driving unit configured to drive the plurality of light emitting elements of the light emitting element array; and

a multiple-input single-output operational amplifier comprising: a first transistor group including a plurality of transistors connected in parallel such that operating voltages for the plurality of light emitting elements are input to gates of the plurality of transistors, respectively, the gates of the plurality of transistors being non-inverting input terminals of the operational amplifier; and a second transistor that cooperates with the first transistor group to form a differential configuration and has a gate, the gate of the second transistor being an inverting input terminal of the operational amplifier, and an output from an output terminal being negatively fed back to the gate of the second transistor.

Technical Field

The present technology relates to a detection circuit, a drive circuit, and a light emitting device.

Background

In recent years, a light emitting device in which a large number (e.g., several hundreds) of light emitting elements are arranged in parallel on one chip like a Vertical Cavity Surface Emitting Laser (VCSEL) is known (for example, see patent document 1).

Documents of the prior art

Patent document

Patent document 1: PCT patent publication No. WO2015/174239

Disclosure of Invention

Technical problem

However, with the above-described conventional technique, in a light emitting device provided with a large number of light emitting elements, even in the case where an abnormality occurs in one light emitting element, it is difficult to detect the abnormality.

Accordingly, the present disclosure proposes a detection circuit, a drive circuit, and a light emitting device capable of detecting an abnormality even in the case where an abnormality occurs in one of a large number of light emitting elements.

Solution to the problem

According to the present disclosure, a detection circuit is provided. The detection circuit includes a multiple-input single-output operational amplifier. The operational amplifier includes a first transistor group and a second transistor. The first transistor group includes a plurality of transistors connected in parallel so that operating voltages for the plurality of light emitting elements are input to gates of the plurality of transistors, respectively, which are non-inverted (non-inverted) input terminals of the operational amplifier. The second transistor cooperates with the first transistor group to form a differential configuration, and has a gate which is an inverting input terminal of the operational amplifier, and to which an output from the output terminal is negatively fed back.

Advantageous effects of the invention

According to the present disclosure, even in the case where an abnormality occurs in one of a large number of light emitting elements, the abnormality as described above can be detected. It should be noted that the advantageous effects described herein are not necessarily restrictive and may be one of the other advantageous effects described in the present disclosure.

Drawings

Fig. 1 is a perspective view illustrating an example of a configuration of a light emitting device according to an embodiment of the present disclosure.

Fig. 2 is a circuit diagram illustrating an example of a configuration of a driving circuit according to an embodiment of the present disclosure.

Fig. 3 is a circuit diagram illustrating an example of a configuration of an operational amplifier according to an embodiment of the present disclosure.

Fig. 4 is a circuit diagram showing an operation example of an operational amplifier in the case where a light emitting element according to an embodiment of the present disclosure is normal.

Fig. 5 is a circuit diagram showing an operation example of an operational amplifier in the case where a light emitting element according to an embodiment of the present disclosure is abnormal.

Fig. 6 is a circuit diagram showing a configuration example of a drive circuit of modification 1 of the embodiment of the present invention.

Fig. 7 is a circuit diagram showing an example of the arrangement of the drive circuit of modification 2 of the embodiment of the present invention.

Detailed Description

Hereinafter, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. It should be noted that in the embodiments described below, the same elements are denoted by the same reference numerals, and overlapping description thereof is omitted.

[ configuration of light-emitting device ]

Fig. 1 is a perspective view of an example of the configuration of a light emitting device 1 according to an embodiment of the present disclosure. As shown in fig. 1, a light emitting device 1 includes a light emitting element array 2 and a drive circuit 3.

The light emitting element array 2 includes a plurality of light emitting elements 5 (see fig. 2). The light emitting element array 2 described above may be, for example, a semiconductor laser, and in particular, a Vertical Cavity Surface Emitting Laser (VCSEL). It should be noted that, in the present embodiment, the light emitting element array 2 is not limited to these examples.

The drive circuit 3 includes a circuit for driving the light emitting element array 2. Specifically, the drive circuit 3 includes a drive unit 10 (refer to fig. 2) for individually driving the plurality of light emitting elements 5. The internal arrangement of the drive circuit 3 will be described below.

Further, in the light emitting device 1 according to the present embodiment, the light emitting element array 2 is mounted on the main surface of the drive circuit 3. Further, the light emitting element array 2 and the driving circuit 3 are mechanically and electrically connected to each other through a plurality of micro bumps 4. It should be noted that the light emitting element array 2 and the driving circuit 3 are not necessarily connected through the micro bumps 4.

[ configuration of drive Circuit ]

A specific configuration of the drive circuit 3 is now described with reference to fig. 2. Fig. 2 is a circuit diagram showing an example of the configuration of the drive circuit 3 according to an embodiment of the present disclosure. As shown in fig. 2, the drive circuit 3 includes a drive unit 10 and a detection circuit 20.

In addition, for ease of understanding, the embodiments in fig. 2 to 5 explained below are directed to a case where 8 light emitting elements 5 (hereinafter referred to as light emitting elements 5-1 to 5-8) are provided on the light emitting element array 2. In addition, in the present embodiment, the number of the light emitting elements 5 provided in the light emitting element array 2 is not limited to 8.

The driving unit 10 includes P-type transistors 11-1 to 11-8, and the P-type transistors 11-1 to 11-8 drive the light emitting elements 5-1 to 5-8 by controlling gate voltages to the P-type transistors 11-1 to 11-8. It should be noted that the gate voltages for the P-type transistors 11-1 to 11-8 are controlled by a control unit (not shown) provided inside the drive circuit 3 in accordance with a signal from the outside.

The source of the P-type transistors 11-1 to 11-8 is supplied with a power supply voltage Vcc. The drains of the P-type transistors 11-1 to 11-8 are connected to the anodes of the light emitting elements 5-1 to 5-8 as light emitting diodes, respectively. Cathodes of the light emitting elements 5-1 to 5-8 are commonly grounded. In other words, in the embodiment, the plurality of light emitting elements 5 are connected in a cathode common connection manner.

Further, from the portions between the drains of the P-type transistors 11-1 to 11-8 and the anodes of the light emitting elements 5-1 to 5-8, the operating voltages V1 to V8 of the light emitting elements 5-1 to 5-8 are output, respectively. Then, the operating voltages V1 to V8 of the light emitting elements 5-1 to 5-8 are input to the detection circuit 20.

The detection circuit 20 includes an operational amplifier 30, comparators 40 and 50, and a level shift circuit 60. The operational amplifier 30 is a multiple-input single-output operational amplifier, and the first transistor group 31 and the second transistor group 32 have a differential configuration with respect to each other.

The first transistor group 31 includes N-type transistors 31-1 to 31-8 as many as the plurality of light emitting elements 5, the N-type transistors 31-1 to 31-8 being connected in parallel. The power supply voltage Vcc is supplied to the drains of the N-type transistors 31-1 to 31-8 through the P-type transistor 33. Meanwhile, the sources of the n-type transistors 31-1 to 31-8 are grounded through a constant current source 35.

The second transistor 32 includes an N-type transistor. The drain of the second transistor 32 is supplied with the power supply voltage Vcc through the P-type transistor 34. Meanwhile, the source of the second transistor 32 is grounded through a constant current source 35, and the gate of the second transistor 32 is connected to a node 36 between the drain of the P-type transistor 34 and the drain of the second transistor 32.

Meanwhile, the gate of the P-type transistor 33 and the gate of the P-type transistor 34 are commonly connected to a portion between the drain of the P-type transistor 33 and the drains of the N-type transistors 31-1 to 31-8. It should be noted that the P-type transistor 33 and the P-type transistor 34 have the same size as each other.

As described above, in the operational amplifier 30 according to the present embodiment, the operating voltages V1 to V8 for the light emitting elements 5-1 to 5-8 are input to the gates of the N-type transistors 31-1 to 31-8 (the first transistor group 31), respectively, which are the non-inverting input terminals of the operational amplifier 30. Then, in the operational amplifier 30, the output of the operational amplifier 30 is negatively fed back from the node 36 as the output terminal of the operational amplifier 30 to the gate of the second transistor 32, and the gate of the second transistor 32 is the inverting input terminal of the operational amplifier 30.

Therefore, in the present embodiment, the output voltage Vo, the value of which differs between the case where the operating voltages V1 to V8 of the light emitting elements 5-1 to 5-8 have normal values and the other case where any one of the operating voltages V1 to V8 has an abnormal value, is output from the output terminal (node 36) of the operational amplifier 30. Next, an example of a specific operation of the operational amplifier 30 is described with reference to fig. 3 to 5.

Fig. 3 is a circuit diagram illustrating an example of the configuration of the operational amplifier 30 according to an embodiment of the present disclosure. As shown in fig. 3, the gates of the N-type transistors 31-1 to 31-8 as the non-inverting input terminals of the operational amplifier 30 are connected to the anodes of the light emitting elements 5-1 to 5-8, respectively.

Therefore, the operating voltages V1 to V8 of the light emitting elements 5-1 to 5-8 are input to the gates of the N-type transistors 31-1 to 31-8, respectively. It should be noted that in the present embodiment, all of the n-type transistors 31-1 to 31-8 have equal sizes.

Further, as shown in fig. 3, the second transistor 32 according to the present embodiment preferably includes the same number of N-type transistors 32-1 to 32-8 as the number of N-type transistors 31-1 to 31-8, the N-type transistors 32-1 to 32-8 being connected in parallel. The drains of N-type transistors 32-1 through 32-8 are supplied with a supply voltage Vcc through P-type transistor 34. Further, the sources of the N-type transistors 32-1 to 32-8 are grounded through a constant current source 35.

Further, in this embodiment, the gates of N-type transistors 32-1 through 32-8 are connected to node 36 through switches SW1 through SW8, respectively. The switches SW1 to SW8 are controlled by the control unit for controlling the drive circuit 3 described above.

It should be noted that in the present embodiment, all the N-type transistors 32-1 to 32-8 have a size equal to that of the N-type transistor 31-1 of the first transistor group 31. In particular, in the present embodiment, all of the N-type transistors 31-1 to 31-8 and the N-type transistors 32-1 to 32-8 have equal sizes.

Fig. 4 is a circuit diagram showing an operation example of the operational amplifier 30 in the case where the light emitting element 5 according to the embodiment of the present disclosure is normal. It should be noted that, in fig. 4 and 5, each light emitting element 5 which operates in response to a signal from the outside is indicated by a solid line, and each light emitting element 5 which does not operate is indicated by a broken line. In particular, in the example of fig. 4, the control unit of the drive circuit 3 operates the light emitting elements 5-1, 5-3, and 5-5 to 5-7, but does not operate the light emitting elements 5-2, 5-4, and 5-8.

Here, in the case where all of the light emitting elements 5-1, 5-3, and 5-5 to 5-7 that are operating are normal, their operating voltages V1, V3, and V5 to V7 have values equivalent to the operating voltages (e.g., 2.2V) of the light emitting elements 5-1, 5-3, and 5-5 to 5-7 based on specifications and the like.

Further, in this case, as shown in fig. 4, the current I1 flowing to the first transistor group 31 flows equally to the N type transistors 31-1, 31-3, and 31-5 to 31-7 corresponding to the light emitting elements 5-1, 5-3, and 5-5 to 5-7 in operation.

Here, in the present embodiment, the switches SW1 to SW8 are controlled so that the size of the operating first transistor group 31 and the size of the operating second transistor 32 coincide with each other.

For example, as shown in fig. 4, the switches SW1 to SW8 are controlled by the control unit so that the switches SW1, SW3, and SW5 to SW7 corresponding to the channels of the light emitting element 5, whose operation has been instructed, are turned on, and so that the other switches SW2, SW4, and SW8 are not turned on. Therefore, when the light emitting element 5 operates, the number of operating transistors in the first transistor group 31 and the number of operating second transistors 32 coincide with each other.

Accordingly, the voltage Vo, which is an average value (e.g., 2.2V) of the operating voltages V1, V3, and V5 to V7 input to the non-inverting input terminal, is output from the node 36, which is the output terminal of the operational amplifier 30. This is because the output voltage Vo output from the operational amplifier 30 is fed back to the N-type transistors 31-1, 31-3 and 31-5 to 31-7 through which the current I1 equally flows.

Further, in the present embodiment, the size of the operating first transistor group 31 and the size of the operating second transistor 32 coincide with each other, and therefore, it is possible to suppress the deviation of the average value of the operating voltages V1, V3, and V5 to V7 input to the non-inverting input terminal. Therefore, according to the present embodiment, the average value of the operating voltage of the light emitting element 5 being operated can be more accurately output from the operational amplifier 30.

Fig. 5 is a circuit diagram showing an operation example of the operational amplifier 30 in the case where the light emitting element 5 according to the embodiment of the present disclosure is abnormal. In the example of fig. 5, as in the example of fig. 4, the control unit of the drive circuit 3 operates the light emitting elements 5-1, 5-3, and 5-5 to 5-7, but does not operate the light emitting elements 5-2, 5-4, and 5-7 and 5-8. In addition, in the example of fig. 5, abnormality occurs in the light emitting element 5-3.

Here, the operating voltages V1 and V5 to V7 of the light emitting elements 5-1 and 5-5 to 5-7 which normally operate are the operating voltages (e.g., 2.2V) in the case where the light emitting elements are normal. On the other hand, the value of the operating voltage V3 of the light emitting element 5-3 suffering from the abnormality is higher (e.g., 2.7V) than that in the case where all the operating light emitting elements are normal.

Further, in this case, as shown in fig. 5, the current I2 flowing to the first transistor group 31 flows concentratedly to the N-type transistor 31-3 corresponding to the light emitting element 5-3 which suffers from the abnormality.

Therefore, the output voltage Vo is output from the node 36 as the output terminal of the operational amplifier 30: the value of the output voltage Vo is the value of the operating voltage V3 (e.g., 2.7V) input to the non-inverting input terminal. This is because the output voltage Vo output from the operational amplifier 30 is fed back only to the N-type transistor 31-3 through which the current I2 flows intensively.

As described above, in the case where the operating voltages of the plurality of light emitting elements 5 that operate are all equal, the operational amplifier 30 according to the present embodiment outputs the average value of the operating voltages of the plurality of light emitting elements 5 that operate as the output voltage Vo.

On the other hand, in the case where the operating voltage of a specific light emitting element 5 is higher than the operating voltages of the other light emitting elements 5 due to abnormality or the like, the operational amplifier 30 according to the present embodiment outputs the operating voltage of the specific light emitting element 5 as the output voltage Vo.

In particular, in the present embodiment, in the case where even one light emitting element among the large number of light emitting elements 5 is abnormal, the output voltage Vo of the operational amplifier 30 is increased. Therefore, according to the present embodiment, by monitoring the output voltage Vo from such an operational amplifier 30 as described above, even if an abnormality occurs in one of the plurality of light emitting elements 5, such an abnormality can be detected.

Referring back to fig. 2, a description is continued of the detection circuit 20 according to the embodiment. The output voltage Vo output from the operational amplifier 30 is input to the non-inverting input terminal of the comparator 40. At the same time, a threshold voltage Vth of a predetermined value (e.g., 2.7V) is input from the voltage source 41 to the inverting input terminal of the comparator 40.

Then, the comparator 40 generates the detection signal E1 by comparing the output voltage Vo input to the non-inverting input terminal and the threshold voltage Vth input to the inverting input terminal.

Therefore, in the case where all of the plurality of light emitting elements 5 operating are normal and the output voltage Vo (for example, 2.2V) having a value lower than the threshold voltage Vth is output from the operational amplifier 30, the comparator 40 outputs the detection signal E1 of the low level.

On the other hand, in the case where an abnormality occurs in any one of the plurality of light emitting elements 5 and an output voltage Vo (for example, 2.7V) having a value greater than or equal to the threshold voltage Vth is output from the operational amplifier 30, the comparator 40 outputs the detection signal E1 of high level.

As described above, by determining the output from the operational amplifier 30 by the comparator 40, even if an abnormality occurs in one of the plurality of light emitting elements 5, the abnormality can be simply and conveniently detected. It should be noted that, in the present embodiment, the value of the threshold voltage Vth is not limited to 2.7V, but may be appropriately set based on the operating voltage of the light emitting element 5 or the like.

The output voltage Vo output from the operational amplifier 30 is further input to a non-inverting input terminal of the comparator 50. Further, the inverting input terminal and the output terminal of the comparator 50 are conductively connected to each other. In particular, since the comparator 50 has a so-called voltage follower configuration, the output voltage Vo is output from the comparator 50 as it is.

The output voltage Vo output from the comparator 50 is input to the level shift circuit 60. The level shift circuit 60 includes a comparator 61 and resistors R1 to R4, and the resistors R1 to R4 all have equal resistance values.

The non-inverting input terminal of the comparator 61 is connected to the power supply voltage Vcc through a resistor R1 and to ground through a resistor R2. Meanwhile, the inverting input terminal of the comparator 61 is connected to the output terminal of the comparator 50 through a resistor R3. Further, the output terminal of the comparator 61 is connected to the inverting input terminal of the comparator 61 through a resistor R4.

By inputting the output voltage Vo from the operational amplifier 30 to the level shift circuit 60 having the above-described configuration, the differential voltage Vcc-Vo of the output voltage Vo from the power supply voltage Vcc is output from the level shift circuit 60.

Therefore, in the present embodiment, the control unit of the drive circuit 3 can appropriately control the power supply voltage Vcc based on the differential voltage Vcc-Vo as described above to reduce the power consumption of the drive circuit 3.

Further, in the present embodiment, the comparator 50 serving as a buffer is provided between the operational amplifier 30 and the level shift circuit 60, so that currents flowing through the resistors R3 and R4 of the level shift circuit 60 are supplied to the comparator 50 serving as a buffer. Therefore, an output error of the amplifier 30 can be suppressed.

[ various modifications ]

Now, various modifications of the embodiment will be described with reference to fig. 6 and 7. Fig. 6 is a circuit diagram showing an example of the configuration of the drive circuit 3 according to modification 1 of the embodiment of the present disclosure.

It should be noted that for ease of understanding, the examples in fig. 6 and 7 are directed to the following cases: four driving units 10 for driving eight light emitting elements 5, not shown, respectively, are provided in the driving circuit 3. Further, since the configuration of such four drive units 10 (hereinafter also referred to as drive units 10-1 to 10-4) is similar to that of the example in fig. 2, illustration of the detailed configuration is omitted.

The detection circuit 20 of modification 1 includes the same number of operational amplifiers 30 (hereinafter also referred to as operational amplifiers 30-1 to 30-4) as the number of the plurality of driving units 10, a subsequent-stage operational amplifier 70, comparators 40 and 50, and a level shift circuit 60.

In modification 1, the operating voltages V1 to V8 of the 8 light emitting elements 5 are output from the driving unit 10-1 and input to the operational amplifier 30-1. Then, the output voltage Vo1 is output from the operational amplifier 30-1 based on the operating voltages V1 to V8.

Similarly, the operating voltages V9 to V16 of the eight light emitting elements 5 are output from the driving unit 10-2 and input to the operational amplifier 30-2. Then, the output voltage Vo2 is output from the operational amplifier 30-2 based on the operating voltages V9 to V16.

Further, the operating voltages V17 to V24 of the eight light emitting elements 5 are output from the driving unit 10-3 and input to the operational amplifier 30-3. Then, the output voltage Vo3 is output from the operational amplifier 30-3 based on the operating voltages V17 to V24.

Further, the operating voltages V25 to V32 of the eight light emitting elements 5 are output from the driving unit 10-4 and input to the operational amplifier 30-4. Then, the output voltage Vo4 is output from the operational amplifier 30-4 based on the operating voltages V25 to V32.

The output voltages Vo1 to Vo4 output from the operational amplifiers 30-1 to 30-4 are input to the subsequent operational amplifier 70. The subsequent-stage operational amplifier 70 has a similar configuration to the operational amplifier 30. Specifically, the subsequent-stage operational amplifier 70 is a multiple-input single-output operational amplifier, and the third transistor group 71 and the fourth transistor 72 have a differential configuration with respect to each other.

The third transistor group 71 includes N-type transistors 71-1 to 71-4 as many as the plurality of operational amplifiers 30, the N-type transistors 71-1 to 71-4 being connected in parallel. The power supply voltage Vcc is supplied to the drains of the N-type transistors 71-1 to 71-4 through the P-type transistor 73. Meanwhile, the sources of the N-type transistors 71-1 to 71-4 are grounded through a constant current source 75.

The fourth transistor 72 includes an N-type transistor. The drain of the fourth transistor 72 is supplied with the power supply voltage Vcc through the P-type transistor 74. Meanwhile, the source of the fourth transistor 72 is grounded through a constant current source 75, and the gate of the fourth transistor 72 is connected to a node 76 between the drain of the P-type transistor 74 and the drain of the fourth transistor 72.

Further, the gate of the P-type transistor 73 and the gate of the P-type transistor 74 are commonly connected to a portion between the drain of the P-type transistor 73 and the drains of the N-type transistors 71-1 to 71-4. It should be noted that the P-type transistor 73 and the P-type transistor 74 have equal sizes to each other.

As described above, in the subsequent-stage operational amplifier 70 of modification 1, the output voltages Vo1 to Vo4 output from the operational amplifier 30 are input to the gates of the N-type transistors 71-1 to 71-4 (third transistor group 71), respectively, and these gates are non-inverting input terminals. Further, in the subsequent-stage operational amplifier 70, the output thereof is negatively fed back from the node 76 as an output terminal to the gate of the fourth transistor 72, which gate of the fourth transistor 72 is the inverting input terminal of the subsequent-stage operational amplifier 70.

Therefore, in the case where the operating voltages of the operating light emitting elements 5 among the 32 light emitting elements 5 are all equal to each other, the subsequent-stage operational amplifier 70 outputs the average value of the operating voltages of the operating light emitting elements 5 as the output voltage Vo.

On the other hand, when the operating voltage of the specific light emitting element 5 is higher than the operating voltages of the other light emitting elements 5 due to abnormality or the like, the subsequent operational amplifier 70 outputs the operating voltage of the specific light emitting element 5 as the output voltage Vo.

For example, when the operating voltage of a specific light-emitting element 5 among the plurality of light-emitting elements 5 driven by the driving unit 10-1 is higher than the operating voltages of the other light-emitting elements 5, the operating voltage of the specific light-emitting element 5 is output from the operational amplifier 30-1 as the output voltage Vo 1.

Then, since the value of the output voltage Vo1 is higher than the values of the output voltages Vo2 to Vo4 of the other operational amplifiers 30-2 to 30-4, the output voltage Vo1 having a higher value than the other values is output from the subsequent operational amplifier 70 as the output voltage Vo.

In particular, in modification 1, in the case where even one light emitting element among the large number of light emitting elements 5 is abnormal, the output voltage Vo from the subsequent-stage operational amplifier 70 is increased. Therefore, in modification 1, by monitoring the output voltage Vo from the subsequent operational amplifier 70, even if an abnormality occurs in one of the plurality of light emitting elements 5, the abnormality can be easily and conveniently detected.

Further, in modification 1, by determining the output from the subsequent-stage operational amplifier 70 using the comparator 40, even in the case where abnormality occurs in even one of the large number of light-emitting elements 5, the abnormality can be simply and conveniently detected as in the embodiment.

Further, in modification 1, as in the embodiment, the output voltage Vo output from the subsequent-stage operational amplifier 70 is input to the level shift circuit 60 through the comparator 50. Therefore, the differential voltage Vcc-Vo of the output voltage Vo from the power supply voltage Vcc is output from the level shift circuit 60.

Therefore, in modification 1, it is possible to reduce the power consumption of the drive circuit 3 by appropriately controlling the power supply voltage Vcc by the control unit of the drive circuit 3 based on such a differential voltage Vcc-Vo as just described.

It should be noted that the output voltages Vo1 to Vo4 from all the operational amplifiers 30-1 to 30-4 are input to the subsequent-stage operational amplifier 70 of modification 1 in many cases. Therefore, in modification 1 different from the operational amplifier 30 of the embodiment, it is not necessary that the fourth transistor 72 include a plurality of transistors and a plurality of switches, but it suffices that the fourth transistor 72 is configured to have a size equal to the total size of the N-type transistors 71-1 to 71-4.

Since this can make the configuration of the subsequent-stage operational amplifier 70 simple and convenient, the manufacturing cost of the drive circuit 3 can be reduced.

On the other hand, like the operational amplifier 30 and the like of the embodiment shown in fig. 3, the fourth transistor 72 of the subsequent operational amplifier 70 may include a plurality of transistors and a plurality of switches. This enables the subsequent operational amplifier 70 to output the average value of the operating voltages of all the light-emitting elements 5 in operation with higher accuracy.

Fig. 7 is a circuit diagram showing an example of the configuration of the drive circuit 3 according to modification 2 of the embodiment of the present disclosure. Modification 2 similar to modification 1 is: the output voltage Vo from the rear-stage operational amplifier 70 is output as a differential voltage Vcc-Vo through the comparator 50 and the level shift circuit 60. It should be noted that since the configuration of the comparator 50 and the level shift circuit 60 in fig. 7 is the same as that of the comparator 50 and the level shift circuit 60 in the example of fig. 6, the description of the detailed configuration thereof is omitted.

On the other hand, modification 2 is different from modification 1 in the arrangement of the comparator 40 for detecting an abnormality of the light emitting element 5. In the drive circuit 3 of modification 2 just described, the same number of comparators 40-1 to 40-4 as the number of the plurality of operational amplifiers 30-1 to 30-4, OR (OR) circuit 80, AND (AND) circuit 90 are separately provided.

The output voltage Vo1 output from the operational amplifier 30-1 is input to the non-inverting input terminal of the comparator 40-1. At the same time, a threshold voltage Vth of a predetermined value (for example, 2.7V) is input from the voltage source 41-1 to the inverting input terminal of the comparator 40-1.

Then, the comparator 40-1 generates the detection signal E1-1 by comparing the output voltage Vo1 input to the non-inverting input terminal and the threshold voltage Vth input to the inverting input terminal with each other.

Therefore, in the case where the plurality of light emitting elements 5 driven by the driving unit 10-1 are all normal and the output voltage Vo1 having a value lower than the threshold voltage Vth is output from the operational amplifier 30-1, the comparator 40-1 outputs the detection signal E1-1 of a low level.

On the other hand, in the case where an abnormality occurs in any one of the plurality of light emitting elements 5 driven by the driving unit 10-1 and the output voltage Vo1 having a value equal to or higher than the threshold voltage Vth is output from the operational amplifier 30-1, the comparator 40-1 outputs the detection signal E1-1 of a high level.

Similarly, the comparators 40-2 to 40-4 generate the detection signals E1-2 to E1-4 by comparing the output voltages Vo2 to Vo4 input to the non-inverting input terminals and the threshold voltages Vth input to the inverting input terminals from the voltage sources 41-2 to 41-4, respectively, with each other.

Therefore, in the case where all of the plurality of light emitting elements 5 driven by the driving units 10-2 to 10-4 are normal, the output voltages Vo2 to Vo4 having values lower than the threshold voltage Vth are output from the operational amplifiers 30-2 to 30-4, respectively. In this case, the comparators 40-2 to 40-4 output the detection signals E1-2 to E1-4 at low levels, respectively.

On the other hand, in the case where an abnormality occurs in any one of the plurality of light emitting elements 5 driven by the driving units 10-2 to 10-4, the output voltages Vo2 to Vo4 each having a value equal to or higher than the threshold voltage Vth are output from at least one of the operational amplifiers 30-2 to 30-4. In this case, at least one of the comparators 40-2 to 40-4 outputs the detection signals E1-2 to E1-4 of high level.

Then, the detection signals E1-1 to E1-4 output from the comparators 40-1 to 40-4 are input to the OR circuit 80. Therefore, in the case where all of the plurality of light emitting elements 5 driven by the driving units 10-1 to 10-4 are normal, the or circuit 80 outputs the detection signal E2 of the low level.

On the other hand, in the case where an abnormality occurs in any one of the plurality of light emitting elements 5 driven by the driving units 10-1 to 10-4, the or circuit 80 outputs the detection signal E2 of high level.

Then, the detection signal E2 output from the or circuit 80 is input to the and circuit 90. Further, the and circuit 90 is input with a signal S1. The signal S1 indicates a high level when the abnormality detection mode of the light emitting element 5 is active, but indicates a low level when the abnormality detection mode of the light emitting element 5 is inactive.

Therefore, when the abnormality detection mode of the plurality of light emitting elements 5 is confirmed to be effective, the and circuit 90 outputs the detection signal E3 of high level in addition to the input of the detection signal E2 of high level.

As described above, in modification 2, the abnormality detection of the light emitting element 5 is based not on the output voltage Vo from the subsequent-stage operational amplifier 70 but on the output voltages Vo1 to Vo4 from the preceding-stage operational amplifiers 30-1 to 30-4. Therefore, since an abnormality can be detected based on the output voltages Vo1 to Vo4 output from positions closer to the plurality of light emitting elements 5, abnormality detection can be achieved with high accuracy.

Further, in modification 2, the and circuit 90 is additionally provided so that abnormality detection is performed only in the case where the abnormality detection mode of the light emitting element 5 is verified to be valid. Therefore, in the case where the operating voltages of the plurality of light emitting elements 5 are unstable, for example, in a transient state when the drive circuit 3 starts operating, it is possible to suppress a case where an abnormality of one or more light emitting elements 5 is erroneously detected. It should be noted that such and circuit 90 as just described may be additionally provided to the comparator 40 at a stage subsequent to the comparator 40 in embodiment or modification 1.

Note that, in the above-described modifications 1, 2, an example in which 4 driving units 10 and 4 operational amplifiers 30 are provided in the case where the driving circuit 3 operates 32 light emitting elements 5 is explained. Meanwhile, in the present disclosure, the numbers of the light emitting elements 5, the driving units 10, and the operational amplifiers 30 are not limited to those in the above-described examples.

For example, in the case where 800 light emitting elements 5 are provided in the light emitting element array 2, 16 driving units 10 and 16 operational amplifiers 30 may be provided in the driving circuit 3 such that one driving unit 10 and one operational amplifier 30 are connected every 50 light emitting elements 5.

Further, in the above-described embodiment, an example is shown in which the driving unit 10 includes P-type transistors, and the driving unit 10 drives the plurality of light emitting elements 5 whose cathodes are commonly connected, while all of the first transistor group 31 and the second transistor 32 include N-type transistors.

On the other hand, according to the present disclosure, the driving unit 10 may additionally include N-type transistors, and the driving unit 10 drives the plurality of light emitting elements 5 whose anodes are commonly connected, while all of the first transistor group 31 and the second transistor 32 include P-type transistors.

It should be noted that the advantageous effects described in this specification are exemplary rather than limiting, and that some other effects may also be applicable.

It should be noted that the present technology may also employ such a configuration as described below.

(1)

A detection circuit, comprising:

a multiple-input single-output operational amplifier comprising:

a first transistor group including a plurality of transistors connected in parallel such that operating voltages for a plurality of light emitting elements are respectively input to gates of the plurality of transistors, the gates being non-inverting input terminals of the operational amplifier, and

a second transistor that cooperates with the first transistor group to form a differential configuration and has a gate, the gate of the second transistor being an inverting input terminal of the operational amplifier, and an output from an output terminal being negatively fed back to the gate of the second transistor.

(2)

The detection circuit according to the above (1), wherein

The second transistor includes a plurality of transistors connected in parallel, and

the detection circuit further includes a control unit configured to control connection states of the plurality of transistors in the second transistor so that sizes of the first transistor group and the second transistor are in agreement with each other.

(3)

The detection circuit according to the above (1) or (2), further comprising:

a comparator configured to compare an output voltage output from the operational amplifier and a predetermined threshold voltage with each other.

(4)

The detection circuit according to any one of the above (1) to (3), further comprising:

a plurality of operational amplifiers; and

a multiple-input single-output post-stage operational amplifier, comprising: a third transistor group including a plurality of transistors connected in parallel such that outputs of the plurality of operational amplifiers are respectively input to gates of the plurality of transistors, the gates being non-inverting input terminals of the subsequent-stage operational amplifier; and a fourth transistor that cooperates with the third transistor group to form a differential configuration and has a gate, the gate of the fourth transistor being an inverted input terminal of the subsequent-stage operational amplifier, and an output from the output terminal being negatively fed back to the gate of the fourth transistor.

(5)

The detection circuit according to the above (4), further comprising:

a comparator configured to compare an output voltage output from the subsequent-stage operational amplifier and a predetermined threshold value with each other.

(6)

The detection circuit according to the above (4), further comprising:

a plurality of comparators configured to compare output voltages output from the plurality of operational amplifiers individually and a predetermined threshold value with each other.

(7)

A drive circuit, comprising:

a driving unit configured to drive the plurality of light emitting elements; and

a multiple-input single-output operational amplifier comprising: a first transistor group including a plurality of transistors connected in parallel such that operating voltages for a plurality of light emitting elements are input to gates of the plurality of transistors, respectively, the gates of the plurality of transistors being non-inverting input terminals of the operational amplifier; and a second transistor that cooperates with the first transistor group to form a differential configuration and has a gate, the gate of the second transistor being an inverting input terminal of the operational amplifier, and an output from an output terminal being negatively fed back to the gate of the second transistor.

(8)

The drive circuit according to the above (7), wherein

The driving unit includes a P-type transistor, and the driving unit drives a plurality of light emitting elements whose cathodes are commonly connected, and

the plurality of transistors in the first transistor group and the second transistor each include an N-type transistor.

(9)

The drive circuit according to the above (7), wherein

The driving unit includes an N-type transistor, and the driving unit drives a plurality of light emitting elements whose anodes are commonly connected, and

the plurality of transistors in the first transistor group and the second transistor each include a P-type transistor.

(10)

A light emitting device comprising:

a light emitting element array in which a plurality of light emitting elements are provided;

a driving unit configured to drive a plurality of light emitting elements of the light emitting element array; and a multiple-input single-output operational amplifier comprising: a first transistor group including a plurality of transistors connected in parallel such that operating voltages for a plurality of light emitting elements are input to gates of the plurality of transistors, respectively, the gates of the plurality of transistors being non-inverting input terminals of the operational amplifier; and a second transistor that cooperates with the first transistor group to form a differential configuration and has a gate, the gate of the second transistor being an inverting input terminal of the operational amplifier, and an output from an output terminal being negatively fed back to the gate of the second transistor.

REFERENCE SIGNS LIST

1: light emitting device

2: light emitting element array

3: driving circuit

5. 5-1 to 5-8: light emitting element

10: drive unit

20: detection circuit

30: operational amplifier

31: a first transistor group

32: second transistor

40. 40-1 to 40-4: comparator with a comparator circuit

70: operational amplifier of later stage

71: third transistor group

72: a fourth transistor

V1 to V32: operating voltage

Vo: and outputting the voltage.