Quantum dot laser integrated on silicon substrate by using mechanical features and through-silicon vias
阅读说明:本技术 利用机械特征和贯穿硅通孔集成在硅基座上的量子点激光器 (Quantum dot laser integrated on silicon substrate by using mechanical features and through-silicon vias ) 是由 多米尼克·F·斯里亚尼 西恩·P·安德森 威普库马·帕特尔 于 2019-03-01 设计创作,主要内容包括:提供了一种激光器,包括:具有第一表面和与第一表面相对的第二表面的硅衬底;与硅衬底的第一表面接合的III-V族半导体材料层;以及量子点层,该量子点层被包括在从III-V族半导体材料层生长出的一个或多个层中并相对于硅衬底的第一表面处于预定高度。(There is provided a laser including: a silicon substrate having a first surface and a second surface opposite the first surface; a layer of III-V semiconductor material bonded to the first surface of the silicon substrate; and a quantum dot layer included in one or more layers grown from the III-V group semiconductor material layer and at a predetermined height with respect to the first surface of the silicon substrate.)
1. A laser, comprising:
a silicon substrate having a first surface and a second surface opposite to the first surface;
a layer of III-V semiconductor material bonded to the first surface of the silicon substrate; and
a quantum dot layer (180) included in one or more layers grown from the layer of group III-V semiconductor material and at a predetermined height relative to the first surface of the silicon substrate.
2. The laser of claim 1, further comprising:
a photonic element (370) fabricated on the first surface of the silicon substrate and including a waveguide optically aligned with the quantum dot layer.
3. The laser of any preceding claim, wherein the second surface of the silicon substrate comprises a plurality of mounting features defined as wafer level features on the silicon substrate.
4. A laser as claimed in any preceding claim, wherein the layer of III-V semiconductor material further comprises:
a foundation layer (120) bonded to the first surface of the silicon substrate, the foundation layer comprising a III-V semiconductor material;
a host layer (160) grown from the base layer, the host layer comprising a group III-V semiconductor material lattice matched to the group III-V semiconductor material, wherein the quantum dot layer is grown within the host layer; and
a contact layer (190) grown from the host layer, the contact layer comprising the III-V semiconductor material, wherein the contact layer is separated from the base layer by the host layer.
5. The laser of claim 4, further comprising a waveguide layer (170) epitaxially grown from the host layer to surround the quantum dot layer.
6. A wafer (700) comprising a plurality of dies, the plurality of dies comprising a laser as defined in any preceding claim.
7. A method, comprising:
bonding (210) a III-V semiconductor material to a silicon substrate;
removing (220) excess group III-V semiconductor material bonded to the silicon substrate to leave a base layer (140) of group III-V semiconductor material bonded to the silicon substrate of a predetermined thickness; and
after removing the excess III-V semiconductor material, at least one layer is epitaxially grown (230) on the III-V semiconductor material base layer, the at least one layer including a quantum dot layer (180).
8. The method of claim 7, wherein the quantum dot layer is arranged at a predetermined height relative to the substrate; and
fabricating (270) a photonic element (370) on the substrate, wherein a waveguide of the photonic element is optically aligned with the quantum dot layer according to the predetermined height.
9. The method of any of claims 7 to 8, wherein the III-V semiconductor material is bonded in sheet (120) form to a first side of a silicon wafer (110) comprising the silicon substrate.
10. The method of claim 9, further comprising:
dicing (280) the silicon wafer to produce a plurality of quantum dot lasers.
11. The method of claim 10, further comprising:
adding (240) a plurality of alignment features to a second side of the silicon wafer opposite the first side; and is
Wherein dicing the silicon wafer produces the plurality of quantum dot lasers such that each quantum dot laser includes at least one alignment feature of the plurality of alignment features.
12. The method of any of claims 7 to 11, wherein epitaxially growing the quantum dot layer further comprises:
epitaxially growing a host layer (160) from the silicon substrate, the host layer comprising a material lattice-matched to the III-V material;
epitaxially growing a contact layer (190) from the host layer, the contact layer comprising the group III-V material; and
epitaxially growing a laser waveguide layer (170) within said host layer around said quantum dot layer between said contact layer and said silicon substrate.
13. The method of claim 12, wherein,
when the group III-V semiconductor material is GaAs, the lattice-matched group III-V semiconductor material host layer comprises one of: AlGaAs and InGaP;
when the semiconductor material is InP, the lattice-matched III-V semiconductor material matrix layer comprises one of: InGaAs, AlInAs, GaAsSb, AlGaInAs, and InGaAsP; and is
When the III-V semiconductor material is GaN, the lattice-matched III-V semiconductor material host layer includes one of: InGaN, and AlGaN.
14. A wafer (700), comprising:
a silicon substrate;
a base layer (120) of a predetermined thickness of a III-V semiconductor material, the base layer bonded to the silicon substrate; and
at least one quantum dot layer (180) grown on the base layer, the at least one quantum dot layer for forming a plurality of quantum dot laser pedestals (300).
15. The wafer of claim 14, further comprising a plurality of photonic devices (370) fabricated on the silicon substrate, wherein the plurality of photonic devices correspond in number to the plurality of quantum dot laser pedestals grown on the base layer, and wherein the plurality of photonic devices are aligned with associated quantum dot lasers of the plurality of quantum dot laser pedestals.
Technical Field
Embodiments presented in this disclosure relate generally to quantum dot lasers and their fabrication.
Background
The production cost and physical characteristics of lasers are directly affected by the materials and methods used in producing these lasers. The selection of production methods and build materials can affect not only the yield of a given batch of lasers, but also the size of the batch that can be made. As a result, lasers are typically produced in smaller batches on dedicated equipment than other electronic or optical components. Furthermore, since the laser is of a different material than the other components, special techniques and materials are often used to integrate the laser with other electronic or optical components to create the final assembly, while the other components do not need to be integrated with each other, which further increases the production costs.
Drawings
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.
Fig. 1A-1G show various views of a quantum dot laser assembly fabricated using thin films of III-V semiconductor material bonded to a silicon substrate.
Fig. 2 shows a flowchart outlining the general operation in an example method for producing a quantum dot laser assembly.
Fig. 3A-3C show various views of individual dies of a quantum dot laser produced according to the present disclosure.
Fig. 4A-4D show various front cross-sectional views to highlight the different layers (layers) and tiers (stratums) of the quantum dot laser at various stages of fabrication.
Fig. 5A-5D illustrate various example photonic elements integrated with a quantum dot laser assembly constructed in accordance with the present disclosure.
Fig. 6A-6C illustrate various mounting schemes for quantum dot lasers with larger photonic integrated circuits constructed in accordance with the present disclosure.
Fig. 7A and 7B show wafer level views of quantum dot lasers fabricated according to the present disclosure.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation.
Detailed Description
Overview
One embodiment presented in the present disclosure provides a method comprising: bonding a sheet of III-V semiconductor material to a first side of a silicon wafer; removing excess group III-V semiconductor material bonded to the silicon wafer to leave a base layer of group III-V semiconductor material bonded to the silicon wafer of a predetermined thickness; epitaxially growing at least one layer on the base layer, the at least one layer comprising a layer of quantum dots arranged at a predetermined height relative to the first side of the silicon wafer; and cutting the silicon wafer to produce a plurality of quantum dot lasers.
In another embodiment set forth in the present disclosure, a wafer is provided that includes a silicon substrate, a base layer of a group III-V semiconductor material of a predetermined thickness bonded to the silicon substrate, and at least one layer grown on the base layer for forming a plurality of quantum dot lasers.
Another embodiment presented in the present disclosure provides a laser including: a silicon substrate having an upper side and a lower side opposite to the upper side; a layer of III-V semiconductor material bonded to the upper side of the silicon substrate; a quantum dot layer included in one or more layers grown from the III-V semiconductor material layer and at a predetermined height relative to an upper side of the silicon substrate, and wherein the lower side of the silicon substrate includes a plurality of mounting features defined on the silicon substrate as wafer level features.
One embodiment presented in the present disclosure provides an apparatus comprising: a silicon substrate; a quantum dot laser, comprising: a base layer of a III-V semiconductor material bonded to a silicon substrate; and at least one layer epitaxially grown from the base layer, wherein the at least one layer comprises a quantum dot layer; and a photonic element fabricated on the silicon substrate and including a waveguide optically aligned with the quantum dot layer.
Another embodiment presented in the present disclosure provides a method of forming a photonic device, the method comprising: bonding a sheet of III-V semiconductor material to a substrate; forming a base layer of a III-V semiconductor material having a predetermined thickness by removing excess III-V semiconductor material bonded to the substrate; and after removing the excess III-V semiconductor material, epitaxially growing a quantum dot layer over the base layer, wherein the quantum dot layer is disposed at a predetermined height relative to the substrate; and fabricating a photonic element on the substrate, wherein a waveguide of the photonic element is optically aligned with the quantum dot layer according to a predetermined height.
Another embodiment presented in the present disclosure provides a method of forming a photonic device, the method comprising: growing at least one layer from a base layer bonded to a silicon substrate, the at least one layer comprising a quantum dot layer; fabricating a first photonic element on the silicon substrate in optical alignment with the quantum dot layer to form a laser pedestal; and mounting the laser mount to a dielectric layer of an integrated circuit including a second photonic element using the silicon substrate as a reference surface.
One embodiment set forth in the present disclosure provides a method of creating a laser, the method comprising: bonding a III-V semiconductor material to a silicon substrate; removing excess group III-V semiconductor material bonded to the substrate to leave a base layer of group III-V semiconductor material bonded to the substrate having a predetermined thickness; and epitaxially growing at least one layer on the base layer of III-V semiconductor material after removing the excess III-V semiconductor material, the at least one layer including a quantum dot layer.
Another embodiment of the present disclosure is a laser including: a silicon substrate having an upper surface, wherein a base layer is bonded to the upper surface of the silicon substrate and one or more layers are grown on the base layer, the base layer comprising a group III-V semiconductor material, the one or more layers comprising: a host layer grown from the base layer, comprising a group III-V semiconductor material lattice-matched to the group III-V semiconductor material; a quantum dot layer grown within the matrix layer; and a contact layer grown from the host layer, comprising a group III-V semiconductor material, wherein the host layer separates the contact layer from the base layer.
Another embodiment of the present disclosure is a laser, including: a quantum dot layer disposed above an upper surface of the silicon substrate by a predefined height; a base layer of a III-V semiconductor material bonded to the upper surface of the silicon substrate; and a cladding layer (cladding layer) of lattice matched group III-V semiconductor material grown from the base layer, wherein the quantum dot layer is included in a waveguide of the cladding layer.
Example embodiments
Silicon (Si) photonic applications typically use Quantum Well (QW) based lasers based on small-sized (e.g., 5 cm diameter, and smaller) indium phosphide (InP) substrates. These InP-based QW lasers typically have a limited operating temperature range, higher back reflection sensitivity, and limited gain bandwidth compared to Quantum Dot (QD) lasers. In addition, InP substrates tend to be more brittle and less thermally conductive than Si substrates, resulting in smaller sized substrates for InP-based components and poorer heat dissipation performance. Furthermore, the difference in thermal expansion coefficient between InP and Si makes strain management during production and later use more challenging.
Most efforts to date to integrate QW or QD lasers onto Si photonic platforms have been to bond lasers grown on InP or gallium arsenide (GaAs) substrates to Si substrates. Efforts to grow QD lasers directly on Si photonics platforms have not been cost effective, in part because larger wafers (e.g., 200-.
Instead, as discussed in more detail herein with reference to the drawings, growing QD lasers on thin films of III-V semiconductor materials bonded to Si substrates provides lasers with superior physical properties, easier fabrication, and/or higher production yields than InP-based QW lasers or QW/QD lasers grown from Si substrates.
Fig. 1A-1G illustrate various views of an exemplary fabrication process for a QD laser assembly using a thin film of III-V semiconductor material bonded to a Si substrate, according to one or more embodiments herein. Fig. 1A shows a
Wafer 110 includes a Si substrate from which various optical and electrical components may be grown or eutectically bonded. In some embodiments, the Si substrate of
In some embodiments, the intermediate layer 130 (when used) may be sized to have a diameter that substantially matches (e.g., +/-1%) the diameter of the
In addition, any of the III-V semiconductor material, the material of
Fig. 1C shows the
Fig. 1E shows a third manufacturing state 103, proceeding from the
Fig. 1F shows a fourth manufacturing state 104, proceeding from the third manufacturing state 103, in which an epitaxial growth process 155 is applied to the
Fig. 1G shows the
In some embodiments,
It will be appreciated that various additional processes may be applied to etch a layer into a desired shape or profile, to add one or more photonic elements, and/or to process QD lasers, which are discussed in more detail elsewhere in this disclosure. Similarly, various wafer processes may be performed on
Fig. 2 shows a flow diagram outlining general operations in an
The
After the excess III-V semiconductor material is removed, at least one layer is epitaxially grown on the thin film of III-V semiconductor material at
At
In some embodiments, etching may also be applied to the Si substrate to create various assembly features, but the Si substrate may be etched separately from the various layers; before or after the layers are etched. One example of a mounting feature is a through-silicon via (TSV) that defines a through-hole in the Si substrate and through which the bottom surface of the Si substrate is brought into electrical contact with one or more layers grown on the top surface of the Si substrate. A second example of a mounting feature is an alignment feature defined on the bottom surface of the Si substrate that allows an integrated circuit mask to be consistently applied to the Si substrate relative to the layers on the opposite side, and for mechanical positioning or manipulation of the assembly, among other benefits.
Metallization occurs at
Proceeding to
At
The Si substrate is cut into individual components at
Various tests may be performed at the wafer level prior to dicing
Proceeding to
The
Fig. 3A-3C show various views of individual dies of QD lasers produced according to one or more embodiments disclosed herein.
Fig. 3A shows a top front isometric cut-away
As shown, the first TSV320a and the second TSV320 b (collectively or collectively, TSVs 320) extend from the
First and second
Fig. 3B shows a top side isometric view 302 of
The
Fig. 3C shows a bottom side
Fig. 4A-4D illustrate various front cross-sectional views to highlight different layers and levels of the QD laser in various stages of fabrication, according to one or more embodiments disclosed herein.
Fig. 4A shows a view 401 of the layered layers of the QD laser before etching. As shown, from bottom to top, silicon level 111 is bonded to a first III-V semiconductor material level 141, from which first III-V semiconductor material level 141 a first cladding level 161, a first waveguide level 171, a quantum dot level 181, a second waveguide level 172, a second cladding level 162, and a second III-V semiconductor material layer 191 are epitaxially grown. It will be appreciated that the relative heights of the various levels may vary in different embodiments. The quantum dot level 181 is placed at a predetermined height relative to the
Fig. 4B shows a view 402 of one example of an etched QD laser. The etching removes material from one or more layers of the semiconductor of the QD laser according to a predefined shape or profile for the semiconductor components of the QD laser to produce a hierarchical set of layers. In some embodiments, such as the example shown in fig. 4B, the
Fig. 4C shows a view 403 of one example of an etched QD laser that has been passivated. Applying a dielectric 340 (e.g., SiO) to the etched layer2Or SiON) to protect the layers from corrosion, physical damage, electrically insulate the layers, and/or provide the desired shape to the QD laser. In various embodiments, dielectric 340 may be applied in one or more stages.
Fig. 4D shows a view 404 of one example of an etched and passivated QD laser that has been metallized. Metallization may be achieved by an evaporation or sputtering process to add the TSV320, electrical leads 330, and
Fig. 5A-5D illustrate various example
Fig. 5A shows a mode converter photonic element 510 as an example
Fig. 5D shows a multi-photon setup, including two photonic elements 540a-540b as an example
Fig. 6A-6C illustrate various mounting schemes for QD lasers with larger Photonic Integrated Circuits (PICs) 600 according to one or more embodiments disclosed herein.
In various embodiments, two separate PIC photonic elements 620 are fabricated on
The height of PIC photonic element 620 is defined such that
Fig. 6A shows a
Fig. 6B shows a
Fig. 6C shows a third mounting scheme 603 in which
Fig. 7A and 7B show wafer level views of QD lasers fabricated according to the present disclosure. Fig. 7A shows a
It will be understood that the element-mounted
Embodiments of the present disclosure are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments presented in the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some other implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In view of the foregoing, the scope of the present disclosure is to be determined by the claims that follow.
Examples of the present disclosure are listed in the following numbered clauses:
1. a method, comprising: bonding a sheet of III-V semiconductor material to a first side of a silicon wafer; removing excess group III-V semiconductor material bonded to the silicon wafer to leave a base layer of group III-V semiconductor material bonded to the silicon wafer of a predetermined thickness; epitaxially growing at least one layer on the base layer, the at least one layer comprising a layer of quantum dots arranged at a predetermined height relative to the first side of the silicon wafer; and cutting the silicon wafer to produce a plurality of quantum dot lasers.
2. The method of any of clauses 1 or 4-10, further comprising: adding a plurality of alignment features to a second side of the silicon wafer opposite the first side; and wherein dicing the silicon wafer produces the plurality of quantum dot lasers such that each quantum dot laser includes at least one alignment feature of a plurality of alignment features.
3. The method of any of clauses 1, 2 or 4-10, wherein the alignment feature comprises at least one of: a fiducial marker; a mechanical stop; and a metallized logo.
4. The method according to any of clauses 1-3 or 5-10, further comprising: adding a plurality of through-silicon vias to the wafer, wherein each through-silicon via extends between the first side and an opposing second side of the silicon wafer; and wherein dicing the silicon wafer produces the plurality of quantum dot lasers such that each quantum dot laser includes at least two of the plurality of through-silicon vias.
5. The method according to any of clauses 1-4 or 6-10, further comprising: attaching an electrical contact to an associated quantum dot laser of the plurality of quantum dot lasers through each of the at least two through-silicon vias; and wherein a voltage path for the associated quantum dot laser through the quantum dot layer is defined between the electrical contacts.
6. The method according to any of clauses 1-5 or 7-10, further comprising: prior to cutting, each quantum dot laser of the plurality of quantum dot lasers is etched into a predetermined shape.
7. The method according to any of clauses 1-7 or 8-10, further comprising: after etching and before dicing, each quantum dot laser of the plurality of quantum dot lasers is encapsulated with a dielectric.
8. The method of any of clauses 1-7, 9 or 10, further comprising: after etching and before dicing, a photonic device is fabricated on the silicon substrate for each quantum dot laser of the plurality of quantum dot lasers.
9. The method of any of clauses 1-8 or 10, wherein the waveguide of each photonic device is aligned with the waveguide of each quantum dot laser.
10. The method according to any of clauses 1-9, further comprising: each quantum dot laser of the plurality of quantum dot lasers is mounted on a silicon integrated circuit including an integrated photonic element.
11. A wafer, comprising: a silicon substrate; a base layer of a group III-V semiconductor material of a predetermined thickness bonded to the silicon substrate; and at least one layer grown on the base layer, the at least one layer for forming a plurality of quantum dot lasers.
12. The wafer according to any of clauses 11 or 13-15, further comprising a plurality of alignment features defined in the silicon substrate, wherein the plurality of alignment features correspond in number to the plurality of quantum dot lasers grown on the base layer.
13. The wafer according to any of clauses 11, 12, 14 or 15, further comprising a plurality of through-silicon vias defined through the silicon substrate, wherein the plurality of through-silicon vias correspond in number to the plurality of quantum dot lasers grown on the foundation layer.
14. The wafer according to any of clauses 11-13 or 15, wherein each through-silicon via of the plurality of through-silicon vias comprises an electrical contact connected at a first end to an underside of the silicon substrate and at a second end to an associated quantum dot laser of the plurality of quantum dot lasers.
15. The wafer according to any of clauses 11-14, further comprising a plurality of photonic devices fabricated on the silicon substrate, wherein the plurality of photonic devices correspond in number to the plurality of quantum dot lasers grown on the base layer and are aligned with the associated quantum dot lasers.
16. A laser, comprising: a silicon substrate having an upper side and a lower side opposite to the upper side; a layer of III-V semiconductor material bonded to the upper side of the silicon substrate; a quantum dot layer included in one or more layers grown from the III-V group semiconductor material layer and at a predetermined height with respect to an upper side of the silicon substrate; and wherein an underside of the silicon substrate includes a plurality of mounting features defined thereon as wafer level features.
17. The laser according to any of clauses 16-20, wherein each of the plurality of mounting features comprises a pair of through-silicon vias defining a through-hole from a lower side to an upper side of the silicon substrate, the through-silicon vias comprising a first through-silicon via and a second through-silicon via.
18. The laser according to any of clauses 16-20, wherein the first through silicon via comprises a first electrical lead connected to a first contact on the underside of the silicon substrate and a second contact between the upper side of the silicon substrate and the quantum dot layer, wherein the second through silicon via comprises a second electrical lead connected to a third contact on the underside of the silicon substrate and a fourth contact above the quantum dot layer with respect to the substrate, and wherein the second contact and the fourth contact form a voltage path through the quantum dot layer.
19. The laser of any of clauses 15-18 or 20, wherein each mounting feature of the plurality of mounting features comprises an alignment feature defined on an underside of the substrate.
20. The laser according to any of clauses 15-19, further comprising: a plurality of photonic elements fabricated on an upper side of the substrate and aligned with the quantum dot layer based on a predetermined height of the quantum dot layer.
21. An apparatus, comprising: a silicon substrate; a quantum dot laser, comprising: a base layer of a III-V semiconductor material bonded to the silicon substrate; and at least one layer epitaxially grown from the base layer, wherein the at least one layer comprises a quantum dot layer; and a photonic element fabricated on the silicon substrate and including a waveguide optically aligned with the quantum dot layer.
22. The apparatus of any of clauses 21 or 23-30, wherein the photonic element is one of: a mode converter; a wavelength combiner; a ring resonator; a wavelength splitter (wavetength divider); a separator; a combiner; and a feedback structure.
23. The apparatus of any of clauses 21, 22 or 24-30, wherein the III-V material is one of: GaAs; GaN; InSb; InAs; and InP.
24. The apparatus of any of clauses 21-23 or 25-30, further comprising: a growth substrate of a material lattice-matched to the group III-V material, wherein the growth substrate is epitaxially grown from the base layer and includes the quantum dot layer.
25. The apparatus of any of clauses 21-24 or 26-30, wherein when the group III-V material is GaAs, the lattice-matched material is one of: AlGaAS and InGaP; when the III-V material is InP, the lattice-matched material is one of: InGaAs, AlInAs, GaAsSb, AlGaInAs, and InGaAsP; when the III-V material is GaN, the lattice-matched material is one of: InGaN, and AlGaN.
26. The device according to any of clauses 21-25 or 27-30, wherein the growth substrate further comprises a waveguide epitaxially grown from the growth substrate to surround the quantum dot layer.
27. The apparatus of any of clauses 21-26 or 28-30, further comprising: a contact layer of the III-V material epitaxially grown from the growth substrate over the quantum dot layer relative to the base layer; a first contact in electrical communication with the growth substrate; a second contact in electrical communication with the contact layer; and wherein a voltage applied between the first contact and the second contact is operable to excite a quantum dot layer to produce a laser beam.
28. The apparatus of any of clauses 21-27, 29 or 30, wherein the first contact and the second contact extend through the silicon substrate.
29. The device of any of clauses 21-28 or 30, wherein the photonic waveguide is aligned with the quantum dot layer based on a height of the quantum dot layer relative to the silicon substrate growth.
30. The device according to any of clauses 21-29, wherein the base layer is bonded to the silicon substrate as a sheet of group III-V material that is reduced to a predetermined thickness prior to epitaxially growing a layer of quantum dots therefrom.
31. A method of forming a photonic device, the method comprising: bonding a sheet of III-V semiconductor material to a substrate; forming a base layer of III-V semiconductor material having a predetermined thickness by removing excess III-V semiconductor material bonded to the substrate; epitaxially growing a quantum dot layer over the base layer after removing excess III-V material, wherein the quantum dot layer is disposed at a predetermined height relative to the substrate; and fabricating a photonic element on the substrate, wherein a waveguide of the photonic element is optically aligned with the quantum dot layer according to the predetermined height.
32. The method of any of clauses 31 or 33-35, wherein the photonic element is bonded to or fabricated on the substrate prior to bonding the sheet to the substrate.
33. The method of any of clauses 31, 32, 34, or 35, wherein epitaxially growing the quantum dot layer further comprises: epitaxially growing a host layer from said base layer, said host layer comprising a material lattice-matched to said III-V material; epitaxially growing a contact layer from the host layer, the contact layer comprising the group III-V material; and epitaxially growing a laser waveguide in the matrix layer around the quantum dot layer between the contact layer and the base layer.
34. The method according to any of clauses 31-33 or 35, further comprising: applying a first electrical contact between the laser waveguide and the substrate; and applying a second electrical contact to the contact layer, wherein a voltage path is defined between the first and second electrical contacts through the quantum dot layer.
35. The method according to any of clauses 31-34, further comprising: a dielectric is applied to the laser prior to fabrication of the photonic element on the substrate.
36. A method of forming a photonic device, comprising: growing at least one layer from a base layer bonded to a silicon substrate, the at least one layer comprising a quantum dot layer; fabricating a first photonic element on the silicon substrate in optical alignment with the quantum dot layer to form a laser pedestal; and mounting the laser mount to a dielectric layer of an integrated circuit including a second photonic element using the silicon substrate as a reference surface.
37. The method of any of clauses 36 or 38-40, wherein the first contact of the laser base is mounted to the second contact of the integrated circuit via solder bonding.
38. The method of any of clauses 36, 37, 39 or 40, further comprising: fabricating a third photonic element on the silicon substrate in alignment with the quantum dot layer, the third photonic element opposing the first photonic element relative to the quantum dot layer to form a laser pedestal as a semiconductor optical amplifier; and wherein the integrated circuit includes a fourth photonic element that is opposite the second photonic element relative to the laser mount when mounted to the integrated circuit, wherein the third photonic element is aligned with the fourth photonic element when the laser mount is mounted.
39. The method of any of clauses 36-38 or 40, further comprising: forming an anti-reflective surface on the aligned optical facets of the first and second photonic elements; and forming a reflective surface on the aligned optical facets of the third and fourth photonic elements, thereby forming a reflective semiconductor optical amplifier.
40. The method of any of clauses 36-39, wherein mounting the silicon substrate onto the dielectric of the integrated circuit uses an epoxy between the silicon substrate and the dielectric.
41. A method of creating an optically active element, comprising: bonding a III-V semiconductor material to a silicon substrate; removing excess group III-V semiconductor material bonded to the substrate to leave a base layer of group III-V semiconductor material bonded to the substrate having a predetermined thickness; and epitaxially growing at least one layer on the base layer of III-V semiconductor material after removing the excess III-V semiconductor material, the at least one layer including a quantum dot layer.
42. The method of any of clauses 41 or 43-51, wherein the III-V semiconductor material is bonded directly to the silicon substrate.
43. The method of any of clauses 41, 42 or 44-51, wherein the III-V semiconductor material is bonded to the silicon substrate via an intermediate layer.
44. The method according to any of clauses 41-43 or 45-51, further comprising: bonding the excess III-V semiconductor material to a second silicon substrate.
45. The method of any of clauses 41-44 or 46-51, wherein epitaxially growing the at least one layer comprises: growing a lattice-matched III-V semiconductor material matrix layer on the III-V semiconductor material base layer; and growing a waveguide layer on the lattice-matched III-V semiconductor material host layer, wherein the quantum dot layer is included in the waveguide layer.
46. The method of any of clauses 41-45 or 47-51, wherein epitaxially growing the at least one layer further comprises: growing a second lattice-matched bulk layer of III-V semiconductor material over the waveguiding layer; and growing a contact layer on the second lattice matched III-V semiconductor material host layer.
47. The method of any of clauses 41-46 or 48-51, wherein, when the group III-V semiconductor material is GaAs, the lattice-matched group III-V semiconductor material host layer comprises one of: AlGaAS and InGaP; and when the III-V semiconductor material is InP, the lattice-matched III-V semiconductor material matrix layer comprises one of: InGaAs, AlInAs, GaAsSb, AlGaInAs, and InGaAsP; when the group III-V semiconductor material is GaN, the lattice-matched group III-V semiconductor material host layer comprises one of: InGaN, and AlGaN.
48. The method of any of clauses 41-47 or 49-51, further comprising: etching at least one of the following to produce a predetermined profile for the laser: the group III-V semiconductor material base layer, the group III-V semiconductor material waveguide layer, the lattice-matched group III-V semiconductor material host layer, the second lattice-matched group III-V semiconductor material host layer, the quantum dot layer, and the contact layer.
49. The method of any of clauses 41-48, 50 or 51, further comprising: after etching, applying a dielectric to the laser over the group III-V semiconductor material base layer, the group III-V semiconductor material waveguide layer, the lattice-matched group III-V semiconductor material host layer, the second lattice-matched group III-V semiconductor material host layer, the quantum dot layer, the contact layer, and the silicon substrate.
50. The method of any of clauses 41-49 or 51, further comprising: mounting a first contact to the base layer of III-V semiconductor material; and mounting a second contact to the contact layer, wherein a voltage path through the quantum dot layer is defined by the first contact and the second contact.
51. The method of any of clauses 41-50, wherein the group III-V semiconductor material comprises one of: GaAs; GaN; GaSb; InSb; InAs; and InP.
52. A laser, comprising: a silicon substrate having an upper surface; a base layer bonded to the upper surface of the silicon substrate, the base layer comprising a group III-V semiconductor material; and one or more layers grown on the base layer, the one or more layers comprising a quantum dot layer; a host layer grown from the base layer, comprising a group III-V semiconductor material lattice-matched to the group III-V semiconductor material; a quantum dot layer grown within the host layer; and a contact layer grown from a host layer comprising the group III-V semiconductor material, wherein the host layer separates the contact layer from the base layer.
53. The laser of any of clauses 52 or 54-56, wherein the host layer, the quantum dot layer, and the contact layer are epitaxially grown by one of: molecular beam epitaxy; chemical vapor deposition; metal organic chemical vapor deposition; liquid phase epitaxy; vapor phase epitaxy; and hydride vapor phase epitaxy.
54. The laser of any of clauses 52, 53, 55 or 56, further comprising: a waveguide grown from the host layer surrounding the quantum dot layer.
55. The laser according to any of clauses 52-54 or 56, wherein the quantum dot layer is arranged at a predetermined height relative to the upper surface of the silicon substrate.
56. The laser according to any of clauses 52-55, wherein the electrical contact and the contact layer form a voltage path through the quantum dot layer.
57. A laser, comprising: a quantum dot layer disposed higher than an upper surface of the silicon substrate by a predetermined height; a base layer of a III-V semiconductor material bonded to an upper surface of the silicon substrate; and a blanket layer of lattice matched III-V semiconductor material grown from the base layer, wherein the quantum dot layer is included in a waveguide of the blanket layer.
58. The laser according to any of clauses 57, 59, or 60, wherein the waveguide surrounds the quantum dot layer, and wherein the cladding layer is grown from the base layer of group III-V semiconductor material from lattice-matched group III-V semiconductor material to form a matrix of quantum dots in which the quantum dot layer is grown.
59. The laser of any of clauses 57, 58 or 60, further comprising: a first contact in electrical communication with the base layer; and a second contact in electrical communication with the contact layer, wherein a voltage path is defined between the first contact and the second contact through the quantum dot layer.
60. The laser according to any of clauses 57-59, wherein the cross-section of the laser defines a layered level comprising: a silicon layer level defined by the silicon substrate; a first level of III-V semiconductor material defined by the base layer above the silicon level; a first capping layer level defined by a first portion of the capping layer above the first level of III-V semiconductor material; a first waveguide level defined by a first portion of the waveguide above the first cladding level; a quantum dot level defined by the quantum dot layer above the first waveguide level; a second waveguide level defined by a second portion of the waveguide, above the quantum dot level; a second cladding level defined by a second portion of the cladding layer above the second waveguide level; and a second level of III-V semiconductor material defined by the contact layer above the second overlying level.
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