Surface-emitting semiconductor laser chip with symmetrical DBR structure and preparation method thereof
阅读说明：本技术 一种对称dbr结构的面发射半导体激光芯片及其制备方法 (Surface-emitting semiconductor laser chip with symmetrical DBR structure and preparation method thereof ) 是由 王智勇 王聪聪 兰天 李冲 于 2020-06-19 设计创作，主要内容包括：本发明公开了一种对称DBR结构的面发射半导体激光芯片及其制备方法,芯片是从衬底层底发射激光的面发射两维阵列光源芯片,其由下往上依次包括衬底层、分布式布拉格部分反射镜、有源层、氧化光学限制层、分布式布拉格全反射镜和欧姆接触层；有源层、氧化光学限制层、分布式布拉格全反射镜和欧姆接触层在水平面上间隔布设,有源层、氧化光学限制层、分布式布拉格全反射镜和欧姆接触层的侧面以及外露的分布式布拉格部分反射镜的顶部设有钝化层,欧姆接触层的顶部以及钝化层的顶部和外侧设有连续的第一电极；衬底层的出光侧相对应氧化光学限制层的氧化孔位置设有凹槽结构,衬底层除凹槽结构的其他位置设有第二电极,第二电极与第一电极的极性相反。(The invention discloses a surface-emitting semiconductor laser chip with a symmetrical DBR structure and a preparation method thereof, wherein the chip is a surface-emitting two-dimensional array light source chip which emits laser from the bottom of a substrate layer, and sequentially comprises the substrate layer, a distributed Bragg partial reflector, an active layer, an oxidized optical limiting layer, a distributed Bragg total reflector and an ohmic contact layer from bottom to top; the active layer, the oxidized optical limiting layer, the distributed Bragg holophote and the ohmic contact layer are arranged on the horizontal plane at intervals, the side faces of the active layer, the oxidized optical limiting layer, the distributed Bragg holophote and the ohmic contact layer and the top of the exposed distributed Bragg partial reflecting mirror are provided with passivation layers, and the top of the ohmic contact layer and the top and the outer side of the passivation layer are provided with continuous first electrodes; the light-emitting side of the substrate layer is provided with a groove structure corresponding to the oxidation hole of the oxidation optical limiting layer, the other positions of the substrate layer except the groove structure are provided with a second electrode, and the polarity of the second electrode is opposite to that of the first electrode.)
1. A surface-emitting semiconductor laser chip with a symmetrical DBR structure is characterized in that the chip is a surface-emitting two-dimensional array light source chip which emits laser from the bottom of a substrate layer, and sequentially comprises the substrate layer, a distributed Bragg partial reflector, an active layer, an oxidation optical limiting layer, a distributed Bragg holophote and an ohmic contact layer from bottom to top;
the active layer, the oxidized optical limiting layer, the distributed Bragg holophote and the ohmic contact layer are arranged on the horizontal plane at intervals, the side faces of the active layer, the oxidized optical limiting layer, the distributed Bragg holophote and the ohmic contact layer and the top of the exposed distributed Bragg partial reflecting mirror are provided with passivation layers, and the top of the ohmic contact layer and the top and the outer side of the passivation layer are provided with continuous first electrodes;
the light-emitting side of the substrate layer is provided with a groove structure corresponding to the oxidation hole of the oxidation optical limiting layer, the other positions of the substrate layer except the groove structure are provided with a second electrode, and the polarity of the second electrode is opposite to that of the first electrode.
2. The surface-emitting semiconductor laser chip as claimed in claim 1, wherein the substrate layer is coated with an antireflection film at the position of the groove structure and emits laser light at the position.
3. The surface-emitting semiconductor laser chip as claimed in claim 1, wherein said substrate layer is a semi-insulating doped GaAs semiconductor substrate layer having a thickness of 10-450 μm.
4. The surface-emitting semiconductor laser chip as claimed in claim 3, wherein the substrate layer has a thickness of 10 to 30 μm.
5. The surface-emitting semiconductor laser chip as claimed in claim 1, wherein the distributed bragg partially-reflecting mirror is AlxGa1-xAs/AlyGa1-yAs multilayer partial reflection distributed Bragg reflection layers with the reflectivity of 99.0-99.8% realize laser emission.
6. The surface-emitting semiconductor laser chip as claimed in claim 5, wherein said DBR mirror is AlxGa1-xAs/AlyGa1-yThe As multilayer total reflection distribution Bragg reflection layer realizes the total reflection of light beams.
7. The surface-emitting semiconductor laser chip as claimed in claim 6, wherein the number of pairs of the reflecting layers of said distributed bragg partially reflecting mirror is the same as the number of pairs of the reflecting layers of said distributed bragg fully reflecting mirror, and the number of pairs is 10 to 60 pairs.
8. The surface-emitting semiconductor laser chip as claimed in claim 1, wherein the chip is packaged in a flip-chip package, and the first electrode is attached to a microchannel water-cooled heat sink.
9. A method of fabricating a symmetric DBR-structured surface-emitting semiconductor laser chip as claimed in any one of claims 1 to 8, comprising:
cleaning and drying the VCSEL epitaxial wafer:
manufacturing a mesa mask:
manufacturing a table top;
manufacturing an oxidation hole;
manufacturing a first electrode;
manufacturing a mesa passivation layer;
processing a substrate;
passivating an emergent laser surface;
manufacturing a second electrode;
manufacturing an antireflection film;
manufacturing a pressure welding point;
and (5) cleavage and packaging.
Technical Field
The invention relates to the technical field of semiconductor laser chips, in particular to a surface-emitting semiconductor laser chip with a symmetrical DBR structure and a preparation method thereof.
Background
Compared with edge-emitting semiconductor lasers, vertical cavity surface emitting semiconductor lasers (VCSELs) are one of the most important semiconductor optoelectronic devices due to their advantages of small size, high coupling efficiency, low threshold current, high modulation rate, easy two-dimensional integration, single longitudinal mode operation, capability of on-chip testing, low manufacturing cost, and the like. In particular, the VCSEL array has wide application in the fields of laser printing, laser medical treatment, laser drilling, welding processing and the like. With the development of the fields of industry, military, medical treatment, space communication and the like, the VCSEL is required to meet the requirements of high output power and good high-temperature and low-temperature working stability. For example, VCSEL light sources that operate stably at high temperature are widely used in the field of chip-scale atomic clocks. High power red short wavelength (650nm) VCSELs are widely used in optical storage, landscape lighting, plastic fiber optic communications, air quality detection, beam alignment, display, scanning, laser printing, optical imaging, and medical applications.
At present, a VCSEL (vertical cavity surface emitting laser) generally adopts an asymmetric DBR (distributed Bragg Reflector) structure, and the VCSEL of the structure is influenced by temperature, so that the cavity length of a laser resonant cavity and the refractive index of a VCSEL epitaxial material are obviously changed, and the photoelectric properties such as wavelength, divergence angle and the like are unstable. And short wavelength VCSELs (wavelength less than 815nm) have commonly employed top emitting VCSEL packaging structures to avoid absorption of light by the GaAs substrate. The top-emitting VCSEL has the advantages that due to the existence of the substrate and the top packaging mode, the heat source of the top-emitting VCSEL is far away from the heat sink, the heat dissipation effect is poor, and the development and application of a high-power vertical cavity surface emitting laser array are limited.
Disclosure of Invention
In view of the above problems in the prior art, the present invention provides a surface emitting semiconductor laser chip with a symmetric DBR structure and a method for manufacturing the same.
The invention discloses a surface-emitting semiconductor laser chip with a symmetrical DBR structure, which is a surface-emitting two-dimensional array light source chip for emitting laser from the bottom of a substrate layer, and sequentially comprises a substrate layer, a distributed Bragg partial reflector, an active layer, an oxidation optical limiting layer, a distributed Bragg total reflector and an ohmic contact layer from bottom to top;
the active layer, the oxidized optical limiting layer, the distributed Bragg holophote and the ohmic contact layer are arranged on the horizontal plane at intervals, the side faces of the active layer, the oxidized optical limiting layer, the distributed Bragg holophote and the ohmic contact layer and the top of the exposed distributed Bragg partial reflecting mirror are provided with passivation layers, and the top of the ohmic contact layer and the top and the outer side of the passivation layer are provided with continuous first electrodes;
the light-emitting side of the substrate layer is provided with a groove structure corresponding to the oxidation hole of the oxidation optical limiting layer, the other positions of the substrate layer except the groove structure are provided with a second electrode, and the polarity of the second electrode is opposite to that of the first electrode.
As a further improvement of the invention, the position of the groove structure of the substrate layer is plated with an antireflection film, and laser is emitted at the position.
As a further improvement of the invention, the substrate layer is a semi-insulating doped GaAs semiconductor substrate layer with the thickness of 10-450 μm.
As a further improvement of the invention, the thickness of the substrate layer is 10-30 μm.
As a further improvement of the invention, the distributed Bragg partial reflector is AlxGa1-xAs/AlyGa1-yAs multilayer partial reflection distributed Bragg reflection layers with the reflectivity of 99.0-99.8% realize laser emission.
As a further improvement of the invention, the distributed Bragg total reflection mirror is AlxGa1-xAs/AlyGa1-yThe As multilayer total reflection distribution Bragg reflection layer realizes the total reflection of light beams.
As a further improvement of the present invention, the number of pairs of the reflective layers of the distributed bragg partially reflecting mirror is the same as the number of pairs of the reflective layers of the distributed bragg fully reflecting mirror, and the number of pairs is 10 to 60 pairs.
As a further improvement of the invention, the packaging form of the chip is flip-chip structure packaging, and the first electrode patch is attached to the micro-channel water-cooling heat sink.
The invention also discloses a preparation method of the symmetrical DBR structure surface emitting semiconductor laser chip, which comprises the following steps:
cleaning and drying the VCSEL epitaxial wafer:
manufacturing a mesa mask:
manufacturing a table top;
manufacturing an oxidation hole;
manufacturing a first electrode;
manufacturing a mesa passivation layer;
processing a substrate;
passivating an emergent laser surface;
manufacturing a second electrode;
manufacturing an antireflection film;
manufacturing a pressure welding point;
and (5) cleavage and packaging.
Compared with the prior art, the invention has the beneficial effects that:
according to the invention, the VCSEL with the symmetrical DBR structure is utilized, so that the problem that the cavity length of the VCSEL resonant cavity and the refractive index of an epitaxial material change along with the temperature change is solved, and the stable work of the VCSEL in a high-temperature and low-temperature environment is realized; meanwhile, the invention can realize the laser output emitted from the bottom of the substrate layer of the short-wavelength VCSEL, and has good heat dissipation performance and high output power.
Drawings
FIG. 1 is a schematic structural diagram of a surface-emitting semiconductor laser chip with a symmetric DBR structure according to the present disclosure;
fig. 2 is a schematic structural diagram of a surface-emitting semiconductor laser chip with a symmetric DBR structure according to embodiment 1 of the present invention;
fig. 3 is a schematic structural diagram of a surface-emitting semiconductor laser chip with a symmetric DBR structure according to embodiment 1 of the present invention;
FIG. 4 is Al of 980nm bottom-emitting VCSEL0.1Ga0.9As/Al0.9Ga0.1A full-reflectivity simulation diagram of an epitaxial structure with the number of DBR pairs of 32 of As multi-film total reflection DBR;
FIG. 5 is Al of 980nm bottom emitting VCSEL0.2Ga0.8As/Al0.8Ga0.2As multi-film total reflection DBR, 32 DBR logarithm epitaxyA partial reflectivity simulation plot of the structure;
FIG. 6 is Al of bottom emission VCSEL with 650nm wavelength0.5Ga0.95As/Al0.95Ga0.5A full-reflectivity simulation diagram of an As multi-film total-reflection DBR with 58-logarithm epitaxial structure;
FIG. 7 is Al of bottom emission VCSEL with 650nm wavelength0.6Ga0.95As/Al0.6Ga0.95A partial reflectivity simulation diagram of an epitaxial structure with the number of DBR pairs of 58 of As multi-film total reflection DBR;
fig. 8 is a flowchart of a method for manufacturing a surface-emitting semiconductor laser chip with a symmetric DBR structure according to the present invention.
In the figure:
1. a first electrode; 2. a passivation layer; 3. an ohmic contact layer; 4. a distributed Bragg total reflection mirror; 5. oxidizing the optical confinement layer; 6. an active layer; 7. a distributed Bragg portion mirror; 8. a substrate layer; 9. a second electrode; 10. an anti-reflection film;
1-1, P-type electrode (first electrode); 3-1, a P-type ohmic contact layer; 4-1, P type distributed Bragg total reflection mirror; 7-1, N-type distributed Bragg partial reflector; 8-1, an N-type substrate layer; 9-1, N-type electrode (second electrode);
1-2, N-type electrode (first electrode); 3-2, an N-type ohmic contact layer; 4-2, N type distributed Bragg total reflection mirror; 7-2, a P-type distributed Bragg partial reflector; 8-2, a P-type substrate layer; 9-2, a P-type electrode (second electrode);
wherein the first electrode and the second electrode have opposite polarities.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
The invention is described in further detail below with reference to the attached drawing figures:
as shown in fig. 1, the invention provides a surface-emitting semiconductor laser chip with a symmetric DBR structure, which is a two-dimensional array light source chip emitting laser from the bottom of a substrate layer, and the chip sequentially comprises a substrate layer 8, a distributed bragg partial reflector 7, an
the structure formed by the
In the invention, a groove is made at the position of the light-emitting side of the substrate layer 8 corresponding to the oxidation aperture of the oxidation optical limiting
Further, in the present invention,
the substrate layer 8 is a semi-insulating doped GaAs semiconductor substrate layer, and the thickness is 10-450 μm, preferably 10-30 μm.
The distributed Bragg partial reflector 7 of the invention is AlxGa1-xAs/AlyGa1-yThe As multilayer partially reflects the distributed Bragg reflecting layer, the reflectivity is between 99.0 percent and 99.8 percent, and laser emission is realized; the distributed Bragg total reflection mirror 4 is AlxGa1-xAs/AlyGa1-yAs muchThe Bragg reflection layer is distributed in the layer total reflection manner, so that the total reflection of the light beam is realized; further, the number of pairs of reflecting layers of the distributed bragg partially reflecting mirror 7 is the same as that of the distributed bragg fully reflecting mirror 4, and the number of pairs is 10 to 60 pairs.
The packaging form of the chip is flip-chip structure packaging, and the first electrode 1 is attached to the micro-channel water-cooling heat sink.