阅读说明：本技术 一种硅基单片集成激光器及其制备方法 (Silicon-based monolithic integrated laser and preparation method thereof ) 是由 仇超 朱俊波 龚谦 赵瑛璇 李伟 盛振 武爱民 甘甫烷 于 2020-05-08 设计创作，主要内容包括：本发明涉及半导体和光电集成技术领域,特别是涉及一种硅基单片集成激光器及其制备方法,包括：衬底层、埋氧化层、硅波导器件、上覆层和三维波导器件；所述埋氧化层上设有图形化的限向结构；所述限向结构内设有激光器结构；所述硅波导器件设置在所述埋氧化层上；所述埋氧化层、所述激光器结构和所述硅波导器件远离所述衬底层的表面形成第一表面,所述上覆层设置在所述第一表面上；所述三维波导器件设置在所述上覆层上。通过在激光器结构有源区上方引入三维波导结构,实现激光器结构有源区和硅波导之间高质量的光学连接。(The invention relates to the technical field of semiconductor and photoelectric integration, in particular to a silicon-based monolithic integrated laser and a preparation method thereof, wherein the silicon-based monolithic integrated laser comprises the following steps: the device comprises a substrate layer, a buried oxide layer, a silicon waveguide device, an upper cladding layer and a three-dimensional waveguide device; a graphical direction limiting structure is arranged on the buried oxide layer; a laser structure is arranged in the direction limiting structure; the silicon waveguide device is arranged on the buried oxide layer; the buried oxide layer, the laser structure and the surface of the silicon waveguide device remote from the substrate layer form a first surface on which the overlying layer is disposed; the three-dimensional waveguide device is disposed on the upper cladding layer. By introducing the three-dimensional waveguide structure above the active region of the laser structure, high-quality optical connection between the active region of the laser structure and the silicon waveguide is realized.)

1. A silicon-based monolithically integrated laser comprising: a substrate layer (101), a buried oxide layer (102), a silicon waveguide device (103), an upper cladding layer (104) and a three-dimensional waveguide device (105);

the buried oxide layer (102) is disposed on the substrate layer (101);

a patterned direction limiting structure (108) is arranged on the buried oxide layer (102);

a laser structure is arranged in the direction limiting structure (108), and the thickness of the laser structure is larger than the depth of the direction limiting structure (108);

the silicon waveguide device (103) is arranged on the buried oxide layer (102);

the buried oxide layer (102), the laser structure and the silicon waveguide device (103) form a first surface away from a surface of the substrate layer (101), the upper cladding layer (104) being disposed on the first surface;

the three-dimensional waveguide device (105) is arranged on the upper cladding layer (104), the three-dimensional waveguide device (105) comprises a first end and a second end, the projection of the first end on the horizontal plane at least partially coincides with the projection of the laser structure on the horizontal plane, and the projection of the second end on the horizontal plane at least partially coincides with the projection of the silicon waveguide device (103) on the horizontal plane.

2. The monolithically integrated silicon-based laser according to claim 1, wherein the three-dimensional waveguide device has a thickness of 100nm to 2000 nm.

3. The monolithic silicon-based integrated laser according to claim 2, wherein the three-dimensional waveguide device (105) is made of polysilicon, amorphous silicon or silicon nitride.

4. The monolithic silicon-based integrated laser according to claim 1, wherein the connection surface of the three-dimensional waveguide device (105) with the upper cladding layer (104) is a first connection surface;

the connection surface of the laser structure and the upper cladding layer (104) is a second connection surface;

the connection surface of the silicon waveguide device (103) and the upper cladding layer (104) is a third connection surface;

the distance from the first connecting surface to the second connecting surface is 1nm-1000 nm; and/or the presence of a gas in the gas,

the distance from the first connection face to the third connection face is 1nm-1000 nm.

5. A method for preparing a silicon-based monolithic integrated laser is characterized by comprising the following steps:

etching a silicon-on-insulator wafer, wherein the silicon-on-insulator wafer comprises a substrate layer (101), a buried oxide layer (102) and a top layer silicon (106), and the buried oxide layer (102) and the top layer silicon (106) are etched to form a direction limiting structure (108);

depositing a laser structure within the confinement structure (108);

etching the top layer silicon (106) to form a silicon waveguide device (103);

depositing an upper cladding layer (104) on the surface of the buried oxide layer (102), the laser structure and the silicon waveguide device (103);

depositing a three-dimensional waveguide device (105) on the upper cladding layer (104);

wherein the three-dimensional waveguide device (105) comprises a first end and a second end, a projection of the first end in a horizontal plane at least partially coincides with a projection of the laser structure in a horizontal plane, and a projection of the second end in a horizontal plane at least partially coincides with a projection of the silicon waveguide device (103) in a horizontal plane.

6. The method of claim 5, wherein prior to etching the silicon-on-insulator wafer, further comprising:

a silicon-on-insulator wafer is provided, and a patterned mask (107) is deposited on a surface of the silicon-on-insulator wafer.

7. The method of manufacturing according to claim 6, further comprising, prior to depositing a laser structure within the confinement structure (108):

depositing a Ge epitaxial layer (111) within the confinement structure (108), the Ge epitaxial layer (111) being disposed on the substrate layer (101).

8. The method of manufacturing according to claim 7, wherein depositing a laser structure within the confinement structure (108) comprises:

forming a GaAs underlayer (112) on the Ge epitaxial layer (111);

forming an InGaAs stress buffer layer (113) on the GaAs bottom layer (112);

forming an InGaAs stress release layer (114) on the InGaAs buffer layer, wherein a light emitting layer is formed in an interface region of the InGaAs stress buffer layer (113) and the InGaAs stress release layer (114);

forming a GaAs cap layer (115) on the InGaAs stress relief layer (114).

9. The method of claim 5, wherein the upper cladding layer (104) is made of SiO₂、Si₃N₄Or SiON.

10. The method of manufacturing according to claim 8, wherein prior to depositing the three-dimensional waveguide device (105) on the upper cladding layer (104), further comprising:

polishing the upper cladding layer (104), and controlling the thickness of the upper cladding layer (104) on the laser structure to be 1nm-1000 nm.

Technical Field

The invention relates to the technical field of semiconductor and photoelectric integration, in particular to a silicon-based monolithic integrated laser and a preparation method thereof.

Background

With the increasing requirements of people on information transmission and processing speed and the coming of the multi-core computing era, electrical interconnection based on metal becomes a development bottleneck due to defects of overheating, delay, electronic interference and the like. And the problem can be effectively solved by adopting optical interconnection to replace electrical interconnection. Silicon-based optical interconnects are preferred for their incomparable cost and technical advantages in the implementation of optical interconnects. The silicon-based optical interconnection can not only play the advantages of high optical interconnection speed, large bandwidth, interference resistance, low power consumption and the like, but also fully utilize the advantages of mature microelectronic process, high-density integration, high yield, low cost and the like, and the development of a new generation of high-performance computer and data communication system is certainly promoted, so that the silicon-based optical interconnection has wide market application prospect.

The core technology of silicon-based optical interconnection is to realize various optical functional devices on silicon, such as a silicon-based laser, an electro-optical modulator, a photoelectric detector, a filter, a wavelength division multiplexer, a coupler, an optical splitter and the like. In the last decade, devices such as silicon-based electro-optical modulators, photodetectors, filters, wavelength division multiplexers, couplers, optical splitters and the like have been developed rapidly, and the silicon-based optoelectronic integration is a practical technical problem in light sources.

The existing scheme for realizing the light source on the silicon substrate comprises the following steps: the method comprises the steps that a bottom Silicon substrate made of Silicon-On-Insulator (SOI) materials is utilized, the thickness of Ge and the thickness of the III-V group materials are designed to be just equal to the thickness of a buried oxide layer, so that the III-V group materials are aligned with top Silicon in the thickness direction, and the III-V group laser and a Silicon photonic device are automatically aligned in the vertical direction; however, since Ge and III-V materials are grown on the silicon layer of the substrate, the silicon surface of the substrate needs to be exposed by etching a deep groove. Due to the shadow effect (shading effect), the material defects around the epitaxial growth region are many, and the epitaxial growth region is difficult to be used as an active gain region, so that the optical connection between the active region and the silicon waveguide structure becomes difficult.

Disclosure of Invention

The invention aims to solve the technical problem that the existing silicon-based monolithic integrated laser has more material defects around an epitaxial growth region, so that good optical connection between an active region and a silicon waveguide structure is difficult to form.

In order to solve the above technical problem, in a first aspect, an embodiment of the present application discloses a silicon-based monolithic integrated laser, including: the device comprises a substrate layer, a buried oxide layer, a silicon waveguide device, an upper cladding layer and a three-dimensional waveguide device;

the buried oxide layer is disposed on the substrate layer;

a graphical direction limiting structure is arranged on the buried oxide layer;

a laser structure is arranged in the direction limiting structure, and the thickness of the laser structure is greater than the depth of the direction limiting structure;

the silicon waveguide device is arranged on the buried oxide layer;

the buried oxide layer, the laser structure and the surface of the silicon waveguide device remote from the substrate layer form a first surface on which the overlying layer is disposed;

the three-dimensional waveguide device is arranged on the upper covering layer and comprises a first end and a second end, the projection of the first end on the horizontal plane is at least partially coincided with the projection of the laser structure on the horizontal plane, and the projection of the second end on the horizontal plane is at least partially coincided with the projection of the silicon waveguide device on the horizontal plane.

Further, the thickness of the three-dimensional waveguide device is 100nm-2000 nm.

Furthermore, the three-dimensional waveguide device is made of polysilicon, amorphous silicon or silicon nitride.

Further, the connection surface of the three-dimensional waveguide device and the upper cladding layer is a first connection surface;

the connection surface of the laser structure and the upper cladding layer is a second connection surface;

the connection surface of the silicon waveguide device and the upper cladding layer is a third connection surface;

the distance from the first connecting surface to the second connecting surface is 1nm-1000 nm; and/or the presence of a gas in the gas,

the distance from the first connection face to the third connection face is 1nm-1000 nm.

In a second aspect, an embodiment of the present application discloses a method for manufacturing a silicon-based monolithic integrated laser, including:

etching a silicon-on-insulator wafer, wherein the silicon-on-insulator wafer comprises a substrate layer, a buried oxide layer and top silicon, and the buried oxide layer and the top silicon are etched to form a direction-limiting structure;

depositing a laser structure within the confinement structure;

etching the top layer silicon to form a silicon waveguide device;

depositing an upper cladding layer on the surface of the buried oxide layer, the laser structure and the silicon waveguide device;

depositing a three-dimensional waveguide device on the upper cladding layer;

wherein the three-dimensional waveguide device comprises a first end and a second end, a projection of the first end on a horizontal plane at least partially coincides with a projection of the laser structure on a horizontal plane, and a projection of the second end on a horizontal plane at least partially coincides with a projection of the silicon waveguide device on a horizontal plane.

Further, before etching the silicon-on-insulator wafer, the method further includes:

providing a silicon-on-insulator wafer, and depositing a patterned mask on the surface of the silicon-on-insulator wafer.

Further, before depositing the laser structure in the confinement structure, the method further includes:

and depositing a Ge epitaxial layer in the direction limiting structure, wherein the Ge epitaxial layer is arranged on the substrate layer.

Further, the depositing a laser structure within the confinement structure includes:

forming a GaAs bottom layer on the Ge epitaxial layer;

forming an InGaAs stress buffer layer on the GaAs bottom layer;

forming an InGaAs stress release layer on the InGaAs buffer layer, wherein a light emitting layer is formed in an interface area of the InGaAs stress buffer layer and the InGaAs stress release layer;

and forming a GaAs cap layer on the InGaAs stress release layer.

Furthermore, the material of the upper cladding layer is SiO₂、Si₃N₄Or SiON.

Further, before depositing the three-dimensional waveguide device on the upper cladding layer, the method further comprises:

polishing the upper cladding layer, and controlling the thickness of the upper cladding layer on the laser structure to be 1nm-1000 nm.

By adopting the technical scheme, the silicon-based monolithic integrated laser and the preparation method thereof have the following beneficial effects:

according to the silicon-based monolithic integrated laser, the three-dimensional waveguide structure is introduced above the active region of the laser structure, so that high-quality optical connection between the active region of the laser structure and a silicon waveguide is realized; meanwhile, the three-dimensional waveguide layer-jumping structure is introduced, so that the requirement on the thickness of an active region of a laser structure is reduced.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic structural diagram of a silicon-based monolithically integrated laser according to an embodiment of the present application;

FIG. 2 is a top view of a silicon-based monolithically integrated laser of an embodiment of the present application;

fig. 3 is a flowchart of a method for manufacturing a silicon-based monolithic integrated laser according to an embodiment of the present disclosure;

FIG. 4 is a flowchart of a method of depositing a laser structure according to an embodiment of the present disclosure;

FIG. 5 is a flow chart of a process for fabricating a monolithic silicon-based integrated laser according to one embodiment of the present application;

the following is a supplementary description of the drawings:

101-a substrate layer; 102-buried oxide layer; 103-silicon waveguide devices; 104-an upper cladding layer; 105-a three-dimensional waveguide device; 106-top silicon; 107-patterning the mask; 108-a direction-limiting structure; -a laser structure; a 111-Ge epitaxial layer; 112-GaAs bottom layer; 113-InGaAs stress buffer layers; 114-InGaAs stress relief layer; a 115-GaAs cap layer; 116-quantum dot light emitting layer.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the present application. In the description of the present application, it is to be understood that the terms "upper", "lower", "top", "bottom", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein.

With the development of silicon photonics, the implementation of silicon-based lasers has become critical. However, silicon is an indirect bandgap semiconductor, and non-vertical transition is accompanied by generation and recombination of phonons, so that the probability is low, and a high-efficiency laser is difficult to realize. The traditional III-V belongs to a direct band gap semiconductor, makes vertical transition without phonon participation, is easy to realize a high-efficiency laser, and is the mainstream technology of the current laser. Because the silicon material and the III-V group material have larger lattice constant mismatch, the III-V group material directly epitaxially grown has more defects and poor quality. However, because the lattice constant of germanium is between that of silicon and III-V materials, Ge materials are first epitaxially grown on silicon materials, and III-V materials are then epitaxially grown on the basis of the Ge materials. Group III-V lasers are implemented on silicon using germanium materials as an intermediary.

As shown in fig. 1, an embodiment of the present application discloses a silicon-based monolithically integrated laser, including: a substrate layer 101, a buried oxide layer 102, a silicon waveguide device 103, an upper cladding layer 104 and a three-dimensional waveguide device 105; a buried oxide layer 102 is disposed on the substrate layer 101; a patterned confinement structure 108 is arranged on the buried oxide layer 102; a laser structure is arranged in the direction limiting structure 108, and the thickness of the laser structure is larger than the depth of the direction limiting structure 108; a silicon waveguide device 103 is disposed on the buried oxide layer 102; the buried oxide layer 102, the laser structure and the surface of the silicon waveguide device 103 remote from the substrate layer 101 form a first surface on which an overlying layer 104 is disposed; a three-dimensional waveguide device 105 is arranged on the upper cladding layer 104, the three-dimensional waveguide device 105 comprising a first end and a second end, a projection of the first end on a horizontal plane at least partly coinciding with a projection of the laser structure on a horizontal plane, and a projection of the second end on a horizontal plane at least partly coinciding with a projection of the silicon waveguide device 103 on a horizontal plane.

According to the silicon-based monolithic integrated laser, the three-dimensional waveguide structure is introduced above the active region of the laser structure, so that high-quality optical connection between the active region of the laser structure and a silicon waveguide is realized; meanwhile, the three-dimensional waveguide layer-jumping structure is introduced, so that the requirement on the thickness of an active region of a laser structure is reduced.

In the embodiment of the present application, as shown in fig. 1, a confinement structure 108 is disposed on an SOI wafer, and a laser structure is disposed in the confinement structure 108. Optionally, the laser structure is a III-V material laser. As shown in fig. 1, the laser structure is a III-V material layer formed on the surface of a silicon substrate layer 101 confined within a confinement structure 108. A Ge epitaxial layer 111 is also provided between the laser structure and the substrate layer 101, and a III-V laser is implemented on silicon using a germanium material as an intermediary. Optionally, the thickness of the Ge epilayer 111 is in the range of 0.1 μm to 2 μm. The III-V group material is formed on the surface of the Ge epitaxial layer 111, and optionally, the thickness range of the GaAs bottom layer 112 is 0.1-2 μm, the thickness range of the InGaAs stress buffer layer 113 is 2-10 nm, the thickness range of the InGaAs stress release layer 114 is 20-200 nm, and the thickness range of the GaAs cap layer 115 is 50-500 nm. The InGaAs stress buffer layer 113 is In_0.12-0.2Ga_0.8-0.88An As stress buffer layer, the InGaAs stress release layer 114 is In_{0.12- 0.2}Ga_0.8-0.88An As stress relief layer. The interface region of the InGaAs stress buffer layer 113 and the InGaAs stress release layer 114 is provided with a quantum dot light emitting layer 116, and optionally, the thickness of the quantum dot light emitting layer 116 is 0.1nm to 10 nm. The top silicon 106 is processed by photolithography, etching, deposition, etc. to form the silicon waveguide device 103.

After the laser structure is manufactured, the top layer silicon 106 is processed through the processing steps of photoetching, etching, deposition and the like to form the silicon waveguide device 103, so that the laser and other active or passive silicon optical devices are realized. Then, by means of chemical vapor deposition, etc., the silicon waveguideDepositing an upper cladding layer 104 on the surface of the device 103, the laser structure and the buried oxide layer 102 in the SOI wafer to protect the laser structure, optionally depositing the upper cladding layer 104 with SiO₂、Si₃N₄Or SiON and the like. A three-dimensional waveguide device 105 is fabricated on the upper cladding layer 104 by means of chemical vapor deposition or the like. Alternatively, the three-dimensional waveguide device 105 structure may be designed as a tapered or inverted tapered structure. As shown in fig. 1, the arrows in the figure show that light emitted from the laser structure is coupled into the three-dimensional waveguide device 105 and then coupled into the silicon waveguide device 103, so as to achieve high-quality optical connection between the laser structure and the silicon waveguide device 103, without adding additional elements such as a coupler, thereby greatly saving process steps and manufacturing cost, and improving the integration level of the device. Meanwhile, it should be understood that the structural design of the three-dimensional waveguide device 105 is not limited to a taper or an inverted taper, and may be other structural types capable of realizing optical connection. As shown in fig. 2, the three-dimensional waveguide device 105 corresponds to a laser device layer at one end and a silicon waveguide device 103 at the other end. By introducing the three-dimensional waveguide structure above the active region of the laser device layer, high-quality optical connection between the active region of the laser device layer and the silicon waveguide is realized, and the problem of loss caused by material quality around the active region of the III-V material laser due to shadow effect is solved. The material selection for the three-dimensional waveguide device 105 may be determined based on factors such as the refractive index, thickness, etc. of the active waveguide of the laser device layer.

The three-dimensional waveguide device 105 is made of polysilicon, amorphous silicon, or silicon nitride.

In the embodiment of the present application, polycrystalline silicon (poly-Si), amorphous silicon (amorphous-Si), silicon nitride (Si) is grown on the upper cladding layer 104 by means of chemical vapor deposition or the like₃N₄) Etc. as the three-dimensional waveguide device 105.

The thickness of the three-dimensional waveguide device is 100nm-2000 nm.

In the embodiment of the present application, the thickness of the three-dimensional waveguide device 105 is 100nm to 2000 nm. The three-dimensional waveguide device 105 achieves high-quality optical coupling between the laser structure and the silicon waveguide device 103 through taper/reverse taper design and the like.

The connection surface of the three-dimensional waveguide device 105 and the upper cladding layer 104 is a first connection surface; the connection surface of the laser structure and the upper cladding layer 104 is a second connection surface; the connection surface of the silicon waveguide device 103 and the upper cladding layer 104 is a third connection surface; the distance from the first connecting surface to the second connecting surface is 1nm-1000 nm; the distance from the first connection face to the third connection face is 1nm-1000 nm.

In the embodiment of the present application, as shown in fig. 1, an upper cladding layer 104 material is grown by chemical vapor deposition or the like; polishing the surface of the upper cladding layer 104 by chemical mechanical polishing, and controlling the thickness H1 of the upper cladding layer 104 above the active region of the laser structure and the thickness H2 of the upper cladding layer 104 above the silicon waveguide device 103, wherein the thickness of H1 is 1nm-1000nm, and the thickness of H1 is 1nm-1000nm in order to ensure efficient optical coupling; preferably, the thickness of H1 and H2 is less than 200 nm.

The embodiment of the present application further provides a method for manufacturing a silicon-based monolithic integrated laser, as shown in fig. 3, the method includes:

s301: the silicon-on-insulator wafer is etched, and the buried oxide layer 102 and the top layer silicon 106 are etched to form the confinement structure 108.

In the embodiment of the present application, a silicon-on-insulator wafer is selected, and the silicon-on-insulator wafer includes a substrate layer 101, a buried oxide layer 102, and a top layer silicon 106, which are sequentially disposed. Optionally, the thickness of the buried oxide layer 102 ranges from 1 μm to 3 μm, and the thickness of the top silicon 106 ranges from 50nm to 1000 nm. As shown in fig. 5, a patterned mask 107 is deposited on the surface of the silicon-on-insulator wafer. Optionally, the patterned mask is a patterned silicon dioxide layer. The top silicon 106 and buried oxide layer 102 of the SOI wafer are etched to form a confining structure 108.

S303: the laser structure is deposited within confinement structure 108.

In the embodiment of the application, the laser is a III-V material laser, before depositing the laser structure in the confinement structure 108, the Ge epitaxial layer 111 is first deposited in the confinement structure 108, the Ge epitaxial layer 111 is disposed on the substrate layer 101, and then the laser structure is deposited on the Ge epitaxial layer 111.

Fig. 4 is a flowchart of a method for depositing a laser structure according to an embodiment of the present disclosure. As shown in fig. 4, depositing a laser structure within confinement structure 108 includes:

s401: a GaAs underlayer 112 is formed on the Ge epilayer 111.

S403: an InGaAs stress buffer layer 113 is formed on the GaAs bottom layer 112.

S405: an InGaAs stress relief layer 114 is formed on the InGaAs buffer layer.

In the embodiment of the present application, a quantum dot light emitting layer 116 is formed in the interface region of the InGaAs stress buffer layer 113 and the InGaAs stress relief layer 114.

S407: a GaAs cap layer 115 is formed on the InGaAs stress relieving layer 114.

S305: the top layer silicon 106 is etched to form the silicon waveguide device 103.

In the embodiment of the present application, the silicon waveguide device 103 is formed by etching the top silicon 106 by using the processes such as photolithography, etching, thin film deposition, and the like, and a silicon optical device is prepared in the top silicon 106.

S307: an upper cladding layer 104 is deposited on the surface of the buried oxide layer 102, the laser structure and the silicon waveguide device 103.

In the embodiment of the present application, as shown in fig. 5, after the silicon waveguide device 103 is manufactured, an upper cladding layer 104 is deposited on the surface of the silicon waveguide device 103, the surface of the laser structure, and the surface of the buried oxide layer 102, and optionally, the material of the upper cladding layer 104 is SiO₂、Si₃N₄Or SiON, etc., and optionally, the deposition method employs chemical vapor deposition, etc. To ensure efficient optical coupling, the thickness of upper cladding layer 104 over the active region of the deposited laser structure in the embodiments of the present application is less than 100 nm.

S309: a three-dimensional waveguide device 105 is deposited on the upper cladding layer 104.

In the embodiment of the application, the upper cladding 104 is polished by adopting methods such as chemical polishing, mechanical polishing and the like, the thickness H1 of the upper cladding 104 above the active region of the laser structure and the thickness H2 of the upper cladding 104 above the silicon waveguide device 103 are controlled, and in order to ensure efficient optical coupling, the thickness of H1 is usually 1nm-1000nm, and the thickness of H1 is usually 1nm-1000 nm; preferably, the thickness of H1 and H2 is less than 200 nm. After polishing the upper cladding layer 104, a three-dimensional waveguide device 105 is fabricated on the upper cladding layer 104. In the embodiment of the application, because the III-V group material generally has high refractive index, the material and the structure of the introduced three-dimensional waveguide need to be optimally designed. Optionally, the material for manufacturing the three-dimensional waveguide device 105 includes polysilicon, amorphous silicon, silicon nitride, and the like. Alternatively, the three-dimensional waveguide device 105 may be constructed in various tapered or reverse tapered configurations to achieve optical coupling. The projection of one end of the three-dimensional waveguide device 105 on the horizontal plane at least partially coincides with the projection of the laser structure on the horizontal plane, and the projection of the other end on the horizontal plane at least partially coincides with the projection of the silicon waveguide device 103 on the horizontal plane. As shown in fig. 2, the region where the three-dimensional waveguide device 105 is located connects the silicon waveguide device 103 and the laser structure.

In the embodiment of the present application, as shown in fig. 5, the laser structure is used as an active gain layer, and a high-quality optical connection is performed through the three-dimensional waveguide device 105, so that a laser feedback resonant cavity structure, such as a FP reflective resonant cavity, a DBR reflective resonant cavity, a DFB reflective resonant cavity, and other resonant cavity structures, is implemented in the silicon waveguide device 103, thereby forming a complete laser device.

According to the method, the three-dimensional waveguide structure is introduced above the active region of the laser structure, and the light emitting layer of the laser structure and the silicon waveguide device 103 do not need to be aligned in the height direction, so that high-quality optical connection between the active region of the laser structure and the silicon waveguide device 103 can be realized. Meanwhile, the problem of loss caused by the quality of materials around the active region of the laser structure due to the shadow effect is avoided. In addition, due to the introduction of the three-dimensional waveguide layer jumping structure, the alignment of the quantum dot light-emitting layer 116 on the III-V group material laser and the silicon waveguide device 103 can be completed without strictly controlling the thickness of the Ge buffer layer and the active region of the III-V group material laser, the requirement on the thickness precision of the Ge buffer layer and the active region of the III-V group material laser is reduced, and the process difficulty is reduced.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.