阅读说明：本技术 激光端面的量子阱钝化结构 (Quantum well passivation structure of laser end face ) 是由 亚伯兰雅库维奇 于 2019-07-05 设计创作，主要内容包括：本发明公开了一种包含由半导体材料(如硅、锗或锑)的交替薄层和介质势垒层组成的量子阱钝化结构的边缘发射激光二极管。半导体层足够薄以形成量子阱,介电层在相邻量子阱之间起着势垒的作用。与表面相邻的半导体层由晶体材料形成,其余的量子阱由非晶材料形成。该结构和形成该结构的方法使的该结构比使用基体(bulk)(厚的)硅钝化层的器件显示出更高的COD水平。(An edge-emitting laser diode comprising a quantum well passivation structure consisting of alternating thin layers of a semiconductor material (such as silicon, germanium or antimony) and a dielectric barrier layer is disclosed. The semiconductor layer is sufficiently thin to form quantum wells, and the dielectric layer acts as a barrier between adjacent quantum wells. The semiconductor layer adjacent the surface is formed of a crystalline material and the remaining quantum wells are formed of an amorphous material. The structure and method of forming the structure causes the structure to exhibit a higher COD level than a device using a bulk (thick) silicon passivation layer.)

1. A method of forming a passivation structure on an end facet of an edge-emitting laser diode, comprising:

a) depositing a thin layer of amorphous semiconductor material in the reaction chamber to cover the surface of the exposed laser facet, cleaving the surface of the exposed laser facet or processing the cleaved surface, and forming a quantum well structure by controlling the thickness of the deposited semiconductor material;

b) forming a thin layer of dielectric material on the quantum well structure, creating a barrier for the quantum well structure by controlling the thickness of the dielectric material formed.

2. The method of claim 1, wherein the method further comprises the steps of:

c) repeating steps a) and b) to form a multiple quantum well passivation structure of alternating semiconductor quantum wells and barriers.

3. The method of claim 1, wherein the method further comprises the step of processing the thin semiconductor layer deposited in step a).

4. The method of claim 1, wherein step a) is performed using a semiconductor material selected from the group consisting of silicon, germanium, and antimony.

5. The method of claim 4, wherein said semiconductor material is selected in pure form.

6. The method of claim 4, wherein a hydrogenated form of said semiconductor material is selected.

7. The method of claim 1, wherein the semiconductor layer deposited in step a) has a thickness of about 3nm or less.

8. The method of claim 2, wherein each deposited semiconductor layer has a thickness of about 3nm or less.

9. The method of claim 1, wherein step b) comprises the step of oxidizing a surface portion of the semiconductor material deposited in step a).

10. The method of claim 1 wherein in performing step b), the dielectric material is selected from the group consisting of oxides of silicon, germanium, antimony; nitrides of silicon, germanium, antimony; alumina, titania, aluminum nitride, tantalum oxide, or combinations thereof.

11. The method of claim 1, wherein the method is performed on a laser bar comprising a plurality of individual laser diodes.

12. An edge-emitting laser diode comprising:

a semiconductor substrate having a waveguide structure formed thereon for generating light at an operating wavelength;

a pair of cleaved surfaces formed on opposite sides of the waveguide structure;

a passivation structure comprising a quantum well structure of at least one semiconductor quantum well and a dielectric barrier layer formed on the semiconductor quantum well; and

a reflective film layer formed directly on the passivation structure.

13. The edge-emitting laser diode of claim 12, wherein the at least one semiconductor quantum well comprises a single semiconductor quantum well.

14. The edge-emitting laser diode of claim 13, wherein the single semiconductor quantum well comprises a layer of crystalline material.

15. The edge-emitting laser diode of claim 12, wherein the at least one semiconductor quantum well comprises a plurality of semiconductor quantum wells separated by barrier layers to form a plurality of quantum well structures.

16. The edge-emitting laser diode of claim 15 wherein a first semiconductor quantum well disposed adjacent the end facet comprises crystalline material and the remaining quantum wells comprise amorphous material.

17. The edge-emitting laser diode of claim 12, wherein each semiconductor quantum well comprises a layer of material having a thickness of no more than about 3 nm.

18. The edge-emitting laser diode of claim 12, wherein the semiconductor material is selected from a material in the group consisting of silicon, germanium, antimony, or combinations thereof.

19. The edge-emitting laser diode of claim 18, wherein the semiconductor material is selected in pure form.

20. The edge-emitting laser diode of claim 18, wherein a hydrogenated form of the semiconductor material is selected.

21. The edge-emitting laser diode of claim 12, wherein the dielectric barrier layer comprises an oxide selected from the group consisting of silicon, germanium, antimony; nitrides of silicon, germanium, antimony; alumina, titania, aluminum nitride, tantalum oxide, or combinations thereof.

Technical Field

The present invention relates to semiconductor laser diodes and, more particularly, to quantum well passivation arrangements for protecting the mirrors of laser diodes.

Background

High power semiconductor laser diodes have become an important component of optical communication technology, particularly because such laser diodes can be used for fiber pumping (optical signal amplification) and other high power applications. In most cases, it is generally desirable that laser diodes have a long lifetime (e.g., in excess of tens of thousands of hours), reliable and stable output, high output power, high photoelectric efficiency, and high beam quality.

Since modern crystal growth reactors are capable of producing high quality semiconductor materials, the long term reliability of high power laser diode lasers is largely dependent on the stability of the laser facets cleaving the mirrors forming the laser cavity.

Degradation of the laser facet is a complex physical and chemical reaction process that can be driven by light, current, and heat resulting in short term power degradation during aging, long term power degradation during normal operation, and in severe cases Catastrophic Optical Damage (COD) of the mirror itself, leading to complete device failure. Complex oxides and point defects can form and be trapped at the interface between the reflective film layer and the semiconductor material. When a current is applied to the device, charge carriers diffuse towards the end faces, since the surface acts as a carrier well (due to the presence of point defects and internal states of the band gap created by surface oxidation). The light emitted by the diode can photoexcited charge carriers (electrons and holes) at the surface, which can electrochemically drive the oxidation reaction at the surface. In addition, the electrons and holes generated by the absorbed light can recombine in a non-radiative manner, which can lead to the generation of excessive heat and contribute to the formation of lattice defects (point defects and dislocations). Heating of the semiconductor material may induce thermal oxidation at the surface, which will further increase the thickness of the absorbing oxide layer formed at the semiconductor oxide interface. Overheating so close to the surface can affect the electronic structure of the material adjacent to the surface. Thermally induced contraction of the optical bandgap of the semiconductor crystal increases the absorption of light. The more light is absorbed, the more heat is, thereby causing a thermal runaway process, leading to rapid degradation of the material of the surface and adjacent end faces, ultimately leading to COD and failure of the end faces.

For many years, a process developed by IBM and referred to as "E2 passivation" has been used to solve the above problem and minimize the potential for COD. The E2 process involves depositing an amorphous silicon (a-Si) layer on the cleave plane as a passivation film layer. The essence of the E2 process is to chemically stabilize the chip surface by forming silicon (Si) directly on the exposed end faces. Although silicon is clearly the best choice for preventing/eliminating facet corrosion, it has the disadvantage of absorbing the light emitted by the laser diode. The absorbed light generates charge carriers that recombine in a non-radiative manner, generating excessive heat, causing defects to form. These processes accelerate the deterioration of the end faces and may cause a thermal runaway condition leading to COD. Therefore, the passivation layer cannot be too thick because it absorbs too much light, generates too much heat, and further increases the possibility of COD (it is known that COD level decreases sharply with increasing Si passivation film thickness). The thickness limit depends on the wavelength, and the performance behavior of the device becomes more important for short-wavelength laser diodes, as the absorption of short wavelengths is stronger. However, although the passivation film should be as thin as possible in terms of light absorption, long-term life tests have shown that an excessively thin film does not sufficiently protect the surface of the end face. The thickness of the Si film is also a critical parameter for surfaces exposed to ions/atoms with higher energy, for example, in standard mirror film layers deposited by ion beam sputtering to obtain the desired specular reflectivity.

As is clear from the above discussion, one challenge to overcome is to reduce light absorption in the passivation film while maintaining a sufficient thickness of the passivation film to protect the facets, which is clearly a conflicting requirement in the thickness preference of the silicon passivation film. Furthermore, the passivation structure needs to be formed in such a way as to minimize the number of charge carriers (generated by absorption of light) that can reach the cleavage plane of the chip by diffusion. Furthermore, the passivation structure must not react with the end face, but should stabilize the surface of the end face and prevent mobile atoms/impurities from migrating and diffusing onto the end face. Furthermore, the passivation structure itself should not be a source of end face contamination.

Disclosure of Invention

The need remaining in the prior art is addressed by the present invention, which relates to semiconductor laser diodes, and more particularly to quantum well passivation arrangements for protecting the mirrors of laser diodes.

According to one or more embodiments of the inventionExample, the prior art thick film amorphous silicon passivation structure was replaced by a quantum well structure comprising alternating silicon and silicon oxide (SiO)_x) Or a thin layer of nitride (or other suitable semiconductor material such as germanium or antimony and oxides or nitrides thereof (or other suitable barrier materials)), etc. The semiconductor material may be in its pure form or in a hydrogenated form known to reduce defect density. An initial semiconductor layer is deposited on the exposed end surface to form a thin (e.g., about 3 nm) layer associated with exhibiting quantum properties (rather than a thicker layer exhibiting the conventional properties of bulk materials) by controlling the reaction process. The device is then processed to form a thin barrier layer (barrier layer). In one exemplary embodiment, the device is exposed to oxygen to convert a surface portion of the semiconductor layer to an oxide thereof. A second (thin) layer of semiconductor is then deposited on the oxide, and a portion of the second layer is then oxidatively converted to its oxide composition, thereby forming a quantum well structure. If a Multiple Quantum Well (MQW) structure is preferred for many applications, the steps of semiconductor deposition and oxidation are repeated.

An advantage of the quantum well passivation structure of the present invention is that these quantum wells will have a larger optical bandgap and therefore less absorption of light emitted from the laser diode compared to a thick silicon layer.

Exemplary embodiments of the present invention relate to a method of forming a passivation structure on an facet of an edge-emitting laser diode, and include at least the steps of: a) depositing a thin layer of semiconductor in the reaction chamber to cover the exposed laser facet, controlling the thickness of the deposited layer to form a quantum well structure; b) oxidizing a surface portion of the semiconductor layer to form a thin oxide layer; c) repeating steps a) and b) to form a quantum well passivation structure of alternating semiconductor quantum wells and oxide barriers.

Another exemplary embodiment of the present invention takes the form of an edge-emitting laser diode that includes a semiconductor substrate having a waveguide structure formed thereon for generating light at an operating wavelength, a pair of cleave planes formed on opposite sides of the waveguide structure, a passivation structure comprising a plurality of semiconductor quantum wells and a plurality of oxide material layers arranged alternately, and a reflective film layer formed directly on the passivation structure.

Other and further embodiments and aspects of the invention will become apparent during the course of the following discussion and by reference to the accompanying drawings.

Drawings

Reference is now made to the schematic drawings,

FIG. 1 illustrates a conventional edge-emitting laser diode;

FIG. 2 is a plan view of an exemplary edge-emitting laser diode formed in accordance with the present invention, including a MQW passivation structure formed on the laser facet;

FIG. 3 is a diagram of the quantum well associated with the MQW passivation structure of the present invention as shown in FIG. 2;

FIGS. 4-10 illustrate a series of exemplary processing steps that may be used to fabricate a MQW passivation structure in accordance with the principles of the present invention;

FIG. 11 schematically illustrates an exemplary complete laser diode formed to include a MQW passivation structure of the present invention, the laser diode including a standard reflective film layer deposited on top of the passivation structure;

fig. 12 is a high resolution STEM map of an exemplary laser diode formed incorporating the MQW passivation structure of the present invention.

Fig. 13 is another high resolution STEM map of an exemplary laser diode formed in accordance with the present invention, in this case, the initial amorphous silicon layer has been crystallized using an ex-situ (ex-situ) conditioning process.

Fig. 14 is a high resolution STEM map of another embodiment of the present invention, in this case, an in-situ (in-situ) process is used to crystallize the initial silicon layer before forming the remaining MQW passivation structure.

Detailed Description

Fig. 1 illustrates a conventional edge-emitting laser diode formed in a semiconductor optoelectronic chip (or "bar") 10 having a front facet 12 and an opposing back facet 14. The rod 10 comprises a vertical structure typically consisting of layers of AlGaAs, GaAs, InGaAs and related III-V semiconductor materials epitaxially deposited on a GaAs substrate. However, it should be understood that other material combinations are possible for fabricating light emitting devices.

In the commercial production of these laser diodes, a large number of such rods are formed simultaneously on a single gallium arsenide wafer, and the wafer is subsequently cleaved along a natural cleavage plane to form a large number of individual rods 10 having front and back end faces 12, 14 and vertically aligned sides 16, 18.

The semiconductor processing performed on the wafer also forms a waveguide structure 20 in each rod extending between the front facet 12 and the back facet 14. Although in most cases the waveguide structure 20 is a ridge waveguide, other configurations are possible (e.g., a buried heterostructure waveguide). In many high power applications, the waveguide structure 20 has a width substantially greater than the lasing wavelength to form a wide-area laser.

As part of the conventional manufacturing process, the cleaved surfaces 12, 14 should be passivated using a standard E2 passivation process. That is, passivation layers 22, 24, preferably amorphous silicon (a-Si), are coated on the end faces 12, 14. The essence of the E2 process is to chemically stabilize the chip end faces 12, 14 by forming silicon directly on the exposed end faces. Although silicon is clearly the best choice for preventing/eliminating facet corrosion, it has the disadvantage that silicon naturally absorbs the light emitted by the laser diode. That is, the absorbed light generates charge carriers that recombine in a non-radiative manner and generate excess heat. These processes accelerate the deterioration of the end faces and may cause a thermal runaway condition leading to COD. Therefore, it is desirable to control the total thickness of the passivation layer to minimize this possibility.

Indeed, in principle, a silicon thin film seems to be sufficient to chemically stabilize the end faces. However, long-term life tests have shown that the films provide insufficient protection for long-term use. Even in the case of a thin film that completely covers the surface roughness/cleavage-related steps, the thin film thickness is not sufficient to serve as an effective barrier against diffusion of foreign atoms/impurities.

The present invention addresses these problems by replacing the thick silicon film (which shows the properties of the bulk material) with a quantum well structure (QW) comprising semiconductor Quantum Wells (QWs) interleaved with barrier layers (e.g., oxides, nitrides, etc.). Preferred semiconductor materials suitable for use as quantum well passivation structures include silicon, germanium, and antimony, either in pure or hydrogenated form. Wherein the hydrogenated form contains a sufficient amount of hydrogen and reduces the density of defects in the semiconductor material by saturation of dangling bonds. For convenience, the following discussion will focus on the use of silicon/silicon oxide in such quantum well/barrier passivation structures, and understand that other suitable materials may be used. It should be understood that in addition to oxides and nitrides of Si, Ge and Sb, oxides and nitrides of other materials, such as, but not limited to, aluminum, titanium and tantalum, may also be used to form the barrier of the QW passivation structure.

Fig. 2 illustrates an exemplary edge-emitting laser diode including a quantum well passivation structure 30 formed in accordance with the principles of the present invention. As with the conventional laser diode discussed above, the laser diode of the present invention includes a semiconductor chip 10 formed with end faces 12 and 14. As shown in fig. 2, the laser diode of the present invention is constructed to include a quantum well passivation structure 30 arranged to overlie the end face 12 (it being understood that the quantum well passivation structure may be formed on the opposing face 14 using the same method), as shown.

As described below, the quantum well structure 30 includes alternating layers of semiconductor material and a dielectric barrier layer disposed on the exposed surface of the end face 12. In accordance with the principles of the present invention, each individual layer is relatively thin (on the order of a few nanometers) to create the desired quantum well/barrier structure. The process of building a multi-layer QW/barrier stack continues until a final stack is formed having a thickness close to that of the prior art a-Si passivation film. In some embodiments, a single quantum well structure may be sufficient.

Referring to the specific embodiment shown in fig. 2, an initial silicon layer 32.1 of the quantum well structure 30 is shown deposited on the exposed top major surface 12s of the end face 12. The silicon layer 32.1 is deposited using well-known techniques, for example using the E2 process. According to the invention, the silicon layer 32.1 is formed to a thickness of only a few nanometers (e.g. 3 nanometers) in order to provide the required quantum well structure. Once the initial silicon layer 32.1 is formed, the device is then exposed to oxygen to oxidize surface portions of the silicon layer 32.1, thereby forming a first silicon oxide layer 34.1. The oxidation process is monitored in accordance with the invention to control the thickness of the oxide layer 34.1 formed. For example, for the first oxide layer 34.1, it may be desirable to create a thickness approximately in the range of 1.0-2 nanometers. With this thickness, the final thickness of the remaining silicon layer 32.1 will be about 1-2 nm, or slightly less than 1-2 nm. The combination of the remaining silicon layer 32.1 and the oxide layer 34.1 forms a quantum well passivation structure. If it is preferred to form a "multiple" quantum well structure, as is typically the case, an additional thin (about 3 nm) silicon layer 32.2 is deposited over the oxide layer 34.1 and the device is again exposed to oxygen, thereby converting the top of the silicon layer 32.2 into a second silicon oxide layer 34.2. The deposition and oxidation steps may then be continued to form a stack as shown in figure 2 to form the quantum well structure 30. It should be understood that these choices of materials are merely exemplary materials and that other materials may be used to form the quantum well and barrier layers. In fact, the barrier may include oxides or nitrides of silicon, germanium, and antimony, as well as certain materials such as aluminum oxide, titanium oxide, aluminum nitride, and tantalum oxide. In the figure, the silicon Layer is denoted by SL (Si Layer).

Once the desired number of quantum wells are formed, a standard film layer 36 (e.g., Si) is formed on the top surface of the outermost barrier layer (shown here as silicon oxide layer 34.4)_xN_y). It is to be understood that the number of individual layers and their thicknesses are design considerations and may be adjusted or varied (as the case may be) from case to case, provided that the layers remain thin enough to exhibit their quantum properties rather than the conventional matrix material properties. These different situations may include, for example, situations where the laser diode is to be operated at very high power, where the laser is to be operated at different wavelengths, or where the end face is exposed to high energy ions during processing (e.g., standard mirror film deposition by ion beam sputtering).

Fig. 3 is a diagram depicting an exemplary QW/barrier structure formed from alternating layers of silicon and silicon oxide. As mentioned above, one problem with using a prior art thick silicon layer as an end-facet coating is that it absorbs a portion of the light emitted by the laser chip. The absorbed light produces a sufficient number of charge carriers to recombine in a non-radiative manner, resulting in excessive heat and end-face degradation. This degradation of the end face, which occurs in particular through the formation of composite reinforcement, reactions and propagation of defects, is assisted by the generation of excessive heat. The greater the number of nonradiative recombination carriers at a particular site/location, the faster the material degrades there. It can thus be seen that the degradation process can be slowed down by appropriate spatial redistribution of carriers generated by light absorption in the passivation structure. This result is achieved, in accordance with the principles of the present invention, by using a quantum well structure with a higher band gap barrier material to confine any recombination to the local quantum well. It has therefore been found that the use of such a quantum well structure not only reduces the absorption of the lasing but also minimises the number of charge carriers reaching the chip surface and significantly slows down the end face degradation process by these methods.

Fig. 4-11, described below, illustrate an exemplary set of processing steps that may be used to form a quantum well passivation structure for an edge-emitting laser diode according to the present invention. It should be understood that the passivation process of the present invention can be applied to the facets while the laser remains in the stripe shape. In fact, a plurality of laser bars can be processed simultaneously, thereby significantly reducing the manufacturing time and improving the efficiency of the overall process.

Fig. 4 shows the laser diode structure at the beginning of the passivation process. It will be appreciated that the laser chip 10 as shown in figure 4 has been fully processed to include the various III-V material layers required to form the laser device and has reached the point in the manufacturing process where facets 12 and 14 are formed by a cleaving operation to produce several "rods" of laser diodes from the processed GaAs wafer. In fact, although the entire laser diode bar is not explicitly shown, it should be understood that the method of providing quantum well passivation according to the present invention may be performed on a bar-shaped structure of a plurality of laser diodes as well as on a single laser diode itself. It is expected that in most cases it will be desirable to perform passivation on a group of laser diode bars simultaneously, thereby providing an efficient mass production technique.

Fig. 4 shows the laser chip 10 after cleaving to expose the end faces 12 and 14. As shown, the initial step of the end-face passivation process is to deposit an initial silicon layer 32.1 on the end surface 12S of the exposed end-face 12. The deposition may be performed in the same equipment used for the previous cleaving operation. After the initial silicon layer 32.1 is formed, the device is exposed to oxygen which is applied to the outermost surface of the silicon oxide layer 32.1, thereby converting it to silicon oxide. Fig. 5 emphasizes that the amorphous silicon layer is processed to be crystalline, forming a crystalline interface with the chip. It should be understood that crystallization may be performed at different stages of the process, as discussed below in connection with fig. 11.

Fig. 6 shows a first oxide layer 34.1 formed from the top of the silicon layer 32.1. The length of exposure to oxygen determines the thickness of the silicon oxide layer 34.1 formed (and likewise the thickness of the remaining silicon oxide layer 32.1). As shown in fig. 6, the remaining silicon layer 32.1 has a final thickness t_sOxide layer 34.1 has a thickness t_oWherein t is_s+t_oSubstantially the same as the originally deposited silicon layer. Slight variations in thickness are expected due to the addition of oxygen atoms to the passivation structure. Thus, when an oxide layer having a thickness of 1 nm is formed from an initial silicon layer having a thickness of 3nm, the final thickness t of the layer 32.1_sWill be 2 nm. To create a silicon quantum well structure according to the present invention, the initial silicon layer 32.1 (and all silicon layers subsequently deposited) needs to be relatively thin, about 3nm or less (depending on the wavelength of light emitted by the laser diode). The process then continues as shown in fig. 7 by depositing a second silicon layer (denoted as silicon layer 32.2) on the first silicon oxide layer 34.1. The second layer 32.1 is deposited to a thickness that allows the formation of quantum wells.

For embodiments in which it is desired to form multiple quantum wells, the process may be repeated by again exposing device 10 to oxygen, followed by a further deposition of a thin silicon layer, and so on. Exposure to oxygen during each process cycle can result in oxidation of the outermost surface of the newly deposited silicon layer 32. Fig. 8 shows the structure of the second oxide layer 34.2 as the process progresses. The silicon layer 32.2 in fig. 8 shows the remaining thickness of the lower bottom silicon layer. The steps of depositing silicon and forming silicon oxide may be performed multiple times to form a silicon multiple quantum well. A significant advantage of the method of the invention is that each successive silicon layer is deposited in a contamination-free chamber that each time retains the original surface for subsequent processing. Alternatively, on an atomic scale, the process of the present invention is "cleaner" than prior art end-face passivation techniques.

It is noted that in the standard E2 process, after the deposition of the single silicon passivation layer, the device is removed from the contamination free chamber, and the remaining mirror processing is performed outside the chamber. Thus, when the single silicon layer is kept very thin (minimizing thermal runaway associated with light absorption as proposed in the prior art), such a situation arises: the exposed surface of the passivation layer is very close to the chip end face and increases the end face contamination risk of diffusing/migrating mobile atomic species/impurities. In contrast to this, the structure of the invention keeps the final, exposed silicon layer (here layer 32.4) as far away from the end face as possible to prevent contamination by mobile atomic species.

Fig. 8 shows the laser chip 10 after additional steps of silicon deposition and formation of silicon oxide, the laser chip 10 showing an additional silicon layer 32.3 and an oxide layer 34.3. The final form of structure 30 may be as shown in fig. 9, where an additional set of silicon deposition and oxide formation steps are performed on the structure shown in fig. 8. Referring to fig. 2, the final structure of quantum well passivation structure 30 is formed to exhibit a desired thickness T, which may be similar to the thickness of a standard silicon passivation film formed with the E2 process. Fig. 10 shows the final step of the method, in which a protective layer 36 (e.g. silicon nitride SiN) is formed on the outer oxide layer 34.4.

The initial silicon layer 21.1 is formed as an amorphous silicon layer and if this state is maintained will interact with the end face 12 resulting in COD at relatively low current/power levels. Therefore, the layer 32.1 needs to be processed to form a monocrystalline silicon (c-Si) layer 32.1 c. Various techniques well known in the art may be used to provide such processing, including but not limited to operating for a defined time (sometimes referred to as "training") and at a reduced current. Alternatively, an ex situ process may be used, such as that described in co-pending U.S. patent application No. 15/996614, which we filed on 6/4/2018 and is incorporated herein by reference, which describes irradiating a passivation material with an external energy source and converting it to a crystalline form. It should be appreciated that the processing steps may be performed at different stages of the mirror processing (e.g., directly after deposition of the first silicon layer, at the completion of quantum well fabrication, when the mirror is completed (including deposition of the reflective outer film layer)), or at any point in between. Fig. 11 shows a passivation structure with a crystalline form of this first silicon layer, here shown as silicon layer 32.1 c.

Fig. 12 is another high resolution STEM view of an exemplary laser diode formed to include the quantum well passivation structure of the present invention. The quantum well form of structure 30 is clearly visible to form a passivated interface between the end facet 12 of laser chip 10 and the outer protective layer 36.

Fig. 13 is another high resolution STEM view of an exemplary laser diode formed to include the quantum well passivation structure of the present invention. In this case, the initial amorphous silicon layer 32.1 has been crystallized using an ex-situ treatment process (as described in our above-mentioned co-pending application) to form a single crystal silicon layer 32.1 c. Fig. 14 is a high resolution STEM map of yet another embodiment of the present invention. In this case, in situ (in-situ) The process treats the initial silicon layer 32.1 c.

As described above, the absorption of the laser output emission by the passivation structure of the present invention is less because the effective bandgap in the quantum well is larger than the bulk silicon material used in the prior art. An advantage of the laser diode structure of the present invention is that any charge carriers generated in a single quantum well will recombine "locally", i.e. within the particular layer itself.

If any unwanted species (atoms or molecules) are present at the film material or passivation structure/film interface, they cannot initiate diffusion through the passivation structure to (or chemically react with) the endface in the absence of an external driving force. Absorption of light energy is such a driving force, but the quantum well structure of the passivation structure is believed to hinder this ability, thereby minimizing the number of charge carriers generated in the end faces and passivation layer, which in turn leads to overheating and defect formation.

The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.