阅读说明：本技术 半导体封装用管座以及半导体封装 (Semiconductor package header and semiconductor package ) 是由 木村康之 池田巧 于 2021-03-10 设计创作，主要内容包括：本发明提供一种能够进一步改善电气特性的半导体封装用管座以及半导体封装。该半导体封装用管座具有：孔圈；第一金属块,其在上述孔圈的上表面突起；第一引线,其在自上表面侧至下表面侧贯通上述孔圈的第一贯通孔内气密接合；以及第一基板,其具有形成有与上述第一引线电连接的第一信号图案的表面、以及成为上述表面的相反面的背面,上述背面一侧固定于上述第一金属块的第一侧面,作为上述第一基板的上述背面的一部分的第一部分自上述第一金属块露出,在上述第一基板的上述第一部分形成有接地图案。(The invention provides a semiconductor package header and a semiconductor package capable of further improving electrical characteristics. The semiconductor package socket includes: a hole ring; a first metal block protruding from an upper surface of the eyelet; a first lead hermetically bonded in a first through hole penetrating the grommet from an upper surface side to a lower surface side; and a first substrate having a front surface on which a first signal pattern electrically connected to the first lead is formed and a back surface opposite to the front surface, wherein the back surface side is fixed to a first side surface of the first metal block, a first portion which is a part of the back surface of the first substrate is exposed from the first metal block, and a ground pattern is formed in the first portion of the first substrate.)

1. A semiconductor package header includes:

a hole ring;

a first metal block protruding from an upper surface of the eyelet;

a first lead hermetically bonded in a first through hole penetrating the grommet from an upper surface side to a lower surface side; and

a first substrate having a surface on which a first signal pattern electrically connected to the first lead is formed and a back surface which is an opposite surface to the surface, the back surface being fixed to a first side surface of the first metal block,

a first portion which is a part of the back surface of the first substrate is exposed from the first metal block,

a ground pattern is formed on the first portion of the first substrate.

2. The header for semiconductor packages according to claim 1,

the height of the first metal block is lower than that of the first substrate with respect to the upper surface of the eyelet.

3. The semiconductor package stem according to claim 1 or 2, further comprising:

a second metal block protruding from an upper surface of the grommet and having a second side surface facing the same side as the first side surface;

a second lead hermetically bonded in a second through-hole penetrating the grommet from the upper surface side to the lower surface side, and

a second substrate having a front surface on which a second signal pattern electrically connected to the second lead is formed and a back surface opposite to the front surface, the back surface being fixed to the second side surface of the second metal block,

the first metal block and the second metal block are separately disposed,

a second portion which is a part of the back surface of the second substrate is exposed from the second metal block,

a ground pattern is formed on the second portion of the second substrate.

4. The header for semiconductor packages according to claim 3,

the height of the second metal block is lower than that of the second substrate with respect to the upper surface of the grommet.

5. The header for semiconductor packages according to claim 3 or 4,

the first side surface and the second side surface are located on the same plane.

6. A semiconductor package, having:

the semiconductor package socket according to claim 1 or 2;

a peltier element disposed on an upper surface of the aperture;

a third metal block disposed on the peltier element and having a third side surface facing the same side as the first side surface; and

a third substrate having a front surface on which light emitting elements are mounted and a back surface which is an opposite surface to the front surface, and having one side of the back surface fixed to the third side surface of the third metal block,

a third portion which is a part of the rear surface of the third substrate is exposed from the third metal block,

forming a ground pattern on the third portion of the third substrate,

the first metal block and the third metal block are separately disposed,

the ground pattern formed in the first portion of the first metal block and the ground pattern formed in the third portion of the third metal block are electrically connected by a linear member.

7. A semiconductor package, having:

the semiconductor package header of any one of claims 3 to 5;

a peltier element disposed on an upper surface of the aperture;

a third metal block which is disposed on the peltier element and has a third side surface facing the same side as the first side surface and the second side surface; and

a third substrate having a front surface on which light emitting elements are mounted and a back surface which is an opposite surface to the front surface, and having one side of the back surface fixed to the third side surface of the third metal block,

a third portion which is a part of the rear surface of the third substrate is exposed from the first substrate side of the third metal block,

a fourth portion which is a part of the rear surface of the third substrate is exposed from the second substrate side of the third metal block,

forming a ground pattern on the third portion and the fourth portion of the third substrate,

the first metal block is disposed separately from the third metal block, and the second metal block is disposed separately from the third metal block,

the ground pattern formed in the first portion of the first metal block and the ground pattern formed in the third portion of the third metal block are electrically connected by a linear member,

the ground pattern formed in the second portion of the second metal block and the ground pattern formed in the fourth portion of the third metal block are electrically connected by a linear member.

8. The semiconductor package of claim 7,

the ground pattern formed in the first portion of the first metal block and the ground pattern formed in the third portion of the third metal block are electrically connected to each other by a plurality of linear members,

the ground pattern formed in the second portion of the second metal block and the ground pattern formed in the fourth portion of the third metal block are electrically connected by a plurality of linear members.

9. The semiconductor package of claim 7 or 8,

the first substrate and the second substrate are formed of a material having lower thermal conductivity than the third substrate.

10. The semiconductor package of claim 9,

the first substrate and the second substrate are made of aluminum oxide, and the third substrate is made of aluminum nitride.

Technical Field

The invention relates to a semiconductor package header and a semiconductor package.

Background

Various types of light-emitting elements are known, such as Electro-absorption Modulated (EML) lasers and Direct Modulated (DML) lasers. These light emitting elements are used for optical communication, for example.

In some cases, a peltier element as a temperature regulator is mounted in the package in order to stabilize the oscillation wavelength of these light emitting elements. In this case, since the peltier element is mounted, the transmission line in the package is long, and therefore, it is necessary to provide a relay board and a metal block for holding the relay board in consideration of the transmission loss, and these components are arranged above the aperture ring.

However, since the peltier element is a semiconductor-type heat transfer device, electrical conduction in the vertical direction is not obtained. Therefore, for example, when an element mounting substrate on which a light emitting element is mounted is disposed on a peltier element, the element mounting substrate is in an electrically floating state with respect to the aperture coil, which is not preferable in terms of processing a high-frequency signal.

Then, for example, it is considered to improve the electrical characteristics by connecting the GND on the front surface side of the relay substrate and the GND on the front surface side of the element-mounting substrate with wires and connecting the metal block for holding the back surface side of the relay substrate and the metal block for holding the back surface side of the element-mounting substrate with wires.

< Prior Art document >

< patent document >

Patent document 1: japanese unexamined patent publication No. 2011-108939

Disclosure of Invention

< problems to be solved by the present invention >

However, when a metal wire is added between the metal blocks, it is necessary to consider that the heat of the light emitting element moved by the peltier element is not returned to the light emitting element via the relay substrate or the like again. That is, although increasing the number of additional metal wires improves the electrical characteristics, it is not preferable to increase the number of metal wires at will because heat is easily returned to the light-emitting element via the metal wires. Thus, further improvement in electrical characteristics using less metal wires is desired.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor package socket capable of further improving electrical characteristics.

< means for solving the problems >

The semiconductor package socket includes: a hole ring; a first metal block protruding from an upper surface of the eyelet; a first lead hermetically bonded in a first through hole penetrating the grommet from an upper surface side to a lower surface side; and a first substrate having a front surface on which a first signal pattern electrically connected to the first lead is formed and a back surface opposite to the front surface, wherein the back surface side is fixed to a first side surface of the first metal block, a first portion which is a part of the back surface of the first substrate is exposed from the first metal block, and a ground pattern is formed in the first portion of the first substrate.

< effects of the invention >

According to the disclosed technology, a semiconductor package stem capable of further improving electrical characteristics can be provided.

Drawings

Fig. 1 is (a) a perspective view showing a semiconductor package stem according to a first embodiment by way of example.

Fig. 2 is a perspective view (second view) showing a semiconductor package socket according to the first embodiment by way of example.

Fig. 3 is a plan view showing a semiconductor package socket according to the first embodiment by way of example.

Fig. 4 is (a) a perspective view showing a semiconductor package of the first embodiment by way of example.

Fig. 5 is a perspective view (second) illustrating the semiconductor package of the first embodiment by way of example.

Fig. 6 is a plan view illustrating the semiconductor package of the first embodiment by way of example.

Fig. 7 is a perspective view showing a semiconductor package stem according to modification 1 of the first embodiment by way of example.

Fig. 8 (a) is a diagram for explaining simulation.

Fig. 9 (a) is a diagram explaining the simulation result.

Fig. 10 is a diagram (second) explaining the simulation.

Fig. 11 is a diagram (second diagram) explaining the simulation result.

Fig. 12 is a diagram (third) illustrating the simulation result.

Fig. 13 is a diagram (third) for explaining the simulation.

Fig. 14 is a diagram (fourth) illustrating the simulation result.

Fig. 15 is a diagram (fourth) explaining the simulation.

Fig. 16 is a diagram (the fifth) explaining the results of the simulation.

Fig. 17 is a diagram (the fifth) explaining the simulation.

Fig. 18 is a diagram (six) illustrating the results of the simulation.

Description of the reference numerals:

1. 1A semiconductor package tube seat

2 semiconductor package

10-hole ring

10a upper surface

10b lower surface

21 first metal block

21a, 22a, 23a substrate fixing surface

22 second metal block

23 third metal block

31 first substrate

31G, 32G, 33G ground pattern

31S, 32S, 33S1, 33S2 Signal Pattern

32 second substrate

33 third substrate

41 first lead

42 second lead

43 third lead wire

44 fourth lead

45 fifth lead wire

46 sixth lead wire

50 sealing part

60 light emitting element

70 Peltier element

80 Linear Member

100 cover

110 transparent member

Detailed Description

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant description thereof may be omitted.

(first embodiment)

Fig. 1 is a perspective view (first) showing an example of a semiconductor package socket according to a first embodiment, and is a view of the semiconductor package socket as viewed from the front side of a first substrate and a second substrate. Fig. 2 is a perspective view (second view) illustrating the semiconductor package socket according to the first embodiment, which is a view of the semiconductor package socket as viewed from the back side of the first substrate and the second substrate. Fig. 3 is a plan view showing a semiconductor package socket according to the first embodiment by way of example.

Referring to fig. 1 to 3, a semiconductor package socket 1 according to a first embodiment includes: a grommet 10; a first metal block 21; a second metal block 22; a first substrate 31; a second substrate 32; a first lead 41; a second lead 42; a third lead 43; a fourth lead 44; a fifth lead 45; a sixth lead 46; and a sealing portion 50. The semiconductor package socket 1 can be used as a socket for a Direct Modulation Laser (DML), for example.

The eyelet 10 is a disc-shaped member. The diameter of the grommet 10 is not particularly limited, and may be appropriately determined according to the purpose, and may be, for example, 3.8mm or 5.6 mm. The thickness of the eyelet 10 is not particularly limited, and may be appropriately determined according to the purpose, and may be, for example, about 1.0 to 1.5 mm. The eyelet 10 may be formed of a metallic material such as iron. The grommet 10 may be formed of a metal material (for example, a so-called clad material) in which a plurality of metal layers (copper layer, iron layer, etc.) are laminated. Gold plating or the like may be applied to the surface of the eyelet 10.

In the present application, the disk-like shape means a shape having a substantially circular shape in plan view and a predetermined thickness. The thickness with respect to the diameter is not limited in size. In addition, a recess, a projection, a through hole, and the like are partially formed. In the present application, the plan view refers to a view of the object from the direction normal to the upper surface 10a of the grommet 10, and the plan view shape refers to a view of the object from the direction normal to the upper surface 10a of the grommet 10.

The outer edge portion of the grommet 10 may have one or more notch portions of a recessed shape from the outer peripheral side toward the center side in a plan view. The notch is, for example, a recess having a substantially triangular or substantially rectangular shape in plan view. The notch portion can be used, for example, for positioning a device mounting surface when mounting a semiconductor device on the semiconductor package header 1. The notch portion can be used, for example, for positioning the semiconductor package socket 1 in the rotational direction.

The first metal block 21 and the second metal block 22 are columnar members protruding from the upper surface 10a of the grommet 10, and are arranged apart from each other on the upper surface 10a of the grommet 10. The side surface of the first metal block 21 facing the first lead 41 is a substrate fixing surface 21a for fixing the first substrate 31.

Similarly, the side surface of the second metal block 22 facing the second lead 42 is a substrate fixing surface 22a for fixing the second substrate 32. The substrate fixing surface 21a and the substrate fixing surface 22a are provided substantially perpendicular to the upper surface 10a of the grommet 10, for example. The substrate fixing surface 21a and the substrate fixing surface 22a face the same side, for example, on the same plane.

The first metal block 21 and the second metal block 22 are formed of a metal material such as iron, for example. The first metal block 21 and the second metal block 22 are joined to the grommet 10 by a conductive material such as solder. The first metal block 21 and the second metal block 22 may be formed integrally with the eyelet 10 by cold forging and pressing, for example. The first metal block 21 and the second metal block 22 are, for example, rectangular parallelepiped shapes, but may be any shapes as long as they can expose a part of the back surfaces of the first substrate 31 and the second substrate 32.

The first substrate 31 is fixed to the substrate fixing surface 21 a. A signal pattern 31S and a ground pattern 31G are provided on the surface (the surface facing the first lead 41) of the first substrate 31. A ground pattern 31G is provided on the rear surface (surface facing the first metal block 21) of the first substrate 31 in a full-surface shape. The ground pattern 31G on the front surface and the ground pattern 31G on the back surface of the first substrate 31 are electrically connected to each other through a through hole penetrating the first substrate 31.

The back surface side of the first substrate 31 is fixed to the substrate fixing surface 21a by a conductive material such as solder (for example, gold-tin alloy). Thereby, the ground pattern 31G on the back surface of the first substrate 31 is electrically connected to the first metal block 21, and the first metal block 21 has the GND potential (reference potential).

The height of the first metal block 21 is lower than the height of the first substrate 31 with respect to the upper surface 10a of the grommet 10. Therefore, at least a part of the ground pattern 31G on the back surface of the first substrate 31 is exposed from the first metal block 21, and wire bonding or the like can be performed from the back surface at the exposed part.

In consideration of ease of mounting the first substrate 31, it is preferable that the height of the first metal block 21 with respect to the upper surface 10a of the eyelet 10 be equal to or greater than 1/2 of the height of the first substrate 31. For example, when the height of the first base plate 31 with respect to the upper surface 10a of the grommet 10 is 2mm, the height of the first metal block 21 is preferably set to 1mm or more.

The second substrate 32 is fixed to the substrate fixing surface 22 a. The signal pattern 32S and the ground pattern 32G are provided on the surface (surface facing the second lead 42) of the second substrate 32. A ground pattern 32G is provided on the rear surface (surface facing the second metal block 22) of the second substrate 32 in a full-surface shape. The ground pattern 32G on the front surface and the ground pattern 32G on the back surface of the second substrate 32 are electrically connected to each other by a through hole penetrating the second substrate 32.

The rear surface side of the second substrate 32 is fixed to the substrate fixing surface 22a by a conductive material such as solder (for example, gold-tin alloy). Thereby, the ground pattern 32G on the back surface of the second substrate 32 is electrically connected to the second metal block 22, and the second metal block 22 has the GND potential (reference potential).

The height of the second metal block 22 is lower than the height of the second substrate 32 with respect to the upper surface 10a of the grommet 10. Therefore, at least a part of the ground pattern 32G on the back surface of the second substrate 32 is exposed from the second metal block 22, and wire bonding or the like can be performed from the back surface at the exposed part.

In consideration of the ease of mounting second substrate 32, it is preferable that the height of second metal block 22 with respect to upper surface 10a of grommet 10 be equal to or greater than 1/2 of the height of second substrate 32. For example, when the height of the second base plate 32 with respect to the upper surface 10a of the grommet 10 is 2mm, the height of the second metal block 22 is preferably set to 1mm or more.

The first substrate 31 and the second substrate 32 are made of, for example, aluminum oxide or aluminum nitride. In particular, alumina having a low thermal conductivity is preferable. The signal patterns 31S, 32S and the ground patterns 31G, 32G may be formed of, for example, tungsten, titanium, gold, or the like. The surfaces of the signal patterns 31S, 32S and the ground patterns 31G, 32G may be formed with gold plating or the like.

The first lead 41, the second lead 42, the third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 are hermetically bonded in through holes that pass through the grommet 10 from the upper surface 10a side to the lower surface 10b side, with the longitudinal direction thereof facing the thickness direction of the grommet 10. That is, the first lead 41, the second lead 42, the third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 are sealed by the sealing portion 50 in the respective through holes at the periphery thereof.

A part of the first lead 41 and the second lead 42 protrudes upward from the upper surface 10a of the eyelet 10. The protrusion amount is, for example, about 0 to 0.3 mm. A part of the third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 protrudes upward from the upper surface 10a of the eyelet 10. The third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 protrude from the upper surface 10a of the eyelet 10 by about 0 to 2mm, for example.

Further, a part of the first lead 41, the second lead 42, the third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 protrudes downward from the lower surface 10b of the eyelet 10. The first lead 41, the second lead 42, the third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 protrude from the lower surface 10b of the grommet 10 by about 6 to 10mm, for example.

The first, second, third, fourth, fifth, and sixth leads 41, 42, 43, 44, 45, and 46 are made of metal such as iron-nickel alloy or kovar, and the sealing portion 50 is made of insulating material such as glass material. Gold plating or the like may be formed on the surfaces of the first, second, third, fourth, fifth, and sixth leads 41, 42, 43, 44, 45, and 46.

The portion of the first lead 41 protruding upward from the upper surface 10a of the eyelet 10 is electrically connected to the signal pattern 31S of the first substrate 31 by solder (e.g., gold-tin alloy) or the like. The portion of the second lead 42 protruding upward from the upper surface 10a of the eyelet 10 is electrically connected to the signal pattern 32S of the second substrate 32 by solder (e.g., gold-tin alloy) or the like.

The first lead 41 and the second lead 42 serve as paths through which differential signals electrically connected to the light emitting element mounted on the semiconductor package stem 1 pass through the signal pattern 31S and the signal pattern 32S. The third lead 43, the fourth lead 44, the fifth lead 45, and the sixth lead 46 serve as paths through which a signal electrically connected to GND and the peltier element mounted on the semiconductor package socket 1 passes, and a signal electrically connected to the temperature sensor mounted on the semiconductor package socket 1 passes, for example. The number of leads is not limited, and may be increased or decreased as necessary.

Fig. 4 is (a) a perspective view illustrating the semiconductor package according to the first embodiment, which is a view of the semiconductor package as viewed from the front side of the first substrate and the second substrate. Fig. 5 is a perspective view (second) illustrating the semiconductor package according to the first embodiment, as viewed from the back surfaces of the first substrate and the second substrate. Fig. 6 is a plan view illustrating the semiconductor package of the first embodiment by way of example. Note that, in fig. 4, the cover 100 is illustrated as transparent for convenience, and in fig. 5 and 6, the cover 100 and the transparent member 110 are not illustrated.

Referring to fig. 4 to 6, the semiconductor package 2 of the first embodiment includes a semiconductor package stem 1 (see fig. 1 to 3), a third metal block 23, a third substrate 33, a light emitting element 60, a peltier element 70, a cover 100, and a transparent member 110.

As shown in fig. 4, in the semiconductor package 2, a cover member 100 integrated with a transparent member 110 such as a window or a lens for taking out the light L emitted from the light emitting element 60 is fixed to the semiconductor package stem 1 by resistance welding or the like. The cap 100 is formed of a metal such as stainless steel, and hermetically seals main components such as the light emitting element 60 of the semiconductor package stem 1 on the inside.

The third metal block 23 is a substantially L-shaped member fixed to the peltier element 70 disposed on the upper surface 10a of the eyelet 10. The third metal block 23 is disposed between the first metal block 21 and the second metal block 22 so as not to be in contact with each other. That is, the third metal block 23 is disposed separately from the first metal block 21 and the second metal block 22.

The surfaces of the third metal blocks 23 facing the fourth lead 44 and the fifth lead 45 are substrate fixing surfaces 23a for fixing the third substrate 33. The substrate fixing surface 23a is provided substantially perpendicular to the upper surface 10a of the grommet 10, for example. The substrate fixing surface 23a faces the same side as the substrate fixing surfaces 21a and 22a, for example, the substrate fixing surface 23a and the substrate fixing surfaces 21a and 22a are located on the same plane.

The third metal block 23 may be formed of a metal material such as copper tungsten in consideration of heat dissipation and thermal expansion rate. The third metal block 23 is fixed to the peltier element 70 by, for example, an adhesive having high thermal conductivity. The third metal block 23 is, for example, substantially L-shaped, and may have any shape as long as it is a shape capable of exposing a part of the rear surface of the third substrate 33.

The third substrate 33 is fixed to the substrate fixing surface 23 a. A signal pattern 33S (a surface facing the fourth lead 44 and the fifth lead 45) is provided on the surface of the third substrate 33₁Signal pattern 33S₂And a ground pattern 33G. A ground pattern 33G is provided on the rear surface (surface facing the third metal block 23) of the third substrate 33 in a full-surface shape. The ground pattern 33G on the front surface and the ground pattern 33G on the rear surface of the third substrate 33 are electrically connected to each other through the side surface of the third substrate 33.

The third substrate 33 is, for example, aluminum nitride in consideration of thermal conductivity. Signal pattern 33S₁Signal pattern 33S₂And the ground pattern 33G may be formed of, for example, tungsten, titanium, gold, or the like. May be in the signal pattern 33S₁Signal pattern 33S₂And gold plating or the like is formed on the surface of the ground pattern 33G.

On the surface side of the third substrate 33, a signal pattern 33S₁The signal pattern 31S is electrically connected to the linear member 80. The linear member 80 is a conductive element such as an electric wire. Further, on the surface side of the third substrate 33, a signal pattern 33S₂The signal pattern 32S is electrically connected to one or more linear members 80. Further, on the front surface side of the third substrate 33, the ground pattern 33G is electrically connected to the ground pattern 31G and the ground pattern 32G through one or more linear members 80. The number of the linear members 80 connecting the respective portions may be set to any number of one or more. The linear member 80 is not particularly limited, and may be, for example, a bonding wire, as long as it is a linear member. As another example of the linear member 80, a belt-like member may be mentioned. Further, a metal wire or the like may be bonded using solder.

Signal pattern 33S₁And a signal pattern 33S₂And is electrically connected to the terminal of the light emitting element 60 mounted on the surface of the third substrate 33. The input line of the drive signal requires the signal pattern 33S in order to correspond to a differential drive circuit for driving the light emitting element 60₁And a signal pattern 33S₂Both systems. Normal phase signal input signal pattern 33S₁And a signal pattern 33S₂The inverted signal of the positive phase signal is input to the other. The light emitting element 60 is, for example, a semiconductor laser chip having a wavelength of 1310nm or the like.

The rear surface side of the third substrate 33 is fixed to the substrate fixing surface 23a by a conductive material such as solder (for example, gold-tin alloy). Thereby, the ground pattern 33G on the back surface of the third substrate 33 is electrically connected to the third metal block 23, and the third metal block 23 has the GND potential (reference potential).

The width of the substrate fixing surface 23a of the third metal block 23 is formed narrower than the width of the third substrate 33, and the third substrate 33 is fixed to the substrate fixing surface 23a so that both sides of the back surface (the first substrate 31 side and the second substrate 32 side) protrude from both sides of the third metal block 23. Thereby, at least a part of the ground pattern 33G on the back surface of the third substrate 33 is exposed from the third metal block 23 on the first substrate 31 side and the second substrate 32 side.

The ground pattern 33G formed on the rear surface of the third substrate 33 exposed from the first substrate 31 side of the third metal block 23 and the ground pattern 31G formed on the rear surface of the first substrate 31 exposed from the first metal block 21 are electrically connected to each other by the linear member 80. The number of the linear members 80 connecting the ground pattern 33G and the ground pattern 31G to the rear surface side of the third substrate 33 and the first substrate 31 may be set to any number of one or more, but is preferably set to two or more from the viewpoint of stability of the GND potential.

However, the number of linear members 80 connecting the ground patterns 33G and 31G to the rear surface sides of the third substrate 33 and the first substrate 31 is preferably ten or less. This is to prevent heat generated by the operation of the light emitting element 60, which is moved by the peltier element 70, from returning to the light emitting element 60 through the first substrate 31 and the third substrate 33.

The ground pattern 33G formed on the rear surface of the third substrate 33 exposed from the second substrate 32 side of the third metal block 23 and the ground pattern 32G formed on the rear surface of the second substrate 32 exposed from the second metal block 22 are electrically connected by the linear member 80. The number of the linear members 80 connecting the ground pattern 33G and the ground pattern 32G to the rear surface side of the third substrate 33 and the second substrate 32 may be set to any number of one or more, but is preferably two or more from the viewpoint of stability of the GND potential.

However, the number of linear members 80 connecting the ground patterns 33G and 32G to the rear surface sides of the third substrate 33 and the second substrate 32 is preferably ten or less. This is to prevent heat generated by the operation of the light emitting element 60, which is moved by the peltier element 70, from returning to the light emitting element 60 through the first substrate 32 and the third substrate 33.

In this way, in the semiconductor package 2, at least a part of the ground pattern 31G on the back surface of the first substrate 31 is exposed from the first metal block 21, and at least a part of the ground pattern 32G on the back surface of the second substrate 32 is exposed from the second metal block 22. At least a part of the ground pattern 33G on the back surface of the third substrate 33 is exposed from the first substrate 31 side and the second substrate 32 side of the third metal block 23.

The ground pattern 31G on the rear surface of the first substrate 31 exposed from the first metal block 21 is electrically connected to the ground pattern 33G on the rear surface of the third substrate 33 exposed from the third metal block 23 on the first substrate 31 side by the linear member 80. The ground pattern 32G on the rear surface of the second substrate 32 exposed from the second metal block 22 is electrically connected to the ground pattern 33G on the rear surface of the third substrate 33 exposed from the third metal block 23 on the second substrate 32 side by the linear member 80.

That is, the ground pattern 31G on the back surface of the first substrate 31 and the ground pattern 32G on the back surface of the second substrate 32 are electrically connected to the ground pattern 33G on the back surface of the third substrate 33 by the linear member, instead of electrically connecting the back surfaces of the metal blocks to each other by the linear member as in the conventional art. This makes it possible to connect the ground patterns of different substrates to each other at the shortest distance without using a metal block, thereby further improving the electrical characteristics.

Further, the ground pattern 31G on the back surface of the first substrate 31 and the ground pattern 33G on the back surface of the third substrate 33 are connected to each other by, for example, one bonding wire having a diameter of 25 μm, thereby obtaining an effect of improving electrical characteristics. Similarly, the ground pattern 32G on the back surface of the second substrate 32 and the ground pattern 33G on the back surface of the third substrate 33 are connected to each other by, for example, one bonding wire having a diameter of 25 μm, thereby obtaining an effect of improving the electrical characteristics (see simulation results described later).

Therefore, it is possible to suppress heat from returning to the light emitting element through the linear member added to the back surface side of each substrate without increasing the number of metal wires added to the back surface side of each substrate at any time. However, if the required specifications as a semiconductor package can be satisfied, the ground patterns of different substrates can be connected to each other using a plurality of linear members. In this case, further improvement in electrical characteristics is expected.

Further, the first substrate 31 and the second substrate 32 are preferably formed of a material having lower thermal conductivity than the third substrate 33. This can further prevent heat generated by the operation of the light emitting element 60, which is transferred by the peltier element 70, from returning to the light emitting element 60 via the first substrate 31 and the second substrate 32. In order to obtain such an effect, for example, the first substrate 31 and the second substrate 32 may be made of aluminum oxide, and the third substrate 33 may be made of aluminum nitride.

When a bonding wire is used as the linear member 80, the electrical characteristics are improved when the bonding wire is made thicker, but heat is likely to return. In view of the improvement of the electrical characteristics and the return of heat, the diameter of the bonding wire is preferably set to about 25 μm.

(modification 1 of the first embodiment)

In modification 1 of the first embodiment, an example of a semiconductor package stem having a different structure from that of the first embodiment is shown. In modification 1 of the first embodiment, the description of the same components as those of the already described embodiment may be omitted.

Fig. 7 is a perspective view illustrating a semiconductor package stem according to modification 1 of the first embodiment, as an example, and is a view of the semiconductor package stem as viewed from the front side of the first substrate. Referring to fig. 7, a semiconductor package socket 1A according to modification 1 of the first embodiment differs from the semiconductor package socket 1 in that the second metal block 22, the second substrate 32, and the second lead 42 are eliminated (see fig. 1 to 3, etc.).

The semiconductor package socket 1 of the first embodiment corresponds to a differential-mode drive circuit, and the semiconductor package socket 1A corresponds to a single-ended drive circuit. Therefore, the input line of the driving signal is only one system of the signal pattern 31S, and thus the second metal block 22, the second substrate 32, and the second lead 42 are not required.

The semiconductor package can be formed by providing the third metal block 23, the third substrate 33, the light emitting element 60, the peltier element 70, the cover 100, and the transparent member 110 on the semiconductor package socket 1A in the same manner as the semiconductor package socket 1. In this case, the signal pattern and the ground pattern of the third substrate 33 may be appropriately designed according to a single-ended driver circuit.

In the case of the semiconductor package socket 1A corresponding to the single-ended drive circuit, at least a part of the ground pattern 31G on the back surface of the first substrate 31 is exposed from the first metal block 21, similarly to the case of the semiconductor package socket 1. Thus, when the semiconductor package is manufactured using the semiconductor package header 1A, the ground pattern 31G on the back surface of the first substrate 31 exposed from the first metal block 21 and the ground pattern 33G on the back surface of the third substrate 33 exposed from the first substrate 31 side of the third metal block 23 can be electrically connected to each other by the linear member 80. As a result, the same effects as those of the first embodiment are obtained.

(simulation)

Next, the results of the simulation of the connection of the ground patterns on the back surfaces of the first substrate 31, the second substrate 32, and the third substrate 33 will be described in detail. In the simulation, the analytical software ANSYS electromagnetic Suite 2019R 3 was used. The linear member 80 is assumed to be a gold bonding wire having a diameter of 25 μm. The simulation results are shown only on the first substrate 31 side, and the same results are also shown on the second substrate 32 side which is bilaterally symmetric.

(simulation 1)

In the simulation 1, the number of the linear members 80 connecting the ground patterns to each other on the back surfaces of the first substrate 31 and the third substrate 33 was set to two, and the characteristic difference based on the position in the height direction of the connecting linear member 80 was simulated. In addition, as a comparative example, a simulation was also performed for a case where the linear member 80 was not connected.

Specifically, the reflection loss (dB) and the insertion loss (dB) were obtained for the case where the linear members 80 were not connected as shown in fig. 8 (a) (comparative example), the case where two linear members 80 were connected one on each of the upper side and the lower side as shown in fig. 8 (b), the case where two linear members 80 were connected only on the upper side as shown in fig. 8 (c), and the case where two linear members 80 were connected only on the lower side as shown in fig. 8 (d).

The simulation results are shown in fig. 9. In fig. 9, the characteristic shown by the broken line is the reflection loss in the differential mode (SDD11), and the characteristic shown by the solid line is the insertion loss in the differential mode (SDD 21). In FIG. 9, a₁And a₂Is the characteristic of the case of FIG. 8 (a), b₁And b₂Is the characteristic of the case of FIG. 8 (b), c₁And c₂Characteristic of the case of FIG. 8 (c), d₁And d₂Is a characteristic of the case of fig. 8 (d).

A according to FIG. 9₁、b₁、c₁、d₁It can be confirmed that the reflection loss (SDD11) improves as the frequency becomes higher in the case where two linear members 80 are connected in fig. 8 (b) to 8 (d) than in the case where the linear members 80 are not connected in fig. 8 (a). In addition, according to a of FIG. 9₂、b₂、c₂、d₂It can be confirmed that the insertion loss (SDD21) improves as the frequency becomes higher in the case where two linear members 80 are connected as shown in fig. 8 (b) to 8 (d) than in the case where the linear members 80 are not connected as shown in fig. 8 (a).

However, in FIG. 9, b₁～d₁And b₂～d₂Are overlapped with each other to appear substantially one piece with no significant difference, and thus it can be said that connecting the linear members 80 is important and the location of connecting the linear members 80 is not important.

In addition, according to additional research by the inventors, when there is one linear member 80, the number "a" shown in fig. 9 is used₁Characteristic of (a) and (b)₁～d₁A characteristic of₂Characteristic of (a) and (b)₂～d₂It was confirmed that a certain effect can be obtained even if one linear member 80 is connected approximately in the middle of the characteristic(s).

(simulation 2)

In simulation 2, the effect of changing the height of the first metal block 21 was simulated by setting the number of the linear members 80 to two or eight.

Specifically, the reflection loss (dB) and the insertion loss (dB) were obtained for the case where the height of the first metal block 21 was low and only two linear members 80 were connected to the upper side as shown in fig. 10 (a), the case where the height of the first metal block 21 was high and only two linear members 80 were connected to the upper side as shown in fig. 10 (b), the case where the height of the first metal block 21 was low and eight linear members 80 were connected to substantially the entire height direction as shown in fig. 10 (c), and the case where the height of the first metal block 21 was high and eight linear members 80 were connected to substantially the entire height direction as shown in fig. 10 (d).

Fig. 11 shows the simulation results of fig. 10 (a) and 10 (b), and fig. 12 shows the simulation results of fig. 10 (c) and 10 (d). In fig. 11 and 12, the characteristic shown by the broken line is the reflection loss in the differential mode (SDD11), and the characteristic shown by the solid line is the insertion loss in the differential mode (SDD 21). In FIG. 11, a₁And a₂Is a characteristic of the case of FIG. 10 (a), b₁And b₂Is a characteristic of the case of fig. 10 (b). In addition, in FIG. 12, c₁And c₂Is a characteristic of the case of (c) of FIG. 10, d₁And d₂Is a characteristic of the case of fig. 10 (d).

According to fig. 11 and 12, the characteristics of the case of connecting two linear members 80 and the case of connecting eight linear members overlap each other, and the influence of the height of the first metal block 21 cannot be confirmed. In addition, comparing fig. 11 and 12, the reflection loss (SDD11) and the insertion loss (SDD21) are improved in the case of connecting eight linear members 80 as compared with the case of connecting two linear members 80.

(simulation 3-1)

In the simulation 3-1, a simulation was performed in which the height of the first metal block 21 was set to be constant and the number of linear members 80 was changed.

Specifically, with reference to the case where ten linear members 80 are connected, the reflection loss (dB) and the insertion loss (dB) are obtained for the case where the two wires on the center side are removed and eight wires are formed as shown in fig. 13 (a), the case where the two wires on the lower side are removed and eight wires are formed as shown in fig. 13 (b), and the case where the two wires on the upper side are removed and eight wires are formed as shown in fig. 13 (c).

Will comprise connecting ten linear partsFig. 14 shows simulation results of fig. 13 (a) to 13 (c) for the case of the member 80. In fig. 14, the characteristic shown by the dotted line is the reflection loss of the differential mode (SDD11), and the characteristic shown by the solid line is the insertion loss of the differential mode (SDD 21). In FIG. 14, a₁And a₂Is a characteristic of the case of connecting ten linear members 80, b₁And b₂Is a characteristic of the case of (a) of FIG. 13, c₁And c₂Is a characteristic of the case of (b) of FIG. 13, d₁And d₂Is a characteristic of the case of fig. 13 (c).

According to fig. 14, the characteristics of the case where ten linear members 80 are connected and the case where eight linear members are connected overlap each other, and the influence of reducing the number of linear members 80 from ten to eight and the significant difference in the reduction position cannot be confirmed.

(simulation 3-2)

In the simulation 3-2, a simulation was performed in which the height of the first metal block 21 was set to be constant and the number of linear members 80 was changed.

Specifically, with reference to the case where ten linear members 80 are connected, the reflection loss (dB) and the insertion loss (dB) were obtained for the case where six of the central sides were removed and four were set as shown in fig. 15 (a), the case where six of the lower sides were removed and four were set as shown in fig. 15 (b), and the case where six of the upper sides were removed and four were set as shown in fig. 15 (c).

Fig. 16 shows simulation results of fig. 15 (a) to 15 (c) including the case where ten linear members 80 are connected. In fig. 16, the characteristic shown by the dotted line is the reflection loss of the differential mode (SDD11), and the characteristic shown by the solid line is the insertion loss of the differential mode (SDD 21). In FIG. 16, a₁And a₂Is a characteristic of the case of connecting ten linear members 80, b₁And b₂Is a characteristic of the case of (a) of FIG. 15, c₁And c₂Is a characteristic of the case of (b) of FIG. 15, d₁And d₂Is a characteristic of the case of fig. 15 (c).

According to fig. 16, when the number of the linear members 80 is reduced from ten to four, the characteristics tend to be deteriorated as the frequency becomes higher. However, a significant difference cannot be observed in the positions where the linear members 80 are reduced.

(simulation 3-3)

In the simulation 3-3, a simulation was performed in which the height of the first metal block 21 was set to be constant and the number of linear members 80 was changed.

Specifically, with the case of connecting ten linear members 80 as a reference, the reflection loss (dB) and the insertion loss (dB) were obtained for the case where eight members on the center side were removed and two members were formed, as shown in fig. 17 (a), the case where eight members on the lower side were removed and two members were formed, as shown in fig. 17 (b), and the case where eight members on the upper side were removed and two members were formed, as shown in fig. 17 (c).

Fig. 18 shows simulation results of fig. 17 (a) to 17 (c) including the case where ten linear members 80 are connected. In fig. 18, the characteristic shown by the dotted line is the reflection loss of the differential mode (SDD11), and the characteristic shown by the solid line is the insertion loss of the differential mode (SDD 21). In FIG. 18, a₁And a₂Is a characteristic of the case of connecting ten linear members 80, b₁And b₂Is a characteristic of the case of (a) of FIG. 17, c₁And c₂Is a characteristic of the case of (b) of FIG. 17, d₁And d₂Is a characteristic of the case of fig. 17 (c).

According to fig. 18, the effect of reducing the number of linear members 80 from ten to two is greater than the effect of reducing the number of linear members to four or eight. However, a significant difference cannot be observed in the positions where the linear members 80 are reduced.

The results of simulations 1 to 3-3 were summarized above, and the following conclusions can be drawn. When the ground patterns are connected to each other on the back surfaces of the first substrate 31, the second substrate 32, and the third substrate 33, a certain effect can be obtained by connecting only one linear member 80. Further, when three or more linear members 80 are connected, the reflection loss and the insertion loss are further improved, but if the number of linear members is more than eight, further improvement is not expected. In addition, no significant difference was found in the height of the first metal block 21 and the second metal block 22 and the position in the height direction of the connecting linear member 80.

That is, in consideration of the improvement of the electrical characteristics and the return of heat, it is preferable to select the linear member 80 connecting the first substrate 31 and the third substrate 33 and the second substrate 32 and the third substrate 33 on the back surface side within a range that satisfies the required specification as a semiconductor package, and within a range of one or more and eight or less.

While the preferred embodiments have been described in detail, the present invention is not limited to the embodiments, and various modifications and substitutions may be made thereto without departing from the scope of the claims.